1 /* 2 * Copyright (C) 2008-2009 ST-Ericsson SA 3 * 4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2, as 8 * published by the Free Software Foundation. 9 * 10 */ 11 #include <linux/types.h> 12 #include <linux/init.h> 13 #include <linux/device.h> 14 #include <linux/amba/bus.h> 15 #include <linux/interrupt.h> 16 #include <linux/irq.h> 17 #include <linux/irqchip.h> 18 #include <linux/irqchip/arm-gic.h> 19 #include <linux/mfd/dbx500-prcmu.h> 20 #include <linux/platform_data/arm-ux500-pm.h> 21 #include <linux/platform_device.h> 22 #include <linux/io.h> 23 #include <linux/of.h> 24 #include <linux/of_address.h> 25 #include <linux/of_platform.h> 26 #include <linux/perf/arm_pmu.h> 27 #include <linux/regulator/machine.h> 28 29 #include <asm/outercache.h> 30 #include <asm/hardware/cache-l2x0.h> 31 #include <asm/mach/map.h> 32 #include <asm/mach/arch.h> 33 34 #include "setup.h" 35 36 #include "db8500-regs.h" 37 38 static int __init ux500_l2x0_unlock(void) 39 { 40 int i; 41 struct device_node *np; 42 void __iomem *l2x0_base; 43 44 np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); 45 l2x0_base = of_iomap(np, 0); 46 of_node_put(np); 47 if (!l2x0_base) 48 return -ENODEV; 49 50 /* 51 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions 52 * apparently locks both caches before jumping to the kernel. The 53 * l2x0 core will not touch the unlock registers if the l2x0 is 54 * already enabled, so we do it right here instead. The PL310 has 55 * 8 sets of registers, one per possible CPU. 56 */ 57 for (i = 0; i < 8; i++) { 58 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE + 59 i * L2X0_LOCKDOWN_STRIDE); 60 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + 61 i * L2X0_LOCKDOWN_STRIDE); 62 } 63 iounmap(l2x0_base); 64 return 0; 65 } 66 67 static void ux500_l2c310_write_sec(unsigned long val, unsigned reg) 68 { 69 /* 70 * We can't write to secure registers as we are in non-secure 71 * mode, until we have some SMI service available. 72 */ 73 } 74 75 /* 76 * FIXME: Should we set up the GPIO domain here? 77 * 78 * The problem is that we cannot put the interrupt resources into the platform 79 * device until the irqdomain has been added. Right now, we set the GIC interrupt 80 * domain from init_irq(), then load the gpio driver from 81 * core_initcall(nmk_gpio_init) and add the platform devices from 82 * arch_initcall(customize_machine). 83 * 84 * This feels fragile because it depends on the gpio device getting probed 85 * _before_ any device uses the gpio interrupts. 86 */ 87 static void __init ux500_init_irq(void) 88 { 89 struct device_node *np; 90 struct resource r; 91 92 irqchip_init(); 93 np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu"); 94 of_address_to_resource(np, 0, &r); 95 of_node_put(np); 96 if (!r.start) { 97 pr_err("could not find PRCMU base resource\n"); 98 return; 99 } 100 prcmu_early_init(r.start, r.end-r.start); 101 ux500_pm_init(r.start, r.end-r.start); 102 103 /* Unlock before init */ 104 ux500_l2x0_unlock(); 105 outer_cache.write_sec = ux500_l2c310_write_sec; 106 } 107 108 static void ux500_restart(enum reboot_mode mode, const char *cmd) 109 { 110 local_irq_disable(); 111 local_fiq_disable(); 112 113 prcmu_system_reset(0); 114 } 115 116 /* 117 * The PMU IRQ lines of two cores are wired together into a single interrupt. 118 * Bounce the interrupt to the other core if it's not ours. 119 */ 120 static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler) 121 { 122 irqreturn_t ret = handler(irq, dev); 123 int other = !smp_processor_id(); 124 125 if (ret == IRQ_NONE && cpu_online(other)) 126 irq_set_affinity(irq, cpumask_of(other)); 127 128 /* 129 * We should be able to get away with the amount of IRQ_NONEs we give, 130 * while still having the spurious IRQ detection code kick in if the 131 * interrupt really starts hitting spuriously. 132 */ 133 return ret; 134 } 135 136 static struct arm_pmu_platdata db8500_pmu_platdata = { 137 .handle_irq = db8500_pmu_handler, 138 }; 139 140 static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 141 /* Requires call-back bindings. */ 142 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 143 {}, 144 }; 145 146 static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = { 147 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL), 148 {}, 149 }; 150 151 static const struct of_device_id u8500_local_bus_nodes[] = { 152 /* only create devices below soc node */ 153 { .compatible = "stericsson,db8500", }, 154 { .compatible = "stericsson,db8500-prcmu", }, 155 { .compatible = "simple-bus"}, 156 { }, 157 }; 158 159 static void __init u8500_init_machine(void) 160 { 161 /* automatically probe child nodes of dbx5x0 devices */ 162 if (of_machine_is_compatible("st-ericsson,u8540")) 163 of_platform_populate(NULL, u8500_local_bus_nodes, 164 u8540_auxdata_lookup, NULL); 165 else 166 of_platform_populate(NULL, u8500_local_bus_nodes, 167 u8500_auxdata_lookup, NULL); 168 } 169 170 static const char * stericsson_dt_platform_compat[] = { 171 "st-ericsson,u8500", 172 "st-ericsson,u8540", 173 "st-ericsson,u9500", 174 "st-ericsson,u9540", 175 NULL, 176 }; 177 178 DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)") 179 .l2c_aux_val = 0, 180 .l2c_aux_mask = ~0, 181 .init_irq = ux500_init_irq, 182 .init_machine = u8500_init_machine, 183 .dt_compat = stericsson_dt_platform_compat, 184 .restart = ux500_restart, 185 MACHINE_END 186