1 /* 2 * Copyright (C) 2008-2009 ST-Ericsson SA 3 * 4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2, as 8 * published by the Free Software Foundation. 9 * 10 */ 11 #include <linux/types.h> 12 #include <linux/init.h> 13 #include <linux/device.h> 14 #include <linux/amba/bus.h> 15 #include <linux/interrupt.h> 16 #include <linux/irq.h> 17 #include <linux/irqchip.h> 18 #include <linux/irqchip/arm-gic.h> 19 #include <linux/mfd/dbx500-prcmu.h> 20 #include <linux/platform_data/arm-ux500-pm.h> 21 #include <linux/platform_device.h> 22 #include <linux/io.h> 23 #include <linux/of.h> 24 #include <linux/of_address.h> 25 #include <linux/of_platform.h> 26 #include <linux/perf/arm_pmu.h> 27 #include <linux/regulator/machine.h> 28 29 #include <asm/outercache.h> 30 #include <asm/hardware/cache-l2x0.h> 31 #include <asm/mach/map.h> 32 #include <asm/mach/arch.h> 33 34 #include "db8500-regs.h" 35 #include "pm_domains.h" 36 37 static int __init ux500_l2x0_unlock(void) 38 { 39 int i; 40 struct device_node *np; 41 void __iomem *l2x0_base; 42 43 np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); 44 l2x0_base = of_iomap(np, 0); 45 of_node_put(np); 46 if (!l2x0_base) 47 return -ENODEV; 48 49 /* 50 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions 51 * apparently locks both caches before jumping to the kernel. The 52 * l2x0 core will not touch the unlock registers if the l2x0 is 53 * already enabled, so we do it right here instead. The PL310 has 54 * 8 sets of registers, one per possible CPU. 55 */ 56 for (i = 0; i < 8; i++) { 57 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE + 58 i * L2X0_LOCKDOWN_STRIDE); 59 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + 60 i * L2X0_LOCKDOWN_STRIDE); 61 } 62 iounmap(l2x0_base); 63 return 0; 64 } 65 66 static void ux500_l2c310_write_sec(unsigned long val, unsigned reg) 67 { 68 /* 69 * We can't write to secure registers as we are in non-secure 70 * mode, until we have some SMI service available. 71 */ 72 } 73 74 /* 75 * FIXME: Should we set up the GPIO domain here? 76 * 77 * The problem is that we cannot put the interrupt resources into the platform 78 * device until the irqdomain has been added. Right now, we set the GIC interrupt 79 * domain from init_irq(), then load the gpio driver from 80 * core_initcall(nmk_gpio_init) and add the platform devices from 81 * arch_initcall(customize_machine). 82 * 83 * This feels fragile because it depends on the gpio device getting probed 84 * _before_ any device uses the gpio interrupts. 85 */ 86 static void __init ux500_init_irq(void) 87 { 88 struct device_node *np; 89 struct resource r; 90 91 irqchip_init(); 92 np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu"); 93 of_address_to_resource(np, 0, &r); 94 of_node_put(np); 95 if (!r.start) { 96 pr_err("could not find PRCMU base resource\n"); 97 return; 98 } 99 prcmu_early_init(r.start, r.end-r.start); 100 ux500_pm_init(r.start, r.end-r.start); 101 102 /* Unlock before init */ 103 ux500_l2x0_unlock(); 104 outer_cache.write_sec = ux500_l2c310_write_sec; 105 } 106 107 static void ux500_restart(enum reboot_mode mode, const char *cmd) 108 { 109 local_irq_disable(); 110 local_fiq_disable(); 111 112 prcmu_system_reset(0); 113 } 114 115 /* 116 * The PMU IRQ lines of two cores are wired together into a single interrupt. 117 * Bounce the interrupt to the other core if it's not ours. 118 */ 119 static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler) 120 { 121 irqreturn_t ret = handler(irq, dev); 122 int other = !smp_processor_id(); 123 124 if (ret == IRQ_NONE && cpu_online(other)) 125 irq_set_affinity(irq, cpumask_of(other)); 126 127 /* 128 * We should be able to get away with the amount of IRQ_NONEs we give, 129 * while still having the spurious IRQ detection code kick in if the 130 * interrupt really starts hitting spuriously. 131 */ 132 return ret; 133 } 134 135 static struct arm_pmu_platdata db8500_pmu_platdata = { 136 .handle_irq = db8500_pmu_handler, 137 .irq_flags = IRQF_NOBALANCING | IRQF_NO_THREAD, 138 }; 139 140 static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 141 /* Requires call-back bindings. */ 142 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 143 {}, 144 }; 145 146 static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = { 147 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL), 148 {}, 149 }; 150 151 static const struct of_device_id u8500_local_bus_nodes[] = { 152 /* only create devices below soc node */ 153 { .compatible = "stericsson,db8500", }, 154 { .compatible = "stericsson,db8500-prcmu", }, 155 { .compatible = "simple-bus"}, 156 { }, 157 }; 158 159 static void __init u8500_init_machine(void) 160 { 161 /* Initialize ux500 power domains */ 162 ux500_pm_domains_init(); 163 164 /* automatically probe child nodes of dbx5x0 devices */ 165 if (of_machine_is_compatible("st-ericsson,u8540")) 166 of_platform_populate(NULL, u8500_local_bus_nodes, 167 u8540_auxdata_lookup, NULL); 168 else 169 of_platform_populate(NULL, u8500_local_bus_nodes, 170 u8500_auxdata_lookup, NULL); 171 } 172 173 static const char * stericsson_dt_platform_compat[] = { 174 "st-ericsson,u8500", 175 "st-ericsson,u8540", 176 "st-ericsson,u9500", 177 "st-ericsson,u9540", 178 NULL, 179 }; 180 181 DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)") 182 .l2c_aux_val = 0, 183 .l2c_aux_mask = ~0, 184 .init_irq = ux500_init_irq, 185 .init_machine = u8500_init_machine, 186 .dt_compat = stericsson_dt_platform_compat, 187 .restart = ux500_restart, 188 MACHINE_END 189