1cb165c52SRabin Vincent /* 2c15def1cSLinus Walleij * Copyright (C) 2008-2009 ST-Ericsson SA 3cb165c52SRabin Vincent * 4cb165c52SRabin Vincent * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5cb165c52SRabin Vincent * 6cb165c52SRabin Vincent * This program is free software; you can redistribute it and/or modify 7cb165c52SRabin Vincent * it under the terms of the GNU General Public License version 2, as 8cb165c52SRabin Vincent * published by the Free Software Foundation. 9cb165c52SRabin Vincent * 10cb165c52SRabin Vincent */ 11cb165c52SRabin Vincent #include <linux/types.h> 12cb165c52SRabin Vincent #include <linux/init.h> 13cb165c52SRabin Vincent #include <linux/device.h> 14cb165c52SRabin Vincent #include <linux/amba/bus.h> 15aa90eb9dSRabin Vincent #include <linux/interrupt.h> 16cb165c52SRabin Vincent #include <linux/irq.h> 17cb165c52SRabin Vincent #include <linux/platform_device.h> 18cb165c52SRabin Vincent #include <linux/io.h> 193a8e39c9SLee Jones #include <linux/mfd/abx500/ab8500.h> 20bb16bd9bSLinus Walleij #include <linux/platform_data/usb-musb-ux500.h> 21bb16bd9bSLinus Walleij #include <linux/platform_data/pinctrl-nomadik.h> 22cb165c52SRabin Vincent 235caecb44SAxel Lin #include <asm/pmu.h> 24cb165c52SRabin Vincent #include <asm/mach/map.h> 25cb165c52SRabin Vincent #include <mach/hardware.h> 26cb165c52SRabin Vincent #include <mach/setup.h> 27cb165c52SRabin Vincent #include <mach/devices.h> 28eda413c2SLee Jones #include <mach/db8500-regs.h> 29cb165c52SRabin Vincent 30fbf1eadfSRabin Vincent #include "devices-db8500.h" 316f3f3c3fSMian Yousaf Kaukab #include "ste-dma40-db8500.h" 32fbf1eadfSRabin Vincent 33cb165c52SRabin Vincent /* minimum static i/o mapping required to boot U8500 platforms */ 34abf12d71SRabin Vincent static struct map_desc u8500_uart_io_desc[] __initdata = { 3592389ca8SRabin Vincent __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), 3692389ca8SRabin Vincent __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), 37abf12d71SRabin Vincent }; 38bc71c096SLinus Walleij /* U8500 and U9540 common io_desc */ 39bc71c096SLinus Walleij static struct map_desc u8500_common_io_desc[] __initdata = { 40215e83d9SLinus Walleij /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ 41215e83d9SLinus Walleij __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), 4292389ca8SRabin Vincent __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), 4392389ca8SRabin Vincent __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), 4492389ca8SRabin Vincent __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 4592389ca8SRabin Vincent __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), 4692389ca8SRabin Vincent 4792389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), 4892389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K), 4992389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K), 5092389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K), 5192389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K), 5292389ca8SRabin Vincent 53cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), 54cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 55cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 56cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 57ee9581d7SMichel Jaouen }; 58ee9581d7SMichel Jaouen 59ee9581d7SMichel Jaouen /* U8500 IO map specific description */ 60ee9581d7SMichel Jaouen static struct map_desc u8500_io_desc[] __initdata = { 61ee9581d7SMichel Jaouen __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), 62fcbd458eSMattias Wallin __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 63ee9581d7SMichel Jaouen 64ee9581d7SMichel Jaouen }; 65ee9581d7SMichel Jaouen 66ee9581d7SMichel Jaouen /* U9540 IO map specific description */ 67ee9581d7SMichel Jaouen static struct map_desc u9540_io_desc[] __initdata = { 68ee9581d7SMichel Jaouen __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K), 69ee9581d7SMichel Jaouen __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K), 70cb165c52SRabin Vincent }; 71cb165c52SRabin Vincent 72cb165c52SRabin Vincent void __init u8500_map_io(void) 73cb165c52SRabin Vincent { 74abf12d71SRabin Vincent /* 75abf12d71SRabin Vincent * Map the UARTs early so that the DEBUG_LL stuff continues to work. 76abf12d71SRabin Vincent */ 77abf12d71SRabin Vincent iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); 78abf12d71SRabin Vincent 79abf12d71SRabin Vincent ux500_map_io(); 80abf12d71SRabin Vincent 81bc71c096SLinus Walleij iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc)); 82cb165c52SRabin Vincent 83e1bbb55dSLinus Walleij if (cpu_is_ux540_family()) 84ee9581d7SMichel Jaouen iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); 85ee9581d7SMichel Jaouen else 86cb165c52SRabin Vincent iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 87cb165c52SRabin Vincent 8811871890SLinus Walleij _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); 89cb165c52SRabin Vincent } 90cb165c52SRabin Vincent 91aa90eb9dSRabin Vincent static struct resource db8500_pmu_resources[] = { 92aa90eb9dSRabin Vincent [0] = { 93aa90eb9dSRabin Vincent .start = IRQ_DB8500_PMU, 94aa90eb9dSRabin Vincent .end = IRQ_DB8500_PMU, 95aa90eb9dSRabin Vincent .flags = IORESOURCE_IRQ, 96aa90eb9dSRabin Vincent }, 97aa90eb9dSRabin Vincent }; 98aa90eb9dSRabin Vincent 99aa90eb9dSRabin Vincent /* 100aa90eb9dSRabin Vincent * The PMU IRQ lines of two cores are wired together into a single interrupt. 101aa90eb9dSRabin Vincent * Bounce the interrupt to the other core if it's not ours. 102aa90eb9dSRabin Vincent */ 103aa90eb9dSRabin Vincent static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler) 104aa90eb9dSRabin Vincent { 105aa90eb9dSRabin Vincent irqreturn_t ret = handler(irq, dev); 106aa90eb9dSRabin Vincent int other = !smp_processor_id(); 107aa90eb9dSRabin Vincent 108aa90eb9dSRabin Vincent if (ret == IRQ_NONE && cpu_online(other)) 109aa90eb9dSRabin Vincent irq_set_affinity(irq, cpumask_of(other)); 110aa90eb9dSRabin Vincent 111aa90eb9dSRabin Vincent /* 112aa90eb9dSRabin Vincent * We should be able to get away with the amount of IRQ_NONEs we give, 113aa90eb9dSRabin Vincent * while still having the spurious IRQ detection code kick in if the 114aa90eb9dSRabin Vincent * interrupt really starts hitting spuriously. 115aa90eb9dSRabin Vincent */ 116aa90eb9dSRabin Vincent return ret; 117aa90eb9dSRabin Vincent } 118aa90eb9dSRabin Vincent 1193a8e39c9SLee Jones struct arm_pmu_platdata db8500_pmu_platdata = { 120aa90eb9dSRabin Vincent .handle_irq = db8500_pmu_handler, 121aa90eb9dSRabin Vincent }; 122aa90eb9dSRabin Vincent 123aa90eb9dSRabin Vincent static struct platform_device db8500_pmu_device = { 124aa90eb9dSRabin Vincent .name = "arm-pmu", 125df3d17e0SSudeep KarkadaNagesha .id = -1, 126aa90eb9dSRabin Vincent .num_resources = ARRAY_SIZE(db8500_pmu_resources), 127aa90eb9dSRabin Vincent .resource = db8500_pmu_resources, 128aa90eb9dSRabin Vincent .dev.platform_data = &db8500_pmu_platdata, 129aa90eb9dSRabin Vincent }; 130aa90eb9dSRabin Vincent 1313df57bcfSMattias Nilsson static struct platform_device db8500_prcmu_device = { 1323df57bcfSMattias Nilsson .name = "db8500-prcmu", 1333df57bcfSMattias Nilsson }; 1343df57bcfSMattias Nilsson 135aa90eb9dSRabin Vincent static struct platform_device *platform_devs[] __initdata = { 136aa90eb9dSRabin Vincent &u8500_dma40_device, 137aa90eb9dSRabin Vincent &db8500_pmu_device, 1383df57bcfSMattias Nilsson &db8500_prcmu_device, 139aa90eb9dSRabin Vincent }; 140aa90eb9dSRabin Vincent 14101afdd13SRabin Vincent static resource_size_t __initdata db8500_gpio_base[] = { 14201afdd13SRabin Vincent U8500_GPIOBANK0_BASE, 14301afdd13SRabin Vincent U8500_GPIOBANK1_BASE, 14401afdd13SRabin Vincent U8500_GPIOBANK2_BASE, 14501afdd13SRabin Vincent U8500_GPIOBANK3_BASE, 14601afdd13SRabin Vincent U8500_GPIOBANK4_BASE, 14701afdd13SRabin Vincent U8500_GPIOBANK5_BASE, 14801afdd13SRabin Vincent U8500_GPIOBANK6_BASE, 14901afdd13SRabin Vincent U8500_GPIOBANK7_BASE, 15001afdd13SRabin Vincent U8500_GPIOBANK8_BASE, 15101afdd13SRabin Vincent }; 15201afdd13SRabin Vincent 15318403424SLee Jones static void __init db8500_add_gpios(struct device *parent) 15401afdd13SRabin Vincent { 15501afdd13SRabin Vincent struct nmk_gpio_platform_data pdata = { 156c15def1cSLinus Walleij .supports_sleepmode = true, 15701afdd13SRabin Vincent }; 15801afdd13SRabin Vincent 15918403424SLee Jones dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base), 16001afdd13SRabin Vincent IRQ_DB8500_GPIO0, &pdata); 161f4828336SJonas Aaberg dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE); 16201afdd13SRabin Vincent } 16301afdd13SRabin Vincent 1646f3f3c3fSMian Yousaf Kaukab static int usb_db8500_rx_dma_cfg[] = { 1656f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV38_USB_OTG_IEP_1_9, 1666f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV37_USB_OTG_IEP_2_10, 1676f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV36_USB_OTG_IEP_3_11, 1686f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV19_USB_OTG_IEP_4_12, 1696f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV18_USB_OTG_IEP_5_13, 1706f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV17_USB_OTG_IEP_6_14, 1716f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV16_USB_OTG_IEP_7_15, 1726f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV39_USB_OTG_IEP_8 1736f3f3c3fSMian Yousaf Kaukab }; 1746f3f3c3fSMian Yousaf Kaukab 1756f3f3c3fSMian Yousaf Kaukab static int usb_db8500_tx_dma_cfg[] = { 1766f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV38_USB_OTG_OEP_1_9, 1776f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV37_USB_OTG_OEP_2_10, 1786f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV36_USB_OTG_OEP_3_11, 1796f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV19_USB_OTG_OEP_4_12, 1806f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV18_USB_OTG_OEP_5_13, 1816f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV17_USB_OTG_OEP_6_14, 1826f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV16_USB_OTG_OEP_7_15, 1836f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV39_USB_OTG_OEP_8 1846f3f3c3fSMian Yousaf Kaukab }; 1856f3f3c3fSMian Yousaf Kaukab 186eda413c2SLee Jones static const char *db8500_read_soc_id(void) 187eda413c2SLee Jones { 188eda413c2SLee Jones void __iomem *uid = __io_address(U8500_BB_UID_BASE); 189eda413c2SLee Jones 190eda413c2SLee Jones return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x", 191eda413c2SLee Jones readl((u32 *)uid+1), 192eda413c2SLee Jones readl((u32 *)uid+1), readl((u32 *)uid+2), 193eda413c2SLee Jones readl((u32 *)uid+3), readl((u32 *)uid+4)); 194eda413c2SLee Jones } 195eda413c2SLee Jones 196eda413c2SLee Jones static struct device * __init db8500_soc_device_init(void) 197eda413c2SLee Jones { 198eda413c2SLee Jones const char *soc_id = db8500_read_soc_id(); 199eda413c2SLee Jones 200eda413c2SLee Jones return ux500_soc_device_init(soc_id); 201eda413c2SLee Jones } 202eda413c2SLee Jones 203cb165c52SRabin Vincent /* 204cb165c52SRabin Vincent * This function is called from the board init 205cb165c52SRabin Vincent */ 2063a8e39c9SLee Jones struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500) 207cb165c52SRabin Vincent { 208eda413c2SLee Jones struct device *parent; 209b024a0c8SLee Jones int i; 210eda413c2SLee Jones 211eda413c2SLee Jones parent = db8500_soc_device_init(); 212eda413c2SLee Jones 213eda413c2SLee Jones db8500_add_rtc(parent); 214eda413c2SLee Jones db8500_add_gpios(parent); 215eda413c2SLee Jones db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 216fbf1eadfSRabin Vincent 217b024a0c8SLee Jones platform_device_register_data(parent, 218b024a0c8SLee Jones "cpufreq-u8500", -1, NULL, 0); 219b024a0c8SLee Jones 220f65c1982SLee Jones for (i = 0; i < ARRAY_SIZE(platform_devs); i++) 221f65c1982SLee Jones platform_devs[i]->dev.parent = parent; 222f65c1982SLee Jones 2233a8e39c9SLee Jones db8500_prcmu_device.dev.platform_data = ab8500; 2243a8e39c9SLee Jones 225f65c1982SLee Jones platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 226f65c1982SLee Jones 227f65c1982SLee Jones return parent; 228f65c1982SLee Jones } 229f65c1982SLee Jones 230f65c1982SLee Jones /* TODO: Once all pieces are DT:ed, remove completely. */ 231f65c1982SLee Jones struct device * __init u8500_of_init_devices(void) 232f65c1982SLee Jones { 233f65c1982SLee Jones struct device *parent; 234f65c1982SLee Jones 235f65c1982SLee Jones parent = db8500_soc_device_init(); 236f65c1982SLee Jones 237f65c1982SLee Jones db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 238f65c1982SLee Jones 239f65c1982SLee Jones platform_device_register_data(parent, 240f65c1982SLee Jones "cpufreq-u8500", -1, NULL, 0); 241f65c1982SLee Jones 24238cd8c5dSLee Jones u8500_dma40_device.dev.parent = parent; 243b024a0c8SLee Jones 24408d05026SLee Jones /* 24508d05026SLee Jones * Devices to be DT:ed: 24608d05026SLee Jones * u8500_dma40_device = todo 247da384870SLee Jones * db8500_pmu_device = done 248dee42ebeSLee Jones * db8500_prcmu_device = done 24908d05026SLee Jones */ 25038cd8c5dSLee Jones platform_device_register(&u8500_dma40_device); 251cb165c52SRabin Vincent 252eda413c2SLee Jones return parent; 253cb165c52SRabin Vincent } 254