1cb165c52SRabin Vincent /* 2cb165c52SRabin Vincent * Copyright (C) 2008-2009 ST-Ericsson 3cb165c52SRabin Vincent * 4cb165c52SRabin Vincent * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5cb165c52SRabin Vincent * 6cb165c52SRabin Vincent * This program is free software; you can redistribute it and/or modify 7cb165c52SRabin Vincent * it under the terms of the GNU General Public License version 2, as 8cb165c52SRabin Vincent * published by the Free Software Foundation. 9cb165c52SRabin Vincent * 10cb165c52SRabin Vincent */ 11cb165c52SRabin Vincent #include <linux/types.h> 12cb165c52SRabin Vincent #include <linux/init.h> 13cb165c52SRabin Vincent #include <linux/device.h> 14cb165c52SRabin Vincent #include <linux/amba/bus.h> 15cb165c52SRabin Vincent #include <linux/irq.h> 16cb165c52SRabin Vincent #include <linux/gpio.h> 17cb165c52SRabin Vincent #include <linux/platform_device.h> 18cb165c52SRabin Vincent #include <linux/io.h> 19cb165c52SRabin Vincent 20cb165c52SRabin Vincent #include <asm/mach/map.h> 21cb165c52SRabin Vincent #include <mach/hardware.h> 22cb165c52SRabin Vincent #include <mach/setup.h> 23cb165c52SRabin Vincent #include <mach/devices.h> 24cb165c52SRabin Vincent 25fbf1eadfSRabin Vincent #include "devices-db8500.h" 26fbf1eadfSRabin Vincent 27cb165c52SRabin Vincent static struct platform_device *platform_devs[] __initdata = { 287b8ddb06SLinus Walleij &u8500_dma40_device, 29cb165c52SRabin Vincent }; 30cb165c52SRabin Vincent 31cb165c52SRabin Vincent /* minimum static i/o mapping required to boot U8500 platforms */ 32cb165c52SRabin Vincent static struct map_desc u8500_io_desc[] __initdata = { 3392389ca8SRabin Vincent __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), 3492389ca8SRabin Vincent __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), 3592389ca8SRabin Vincent __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K), 3692389ca8SRabin Vincent __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), 3792389ca8SRabin Vincent __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), 3892389ca8SRabin Vincent __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K), 3992389ca8SRabin Vincent __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 4092389ca8SRabin Vincent __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), 4192389ca8SRabin Vincent __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), 4292389ca8SRabin Vincent 4392389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), 4492389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K), 4592389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K), 4692389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K), 4792389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K), 4892389ca8SRabin Vincent 49cb165c52SRabin Vincent __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), 50cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), 51cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 52cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 53cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 54f946738cSLinus Walleij __MEM_DEV_DESC(U8500_BOOT_ROM_BASE, SZ_1M), 55cb165c52SRabin Vincent }; 56cb165c52SRabin Vincent 57fcbd458eSMattias Wallin static struct map_desc u8500_ed_io_desc[] __initdata = { 58cb165c52SRabin Vincent __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K), 59cb165c52SRabin Vincent __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K), 60cb165c52SRabin Vincent }; 61cb165c52SRabin Vincent 62fcbd458eSMattias Wallin static struct map_desc u8500_v1_io_desc[] __initdata = { 63cb165c52SRabin Vincent __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 64fcbd458eSMattias Wallin __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE_V1, SZ_4K), 65fcbd458eSMattias Wallin }; 66fcbd458eSMattias Wallin 67fcbd458eSMattias Wallin static struct map_desc u8500_v2_io_desc[] __initdata = { 68fcbd458eSMattias Wallin __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 69cb165c52SRabin Vincent }; 70cb165c52SRabin Vincent 71f946738cSLinus Walleij /* 72f946738cSLinus Walleij * Functions to differentiate between later ASICs 73f946738cSLinus Walleij * We look into the end of the ROM to locate the hardcoded ASIC ID. 74f946738cSLinus Walleij * This is only needed to differentiate between minor revisions and 75f946738cSLinus Walleij * process variants of an ASIC, the major revisions are encoded in 76f946738cSLinus Walleij * the cpuid. 77f946738cSLinus Walleij */ 78f946738cSLinus Walleij #define U8500_ASIC_ID_LOC_ED_V1 (U8500_BOOT_ROM_BASE + 0x1FFF4) 79f946738cSLinus Walleij #define U8500_ASIC_ID_LOC_V2 (U8500_BOOT_ROM_BASE + 0x1DBF4) 80f946738cSLinus Walleij #define U8500_ASIC_REV_ED 0x01 81f946738cSLinus Walleij #define U8500_ASIC_REV_V10 0xA0 82f946738cSLinus Walleij #define U8500_ASIC_REV_V11 0xA1 83f946738cSLinus Walleij #define U8500_ASIC_REV_V20 0xB0 84f946738cSLinus Walleij 85f946738cSLinus Walleij /** 86f946738cSLinus Walleij * struct db8500_asic_id - fields of the ASIC ID 87f946738cSLinus Walleij * @process: the manufacturing process, 0x40 is 40 nm 88f946738cSLinus Walleij * 0x00 is "standard" 89f946738cSLinus Walleij * @partnumber: hithereto 0x8500 for DB8500 90f946738cSLinus Walleij * @revision: version code in the series 91f946738cSLinus Walleij * This field definion is not formally defined but makes 92f946738cSLinus Walleij * sense. 93f946738cSLinus Walleij */ 94f946738cSLinus Walleij struct db8500_asic_id { 95f946738cSLinus Walleij u8 process; 96f946738cSLinus Walleij u16 partnumber; 97f946738cSLinus Walleij u8 revision; 98f946738cSLinus Walleij }; 99f946738cSLinus Walleij 100f946738cSLinus Walleij /* This isn't going to change at runtime */ 101f946738cSLinus Walleij static struct db8500_asic_id db8500_id; 102f946738cSLinus Walleij 103f946738cSLinus Walleij static void __init get_db8500_asic_id(void) 104f946738cSLinus Walleij { 105f946738cSLinus Walleij u32 asicid; 106f946738cSLinus Walleij 107f946738cSLinus Walleij if (cpu_is_u8500v1() || cpu_is_u8500ed()) 108f946738cSLinus Walleij asicid = readl(__io_address(U8500_ASIC_ID_LOC_ED_V1)); 109f946738cSLinus Walleij else if (cpu_is_u8500v2()) 110f946738cSLinus Walleij asicid = readl(__io_address(U8500_ASIC_ID_LOC_V2)); 111f946738cSLinus Walleij else 112f946738cSLinus Walleij BUG(); 113f946738cSLinus Walleij 114f946738cSLinus Walleij db8500_id.process = (asicid >> 24); 115f946738cSLinus Walleij db8500_id.partnumber = (asicid >> 16) & 0xFFFFU; 116f946738cSLinus Walleij db8500_id.revision = asicid & 0xFFU; 117f946738cSLinus Walleij } 118f946738cSLinus Walleij 119f946738cSLinus Walleij bool cpu_is_u8500v10(void) 120f946738cSLinus Walleij { 121f946738cSLinus Walleij return (db8500_id.revision == U8500_ASIC_REV_V10); 122f946738cSLinus Walleij } 123f946738cSLinus Walleij 124f946738cSLinus Walleij bool cpu_is_u8500v11(void) 125f946738cSLinus Walleij { 126f946738cSLinus Walleij return (db8500_id.revision == U8500_ASIC_REV_V11); 127f946738cSLinus Walleij } 128f946738cSLinus Walleij 129f946738cSLinus Walleij bool cpu_is_u8500v20(void) 130f946738cSLinus Walleij { 131f946738cSLinus Walleij return (db8500_id.revision == U8500_ASIC_REV_V20); 132f946738cSLinus Walleij } 133f946738cSLinus Walleij 134cb165c52SRabin Vincent void __init u8500_map_io(void) 135cb165c52SRabin Vincent { 136cb165c52SRabin Vincent iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 137cb165c52SRabin Vincent 138cb165c52SRabin Vincent if (cpu_is_u8500ed()) 139fcbd458eSMattias Wallin iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc)); 140fcbd458eSMattias Wallin else if (cpu_is_u8500v1()) 141fcbd458eSMattias Wallin iotable_init(u8500_v1_io_desc, ARRAY_SIZE(u8500_v1_io_desc)); 142fcbd458eSMattias Wallin else if (cpu_is_u8500v2()) 143fcbd458eSMattias Wallin iotable_init(u8500_v2_io_desc, ARRAY_SIZE(u8500_v2_io_desc)); 144f946738cSLinus Walleij 145f946738cSLinus Walleij /* Read out the ASIC ID as early as we can */ 146f946738cSLinus Walleij get_db8500_asic_id(); 147cb165c52SRabin Vincent } 148cb165c52SRabin Vincent 14901afdd13SRabin Vincent static resource_size_t __initdata db8500_gpio_base[] = { 15001afdd13SRabin Vincent U8500_GPIOBANK0_BASE, 15101afdd13SRabin Vincent U8500_GPIOBANK1_BASE, 15201afdd13SRabin Vincent U8500_GPIOBANK2_BASE, 15301afdd13SRabin Vincent U8500_GPIOBANK3_BASE, 15401afdd13SRabin Vincent U8500_GPIOBANK4_BASE, 15501afdd13SRabin Vincent U8500_GPIOBANK5_BASE, 15601afdd13SRabin Vincent U8500_GPIOBANK6_BASE, 15701afdd13SRabin Vincent U8500_GPIOBANK7_BASE, 15801afdd13SRabin Vincent U8500_GPIOBANK8_BASE, 15901afdd13SRabin Vincent }; 16001afdd13SRabin Vincent 16101afdd13SRabin Vincent static void __init db8500_add_gpios(void) 16201afdd13SRabin Vincent { 16301afdd13SRabin Vincent struct nmk_gpio_platform_data pdata = { 16401afdd13SRabin Vincent /* No custom data yet */ 16501afdd13SRabin Vincent }; 16601afdd13SRabin Vincent 16701afdd13SRabin Vincent dbx500_add_gpios(ARRAY_AND_SIZE(db8500_gpio_base), 16801afdd13SRabin Vincent IRQ_DB8500_GPIO0, &pdata); 16901afdd13SRabin Vincent } 17001afdd13SRabin Vincent 171cb165c52SRabin Vincent /* 172cb165c52SRabin Vincent * This function is called from the board init 173cb165c52SRabin Vincent */ 174cb165c52SRabin Vincent void __init u8500_init_devices(void) 175cb165c52SRabin Vincent { 176f946738cSLinus Walleij /* Display some ASIC boilerplate */ 177f946738cSLinus Walleij pr_info("DB8500: process: %02x, revision ID: 0x%02x\n", 178f946738cSLinus Walleij db8500_id.process, db8500_id.revision); 179f946738cSLinus Walleij if (cpu_is_u8500ed()) 180f946738cSLinus Walleij pr_info("DB8500: Early Drop (ED)\n"); 181f946738cSLinus Walleij else if (cpu_is_u8500v10()) 182f946738cSLinus Walleij pr_info("DB8500: version 1.0\n"); 183f946738cSLinus Walleij else if (cpu_is_u8500v11()) 184f946738cSLinus Walleij pr_info("DB8500: version 1.1\n"); 185f946738cSLinus Walleij else if (cpu_is_u8500v20()) 186f946738cSLinus Walleij pr_info("DB8500: version 2.0\n"); 187f946738cSLinus Walleij else 188f946738cSLinus Walleij pr_warning("ASIC: UNKNOWN SILICON VERSION!\n"); 189f946738cSLinus Walleij 1907b8ddb06SLinus Walleij if (cpu_is_u8500ed()) 1917b8ddb06SLinus Walleij dma40_u8500ed_fixup(); 1927b8ddb06SLinus Walleij 193fbf1eadfSRabin Vincent db8500_add_rtc(); 19401afdd13SRabin Vincent db8500_add_gpios(); 195fbf1eadfSRabin Vincent 1967c1a70e9SMartin Persson platform_device_register_simple("cpufreq-u8500", -1, NULL, 0); 197cb165c52SRabin Vincent platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 198cb165c52SRabin Vincent 199cb165c52SRabin Vincent return ; 200cb165c52SRabin Vincent } 201