xref: /openbmc/linux/arch/arm/mach-ux500/cpu-db8500.c (revision 6f6d6433)
1cb165c52SRabin Vincent /*
2c15def1cSLinus Walleij  * Copyright (C) 2008-2009 ST-Ericsson SA
3cb165c52SRabin Vincent  *
4cb165c52SRabin Vincent  * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5cb165c52SRabin Vincent  *
6cb165c52SRabin Vincent  * This program is free software; you can redistribute it and/or modify
7cb165c52SRabin Vincent  * it under the terms of the GNU General Public License version 2, as
8cb165c52SRabin Vincent  * published by the Free Software Foundation.
9cb165c52SRabin Vincent  *
10cb165c52SRabin Vincent  */
11cb165c52SRabin Vincent #include <linux/types.h>
12cb165c52SRabin Vincent #include <linux/init.h>
13cb165c52SRabin Vincent #include <linux/device.h>
14cb165c52SRabin Vincent #include <linux/amba/bus.h>
15aa90eb9dSRabin Vincent #include <linux/interrupt.h>
16cb165c52SRabin Vincent #include <linux/irq.h>
17cb165c52SRabin Vincent #include <linux/platform_device.h>
18cb165c52SRabin Vincent #include <linux/io.h>
193a8e39c9SLee Jones #include <linux/mfd/abx500/ab8500.h>
20661c6af0SLee Jones #include <linux/mfd/dbx500-prcmu.h>
21fa86a764SLee Jones #include <linux/of.h>
22fa86a764SLee Jones #include <linux/of_platform.h>
23fa86a764SLee Jones #include <linux/regulator/machine.h>
247cb15e10SLinus Walleij #include <linux/platform_data/pinctrl-nomadik.h>
254040d10aSLinus Walleij #include <linux/random.h>
26cb165c52SRabin Vincent 
275caecb44SAxel Lin #include <asm/pmu.h>
28cb165c52SRabin Vincent #include <asm/mach/map.h>
29b8edf848SLinus Torvalds 
30e657bcf6SArnd Bergmann #include "setup.h"
31eba52748SArnd Bergmann #include "irqs.h"
32cb165c52SRabin Vincent 
336f6d6433SLee Jones #include "board-mop500-regulators.h"
34fa86a764SLee Jones #include "board-mop500.h"
356f6d6433SLee Jones #include "db8500-regs.h"
367a4f2609SLinus Walleij #include "id.h"
37fbf1eadfSRabin Vincent 
386f6d6433SLee Jones struct ab8500_platform_data ab8500_platdata = {
396f6d6433SLee Jones 	.irq_base	= MOP500_AB8500_IRQ_BASE,
406f6d6433SLee Jones 	.regulator	= &ab8500_regulator_plat_data,
416f6d6433SLee Jones };
426f6d6433SLee Jones 
436f6d6433SLee Jones struct prcmu_pdata db8500_prcmu_pdata = {
446f6d6433SLee Jones 	.ab_platdata	= &ab8500_platdata,
456f6d6433SLee Jones 	.ab_irq		= IRQ_DB8500_AB8500,
466f6d6433SLee Jones 	.irq_base	= IRQ_PRCMU_BASE,
476f6d6433SLee Jones 	.version_offset	= DB8500_PRCMU_FW_VERSION_OFFSET,
486f6d6433SLee Jones 	.legacy_offset	= DB8500_PRCMU_LEGACY_OFFSET,
496f6d6433SLee Jones };
506f6d6433SLee Jones 
51cb165c52SRabin Vincent /* minimum static i/o mapping required to boot U8500 platforms */
52abf12d71SRabin Vincent static struct map_desc u8500_uart_io_desc[] __initdata = {
5392389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
5492389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
55abf12d71SRabin Vincent };
56bc71c096SLinus Walleij /*  U8500 and U9540 common io_desc */
57bc71c096SLinus Walleij static struct map_desc u8500_common_io_desc[] __initdata = {
58215e83d9SLinus Walleij 	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
59215e83d9SLinus Walleij 	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
6092389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
6192389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
6292389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
6392389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
6492389ca8SRabin Vincent 
6592389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
6692389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
6792389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
6892389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
6992389ca8SRabin Vincent 	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
7092389ca8SRabin Vincent 
71cb165c52SRabin Vincent 	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
72cb165c52SRabin Vincent 	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
73cb165c52SRabin Vincent 	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
74cb165c52SRabin Vincent 	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
75ee9581d7SMichel Jaouen };
76ee9581d7SMichel Jaouen 
77ee9581d7SMichel Jaouen /* U8500 IO map specific description */
78ee9581d7SMichel Jaouen static struct map_desc u8500_io_desc[] __initdata = {
79ee9581d7SMichel Jaouen 	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
80fcbd458eSMattias Wallin 	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
81ee9581d7SMichel Jaouen 
82ee9581d7SMichel Jaouen };
83ee9581d7SMichel Jaouen 
84ee9581d7SMichel Jaouen /* U9540 IO map specific description */
85ee9581d7SMichel Jaouen static struct map_desc u9540_io_desc[] __initdata = {
86ee9581d7SMichel Jaouen 	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
87ee9581d7SMichel Jaouen 	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
88cb165c52SRabin Vincent };
89cb165c52SRabin Vincent 
90cb165c52SRabin Vincent void __init u8500_map_io(void)
91cb165c52SRabin Vincent {
92abf12d71SRabin Vincent 	/*
93abf12d71SRabin Vincent 	 * Map the UARTs early so that the DEBUG_LL stuff continues to work.
94abf12d71SRabin Vincent 	 */
95abf12d71SRabin Vincent 	iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
96abf12d71SRabin Vincent 
97abf12d71SRabin Vincent 	ux500_map_io();
98abf12d71SRabin Vincent 
99bc71c096SLinus Walleij 	iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
100cb165c52SRabin Vincent 
101e1bbb55dSLinus Walleij 	if (cpu_is_ux540_family())
102ee9581d7SMichel Jaouen 		iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
103ee9581d7SMichel Jaouen 	else
104cb165c52SRabin Vincent 		iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
105cb165c52SRabin Vincent }
106cb165c52SRabin Vincent 
107aa90eb9dSRabin Vincent /*
108aa90eb9dSRabin Vincent  * The PMU IRQ lines of two cores are wired together into a single interrupt.
109aa90eb9dSRabin Vincent  * Bounce the interrupt to the other core if it's not ours.
110aa90eb9dSRabin Vincent  */
111aa90eb9dSRabin Vincent static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
112aa90eb9dSRabin Vincent {
113aa90eb9dSRabin Vincent 	irqreturn_t ret = handler(irq, dev);
114aa90eb9dSRabin Vincent 	int other = !smp_processor_id();
115aa90eb9dSRabin Vincent 
116aa90eb9dSRabin Vincent 	if (ret == IRQ_NONE && cpu_online(other))
117aa90eb9dSRabin Vincent 		irq_set_affinity(irq, cpumask_of(other));
118aa90eb9dSRabin Vincent 
119aa90eb9dSRabin Vincent 	/*
120aa90eb9dSRabin Vincent 	 * We should be able to get away with the amount of IRQ_NONEs we give,
121aa90eb9dSRabin Vincent 	 * while still having the spurious IRQ detection code kick in if the
122aa90eb9dSRabin Vincent 	 * interrupt really starts hitting spuriously.
123aa90eb9dSRabin Vincent 	 */
124aa90eb9dSRabin Vincent 	return ret;
125aa90eb9dSRabin Vincent }
126aa90eb9dSRabin Vincent 
1273a8e39c9SLee Jones struct arm_pmu_platdata db8500_pmu_platdata = {
128aa90eb9dSRabin Vincent 	.handle_irq		= db8500_pmu_handler,
129aa90eb9dSRabin Vincent };
130aa90eb9dSRabin Vincent 
131eda413c2SLee Jones static const char *db8500_read_soc_id(void)
132eda413c2SLee Jones {
133eda413c2SLee Jones 	void __iomem *uid = __io_address(U8500_BB_UID_BASE);
134eda413c2SLee Jones 
1354040d10aSLinus Walleij 	/* Throw these device-specific numbers into the entropy pool */
1364040d10aSLinus Walleij 	add_device_randomness(uid, 0x14);
137eda413c2SLee Jones 	return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
13833c8abceSFabio Baltieri 			 readl((u32 *)uid+0),
139eda413c2SLee Jones 			 readl((u32 *)uid+1), readl((u32 *)uid+2),
140eda413c2SLee Jones 			 readl((u32 *)uid+3), readl((u32 *)uid+4));
141eda413c2SLee Jones }
142eda413c2SLee Jones 
143eda413c2SLee Jones static struct device * __init db8500_soc_device_init(void)
144eda413c2SLee Jones {
145eda413c2SLee Jones 	const char *soc_id = db8500_read_soc_id();
146eda413c2SLee Jones 
147eda413c2SLee Jones 	return ux500_soc_device_init(soc_id);
148eda413c2SLee Jones }
149eda413c2SLee Jones 
150fa86a764SLee Jones #ifdef CONFIG_MACH_UX500_DT
151fa86a764SLee Jones static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
152fa86a764SLee Jones 	/* Requires call-back bindings. */
153fa86a764SLee Jones 	OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
154cece5c40SLee Jones 	/* Requires DMA bindings. */
155acab2f6fSLee Jones 	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
156acab2f6fSLee Jones 		       "ux500-msp-i2s.0", &msp0_platform_data),
157acab2f6fSLee Jones 	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
158acab2f6fSLee Jones 		       "ux500-msp-i2s.1", &msp1_platform_data),
159acab2f6fSLee Jones 	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
160acab2f6fSLee Jones 		       "ux500-msp-i2s.2", &msp2_platform_data),
161acab2f6fSLee Jones 	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
162acab2f6fSLee Jones 		       "ux500-msp-i2s.3", &msp3_platform_data),
1631b1d2e83SLee Jones 	/* Requires non-DT:able platform data. */
16405ec260eSLinus Walleij 	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
16505ec260eSLinus Walleij 			&db8500_prcmu_pdata),
166946cc7ddSLee Jones 	OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
167f016d440SLee Jones 	OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
168ef95f7ffSFabio Baltieri 	OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
169ef95f7ffSFabio Baltieri 			NULL),
170fa86a764SLee Jones 	/* Requires device name bindings. */
17179d1d62cSLee Jones 	OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE,
1729fcb4cc2SFabio Baltieri 		"pinctrl-db8500", NULL),
173fa86a764SLee Jones 	{},
174fa86a764SLee Jones };
175fa86a764SLee Jones 
176c21a43b7SLee Jones static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
177c21a43b7SLee Jones 	/* Requires DMA bindings. */
178c21a43b7SLee Jones 	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", NULL),
179c21a43b7SLee Jones 	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL),
180c21a43b7SLee Jones 	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL),
181c21a43b7SLee Jones 	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
182c21a43b7SLee Jones 			&db8500_prcmu_pdata),
183c21a43b7SLee Jones 	{},
184c21a43b7SLee Jones };
185c21a43b7SLee Jones 
186fa86a764SLee Jones static const struct of_device_id u8500_local_bus_nodes[] = {
187fa86a764SLee Jones 	/* only create devices below soc node */
188fa86a764SLee Jones 	{ .compatible = "stericsson,db8500", },
189fa86a764SLee Jones 	{ .compatible = "stericsson,db8500-prcmu", },
190fa86a764SLee Jones 	{ .compatible = "simple-bus"},
191fa86a764SLee Jones 	{ },
192fa86a764SLee Jones };
193fa86a764SLee Jones 
194fa86a764SLee Jones static void __init u8500_init_machine(void)
195fa86a764SLee Jones {
1961e74043aSLee Jones 	struct device *parent = db8500_soc_device_init();
197fa86a764SLee Jones 
198fa86a764SLee Jones 	/* Pinmaps must be in place before devices register */
199fa86a764SLee Jones 	if (of_machine_is_compatible("st-ericsson,mop500"))
200fa86a764SLee Jones 		mop500_pinmaps_init();
201265c3c0aSLee Jones 	else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
202fa86a764SLee Jones 		snowball_pinmaps_init();
203265c3c0aSLee Jones 	} else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
204fa86a764SLee Jones 		hrefv60_pinmaps_init();
20558e5b9e3SLee Jones 	else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
20658e5b9e3SLee Jones 		/* TODO: Add pinmaps for ccu9540 board. */
207fa86a764SLee Jones 
208c21a43b7SLee Jones 	/* automatically probe child nodes of dbx5x0 devices */
209c21a43b7SLee Jones 	if (of_machine_is_compatible("st-ericsson,u8540"))
210c21a43b7SLee Jones 		of_platform_populate(NULL, u8500_local_bus_nodes,
211c21a43b7SLee Jones 				     u8540_auxdata_lookup, parent);
212c21a43b7SLee Jones 	else
213c21a43b7SLee Jones 		of_platform_populate(NULL, u8500_local_bus_nodes,
214c21a43b7SLee Jones 				     u8500_auxdata_lookup, parent);
215fa86a764SLee Jones }
216fa86a764SLee Jones 
21779b40753SLee Jones static const char * stericsson_dt_platform_compat[] = {
21879b40753SLee Jones 	"st-ericsson,u8500",
21979b40753SLee Jones 	"st-ericsson,u8540",
22079b40753SLee Jones 	"st-ericsson,u9500",
22179b40753SLee Jones 	"st-ericsson,u9540",
222fa86a764SLee Jones 	NULL,
223fa86a764SLee Jones };
224fa86a764SLee Jones 
22546c1bf81SLee Jones DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
226f44c5fd1SLee Jones 	.smp            = smp_ops(ux500_smp_ops),
227fa86a764SLee Jones 	.map_io		= u8500_map_io,
228fa86a764SLee Jones 	.init_irq	= ux500_init_irq,
229fa86a764SLee Jones 	/* we re-use nomadik timer here */
2306bb27d73SStephen Warren 	.init_time	= ux500_timer_init,
231fa86a764SLee Jones 	.init_machine	= u8500_init_machine,
23274a1c9abSLee Jones 	.init_late	= NULL,
23379b40753SLee Jones 	.dt_compat      = stericsson_dt_platform_compat,
234bd93ec50SFabio Baltieri 	.restart        = ux500_restart,
235fa86a764SLee Jones MACHINE_END
236fa86a764SLee Jones 
237fa86a764SLee Jones #endif
238