1cb165c52SRabin Vincent /* 2c15def1cSLinus Walleij * Copyright (C) 2008-2009 ST-Ericsson SA 3cb165c52SRabin Vincent * 4cb165c52SRabin Vincent * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5cb165c52SRabin Vincent * 6cb165c52SRabin Vincent * This program is free software; you can redistribute it and/or modify 7cb165c52SRabin Vincent * it under the terms of the GNU General Public License version 2, as 8cb165c52SRabin Vincent * published by the Free Software Foundation. 9cb165c52SRabin Vincent * 10cb165c52SRabin Vincent */ 11cb165c52SRabin Vincent #include <linux/types.h> 12cb165c52SRabin Vincent #include <linux/init.h> 13cb165c52SRabin Vincent #include <linux/device.h> 14cb165c52SRabin Vincent #include <linux/amba/bus.h> 15aa90eb9dSRabin Vincent #include <linux/interrupt.h> 16cb165c52SRabin Vincent #include <linux/irq.h> 17cb165c52SRabin Vincent #include <linux/platform_device.h> 18cb165c52SRabin Vincent #include <linux/io.h> 193a8e39c9SLee Jones #include <linux/mfd/abx500/ab8500.h> 20661c6af0SLee Jones #include <linux/mfd/dbx500-prcmu.h> 21fa86a764SLee Jones #include <linux/of.h> 22fa86a764SLee Jones #include <linux/of_platform.h> 23fa86a764SLee Jones #include <linux/regulator/machine.h> 247cb15e10SLinus Walleij #include <linux/platform_data/pinctrl-nomadik.h> 254040d10aSLinus Walleij #include <linux/random.h> 26cb165c52SRabin Vincent 275caecb44SAxel Lin #include <asm/pmu.h> 28cb165c52SRabin Vincent #include <asm/mach/map.h> 29fa86a764SLee Jones #include <asm/mach/arch.h> 30b8edf848SLinus Torvalds 31e657bcf6SArnd Bergmann #include "setup.h" 32e657bcf6SArnd Bergmann #include "devices.h" 33eba52748SArnd Bergmann #include "irqs.h" 34cb165c52SRabin Vincent 35fbf1eadfSRabin Vincent #include "devices-db8500.h" 366f3f3c3fSMian Yousaf Kaukab #include "ste-dma40-db8500.h" 37174e7796SLinus Walleij #include "db8500-regs.h" 38fa86a764SLee Jones #include "board-mop500.h" 397a4f2609SLinus Walleij #include "id.h" 40fbf1eadfSRabin Vincent 41cb165c52SRabin Vincent /* minimum static i/o mapping required to boot U8500 platforms */ 42abf12d71SRabin Vincent static struct map_desc u8500_uart_io_desc[] __initdata = { 4392389ca8SRabin Vincent __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), 4492389ca8SRabin Vincent __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), 45abf12d71SRabin Vincent }; 46bc71c096SLinus Walleij /* U8500 and U9540 common io_desc */ 47bc71c096SLinus Walleij static struct map_desc u8500_common_io_desc[] __initdata = { 48215e83d9SLinus Walleij /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ 49215e83d9SLinus Walleij __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), 5092389ca8SRabin Vincent __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), 5192389ca8SRabin Vincent __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), 5292389ca8SRabin Vincent __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 5392389ca8SRabin Vincent __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), 5492389ca8SRabin Vincent 5592389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), 5692389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K), 5792389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K), 5892389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K), 5992389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K), 6092389ca8SRabin Vincent 61cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), 62cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 63cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 64cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 65ee9581d7SMichel Jaouen }; 66ee9581d7SMichel Jaouen 67ee9581d7SMichel Jaouen /* U8500 IO map specific description */ 68ee9581d7SMichel Jaouen static struct map_desc u8500_io_desc[] __initdata = { 69ee9581d7SMichel Jaouen __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), 70fcbd458eSMattias Wallin __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 71ee9581d7SMichel Jaouen 72ee9581d7SMichel Jaouen }; 73ee9581d7SMichel Jaouen 74ee9581d7SMichel Jaouen /* U9540 IO map specific description */ 75ee9581d7SMichel Jaouen static struct map_desc u9540_io_desc[] __initdata = { 76ee9581d7SMichel Jaouen __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K), 77ee9581d7SMichel Jaouen __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K), 78cb165c52SRabin Vincent }; 79cb165c52SRabin Vincent 80cb165c52SRabin Vincent void __init u8500_map_io(void) 81cb165c52SRabin Vincent { 82abf12d71SRabin Vincent /* 83abf12d71SRabin Vincent * Map the UARTs early so that the DEBUG_LL stuff continues to work. 84abf12d71SRabin Vincent */ 85abf12d71SRabin Vincent iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); 86abf12d71SRabin Vincent 87abf12d71SRabin Vincent ux500_map_io(); 88abf12d71SRabin Vincent 89bc71c096SLinus Walleij iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc)); 90cb165c52SRabin Vincent 91e1bbb55dSLinus Walleij if (cpu_is_ux540_family()) 92ee9581d7SMichel Jaouen iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); 93ee9581d7SMichel Jaouen else 94cb165c52SRabin Vincent iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 95cb165c52SRabin Vincent } 96cb165c52SRabin Vincent 97aa90eb9dSRabin Vincent static struct resource db8500_pmu_resources[] = { 98aa90eb9dSRabin Vincent [0] = { 99aa90eb9dSRabin Vincent .start = IRQ_DB8500_PMU, 100aa90eb9dSRabin Vincent .end = IRQ_DB8500_PMU, 101aa90eb9dSRabin Vincent .flags = IORESOURCE_IRQ, 102aa90eb9dSRabin Vincent }, 103aa90eb9dSRabin Vincent }; 104aa90eb9dSRabin Vincent 105aa90eb9dSRabin Vincent /* 106aa90eb9dSRabin Vincent * The PMU IRQ lines of two cores are wired together into a single interrupt. 107aa90eb9dSRabin Vincent * Bounce the interrupt to the other core if it's not ours. 108aa90eb9dSRabin Vincent */ 109aa90eb9dSRabin Vincent static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler) 110aa90eb9dSRabin Vincent { 111aa90eb9dSRabin Vincent irqreturn_t ret = handler(irq, dev); 112aa90eb9dSRabin Vincent int other = !smp_processor_id(); 113aa90eb9dSRabin Vincent 114aa90eb9dSRabin Vincent if (ret == IRQ_NONE && cpu_online(other)) 115aa90eb9dSRabin Vincent irq_set_affinity(irq, cpumask_of(other)); 116aa90eb9dSRabin Vincent 117aa90eb9dSRabin Vincent /* 118aa90eb9dSRabin Vincent * We should be able to get away with the amount of IRQ_NONEs we give, 119aa90eb9dSRabin Vincent * while still having the spurious IRQ detection code kick in if the 120aa90eb9dSRabin Vincent * interrupt really starts hitting spuriously. 121aa90eb9dSRabin Vincent */ 122aa90eb9dSRabin Vincent return ret; 123aa90eb9dSRabin Vincent } 124aa90eb9dSRabin Vincent 1253a8e39c9SLee Jones struct arm_pmu_platdata db8500_pmu_platdata = { 126aa90eb9dSRabin Vincent .handle_irq = db8500_pmu_handler, 127aa90eb9dSRabin Vincent }; 128aa90eb9dSRabin Vincent 129aa90eb9dSRabin Vincent static struct platform_device db8500_pmu_device = { 130aa90eb9dSRabin Vincent .name = "arm-pmu", 131df3d17e0SSudeep KarkadaNagesha .id = -1, 132aa90eb9dSRabin Vincent .num_resources = ARRAY_SIZE(db8500_pmu_resources), 133aa90eb9dSRabin Vincent .resource = db8500_pmu_resources, 134aa90eb9dSRabin Vincent .dev.platform_data = &db8500_pmu_platdata, 135aa90eb9dSRabin Vincent }; 136aa90eb9dSRabin Vincent 137aa90eb9dSRabin Vincent static struct platform_device *platform_devs[] __initdata = { 138aa90eb9dSRabin Vincent &u8500_dma40_device, 139aa90eb9dSRabin Vincent &db8500_pmu_device, 140aa90eb9dSRabin Vincent }; 141aa90eb9dSRabin Vincent 14201afdd13SRabin Vincent static resource_size_t __initdata db8500_gpio_base[] = { 14301afdd13SRabin Vincent U8500_GPIOBANK0_BASE, 14401afdd13SRabin Vincent U8500_GPIOBANK1_BASE, 14501afdd13SRabin Vincent U8500_GPIOBANK2_BASE, 14601afdd13SRabin Vincent U8500_GPIOBANK3_BASE, 14701afdd13SRabin Vincent U8500_GPIOBANK4_BASE, 14801afdd13SRabin Vincent U8500_GPIOBANK5_BASE, 14901afdd13SRabin Vincent U8500_GPIOBANK6_BASE, 15001afdd13SRabin Vincent U8500_GPIOBANK7_BASE, 15101afdd13SRabin Vincent U8500_GPIOBANK8_BASE, 15201afdd13SRabin Vincent }; 15301afdd13SRabin Vincent 15418403424SLee Jones static void __init db8500_add_gpios(struct device *parent) 15501afdd13SRabin Vincent { 15601afdd13SRabin Vincent struct nmk_gpio_platform_data pdata = { 157c15def1cSLinus Walleij .supports_sleepmode = true, 15801afdd13SRabin Vincent }; 15901afdd13SRabin Vincent 16018403424SLee Jones dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base), 16101afdd13SRabin Vincent IRQ_DB8500_GPIO0, &pdata); 162f4828336SJonas Aaberg dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE); 16301afdd13SRabin Vincent } 16401afdd13SRabin Vincent 1656f3f3c3fSMian Yousaf Kaukab static int usb_db8500_rx_dma_cfg[] = { 1666f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV38_USB_OTG_IEP_1_9, 1676f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV37_USB_OTG_IEP_2_10, 1686f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV36_USB_OTG_IEP_3_11, 1696f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV19_USB_OTG_IEP_4_12, 1706f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV18_USB_OTG_IEP_5_13, 1716f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV17_USB_OTG_IEP_6_14, 1726f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV16_USB_OTG_IEP_7_15, 1736f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV39_USB_OTG_IEP_8 1746f3f3c3fSMian Yousaf Kaukab }; 1756f3f3c3fSMian Yousaf Kaukab 1766f3f3c3fSMian Yousaf Kaukab static int usb_db8500_tx_dma_cfg[] = { 1776f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV38_USB_OTG_OEP_1_9, 1786f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV37_USB_OTG_OEP_2_10, 1796f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV36_USB_OTG_OEP_3_11, 1806f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV19_USB_OTG_OEP_4_12, 1816f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV18_USB_OTG_OEP_5_13, 1826f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV17_USB_OTG_OEP_6_14, 1836f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV16_USB_OTG_OEP_7_15, 1846f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV39_USB_OTG_OEP_8 1856f3f3c3fSMian Yousaf Kaukab }; 1866f3f3c3fSMian Yousaf Kaukab 187eda413c2SLee Jones static const char *db8500_read_soc_id(void) 188eda413c2SLee Jones { 189eda413c2SLee Jones void __iomem *uid = __io_address(U8500_BB_UID_BASE); 190eda413c2SLee Jones 1914040d10aSLinus Walleij /* Throw these device-specific numbers into the entropy pool */ 1924040d10aSLinus Walleij add_device_randomness(uid, 0x14); 193eda413c2SLee Jones return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x", 19433c8abceSFabio Baltieri readl((u32 *)uid+0), 195eda413c2SLee Jones readl((u32 *)uid+1), readl((u32 *)uid+2), 196eda413c2SLee Jones readl((u32 *)uid+3), readl((u32 *)uid+4)); 197eda413c2SLee Jones } 198eda413c2SLee Jones 199eda413c2SLee Jones static struct device * __init db8500_soc_device_init(void) 200eda413c2SLee Jones { 201eda413c2SLee Jones const char *soc_id = db8500_read_soc_id(); 202eda413c2SLee Jones 203eda413c2SLee Jones return ux500_soc_device_init(soc_id); 204eda413c2SLee Jones } 205eda413c2SLee Jones 206cb165c52SRabin Vincent /* 207cb165c52SRabin Vincent * This function is called from the board init 208cb165c52SRabin Vincent */ 2093210c053SLee Jones struct device * __init u8500_init_devices(void) 210cb165c52SRabin Vincent { 211eda413c2SLee Jones struct device *parent; 212b024a0c8SLee Jones int i; 213eda413c2SLee Jones 214eda413c2SLee Jones parent = db8500_soc_device_init(); 215eda413c2SLee Jones 216eda413c2SLee Jones db8500_add_rtc(parent); 217eda413c2SLee Jones db8500_add_gpios(parent); 218eda413c2SLee Jones db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 219fbf1eadfSRabin Vincent 220f65c1982SLee Jones for (i = 0; i < ARRAY_SIZE(platform_devs); i++) 221f65c1982SLee Jones platform_devs[i]->dev.parent = parent; 222f65c1982SLee Jones 223f65c1982SLee Jones platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 224f65c1982SLee Jones 225f65c1982SLee Jones return parent; 226f65c1982SLee Jones } 227f65c1982SLee Jones 228fa86a764SLee Jones #ifdef CONFIG_MACH_UX500_DT 229f65c1982SLee Jones 230fa86a764SLee Jones /* TODO: Once all pieces are DT:ed, remove completely. */ 231fa86a764SLee Jones static struct device * __init u8500_of_init_devices(void) 232fa86a764SLee Jones { 233fa86a764SLee Jones struct device *parent = db8500_soc_device_init(); 234f65c1982SLee Jones 235f65c1982SLee Jones db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 236f65c1982SLee Jones 23738cd8c5dSLee Jones u8500_dma40_device.dev.parent = parent; 238b024a0c8SLee Jones 23908d05026SLee Jones /* 24008d05026SLee Jones * Devices to be DT:ed: 24108d05026SLee Jones * u8500_dma40_device = todo 242da384870SLee Jones * db8500_pmu_device = done 243dee42ebeSLee Jones * db8500_prcmu_device = done 24408d05026SLee Jones */ 24538cd8c5dSLee Jones platform_device_register(&u8500_dma40_device); 246cb165c52SRabin Vincent 247eda413c2SLee Jones return parent; 248cb165c52SRabin Vincent } 249fa86a764SLee Jones 250fa86a764SLee Jones static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 251fa86a764SLee Jones /* Requires call-back bindings. */ 252fa86a764SLee Jones OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 253cece5c40SLee Jones /* Requires DMA bindings. */ 254fa86a764SLee Jones OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), 255fa86a764SLee Jones OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), 256fa86a764SLee Jones OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), 257fa86a764SLee Jones OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), 258fa86a764SLee Jones OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data), 259fa86a764SLee Jones OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data), 260fa86a764SLee Jones OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data), 261fa86a764SLee Jones OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data), 262fa86a764SLee Jones /* Requires clock name bindings. */ 263fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL), 264fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL), 265fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL), 266fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL), 267fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL), 268fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL), 269fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL), 270fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL), 271fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL), 272fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL), 273fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL), 274fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL), 275fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), 276fa86a764SLee Jones OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), 27705ec260eSLinus Walleij OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", 27805ec260eSLinus Walleij &db8500_prcmu_pdata), 279c28f8004SLee Jones OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x", NULL), 280fa86a764SLee Jones /* Requires device name bindings. */ 281e32af889SGabriel Fernandez OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE, 2829fcb4cc2SFabio Baltieri "pinctrl-db8500", NULL), 283fa86a764SLee Jones /* Requires clock name and DMA bindings. */ 284fa86a764SLee Jones OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, 285fa86a764SLee Jones "ux500-msp-i2s.0", &msp0_platform_data), 286fa86a764SLee Jones OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, 287fa86a764SLee Jones "ux500-msp-i2s.1", &msp1_platform_data), 288fa86a764SLee Jones OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000, 289fa86a764SLee Jones "ux500-msp-i2s.2", &msp2_platform_data), 290fa86a764SLee Jones OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000, 291fa86a764SLee Jones "ux500-msp-i2s.3", &msp3_platform_data), 292fa86a764SLee Jones {}, 293fa86a764SLee Jones }; 294fa86a764SLee Jones 295fa86a764SLee Jones static const struct of_device_id u8500_local_bus_nodes[] = { 296fa86a764SLee Jones /* only create devices below soc node */ 297fa86a764SLee Jones { .compatible = "stericsson,db8500", }, 298fa86a764SLee Jones { .compatible = "stericsson,db8500-prcmu", }, 299fa86a764SLee Jones { .compatible = "simple-bus"}, 300fa86a764SLee Jones { }, 301fa86a764SLee Jones }; 302fa86a764SLee Jones 303fa86a764SLee Jones static void __init u8500_init_machine(void) 304fa86a764SLee Jones { 305fa86a764SLee Jones struct device *parent = NULL; 306fa86a764SLee Jones 307fa86a764SLee Jones /* Pinmaps must be in place before devices register */ 308fa86a764SLee Jones if (of_machine_is_compatible("st-ericsson,mop500")) 309fa86a764SLee Jones mop500_pinmaps_init(); 310265c3c0aSLee Jones else if (of_machine_is_compatible("calaosystems,snowball-a9500")) { 311fa86a764SLee Jones snowball_pinmaps_init(); 312265c3c0aSLee Jones mop500_snowball_ethernet_clock_enable(); 313265c3c0aSLee Jones } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) 314fa86a764SLee Jones hrefv60_pinmaps_init(); 31558e5b9e3SLee Jones else if (of_machine_is_compatible("st-ericsson,ccu9540")) {} 31658e5b9e3SLee Jones /* TODO: Add pinmaps for ccu9540 board. */ 317fa86a764SLee Jones 318fa86a764SLee Jones /* TODO: Export SoC, USB, cpu-freq and DMA40 */ 319fa86a764SLee Jones parent = u8500_of_init_devices(); 320fa86a764SLee Jones 321fa86a764SLee Jones /* automatically probe child nodes of db8500 device */ 322fa86a764SLee Jones of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent); 323fa86a764SLee Jones } 324fa86a764SLee Jones 32579b40753SLee Jones static const char * stericsson_dt_platform_compat[] = { 32679b40753SLee Jones "st-ericsson,u8500", 32779b40753SLee Jones "st-ericsson,u8540", 32879b40753SLee Jones "st-ericsson,u9500", 32979b40753SLee Jones "st-ericsson,u9540", 330fa86a764SLee Jones NULL, 331fa86a764SLee Jones }; 332fa86a764SLee Jones 33346c1bf81SLee Jones DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)") 334f44c5fd1SLee Jones .smp = smp_ops(ux500_smp_ops), 335fa86a764SLee Jones .map_io = u8500_map_io, 336fa86a764SLee Jones .init_irq = ux500_init_irq, 337fa86a764SLee Jones /* we re-use nomadik timer here */ 3386bb27d73SStephen Warren .init_time = ux500_timer_init, 339fa86a764SLee Jones .init_machine = u8500_init_machine, 34074a1c9abSLee Jones .init_late = NULL, 34179b40753SLee Jones .dt_compat = stericsson_dt_platform_compat, 342fa86a764SLee Jones MACHINE_END 343fa86a764SLee Jones 344fa86a764SLee Jones #endif 345