1cb165c52SRabin Vincent /* 2cb165c52SRabin Vincent * Copyright (C) 2008-2009 ST-Ericsson 3cb165c52SRabin Vincent * 4cb165c52SRabin Vincent * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5cb165c52SRabin Vincent * 6cb165c52SRabin Vincent * This program is free software; you can redistribute it and/or modify 7cb165c52SRabin Vincent * it under the terms of the GNU General Public License version 2, as 8cb165c52SRabin Vincent * published by the Free Software Foundation. 9cb165c52SRabin Vincent * 10cb165c52SRabin Vincent */ 11cb165c52SRabin Vincent #include <linux/types.h> 12cb165c52SRabin Vincent #include <linux/init.h> 13cb165c52SRabin Vincent #include <linux/device.h> 14cb165c52SRabin Vincent #include <linux/amba/bus.h> 15aa90eb9dSRabin Vincent #include <linux/interrupt.h> 16cb165c52SRabin Vincent #include <linux/irq.h> 17cb165c52SRabin Vincent #include <linux/platform_device.h> 18cb165c52SRabin Vincent #include <linux/io.h> 19cb165c52SRabin Vincent 20cb165c52SRabin Vincent #include <asm/mach/map.h> 21aa90eb9dSRabin Vincent #include <asm/pmu.h> 220f332861SLinus Walleij #include <plat/gpio-nomadik.h> 23cb165c52SRabin Vincent #include <mach/hardware.h> 24cb165c52SRabin Vincent #include <mach/setup.h> 25cb165c52SRabin Vincent #include <mach/devices.h> 266f3f3c3fSMian Yousaf Kaukab #include <mach/usb.h> 27cb165c52SRabin Vincent 28fbf1eadfSRabin Vincent #include "devices-db8500.h" 296f3f3c3fSMian Yousaf Kaukab #include "ste-dma40-db8500.h" 30fbf1eadfSRabin Vincent 31cb165c52SRabin Vincent /* minimum static i/o mapping required to boot U8500 platforms */ 32abf12d71SRabin Vincent static struct map_desc u8500_uart_io_desc[] __initdata = { 3392389ca8SRabin Vincent __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), 3492389ca8SRabin Vincent __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), 35abf12d71SRabin Vincent }; 36abf12d71SRabin Vincent 37abf12d71SRabin Vincent static struct map_desc u8500_io_desc[] __initdata = { 38215e83d9SLinus Walleij /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ 39215e83d9SLinus Walleij __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), 4092389ca8SRabin Vincent __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), 4192389ca8SRabin Vincent __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), 4292389ca8SRabin Vincent __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 4392389ca8SRabin Vincent __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), 4492389ca8SRabin Vincent 4592389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), 4692389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K), 4792389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K), 4892389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K), 4992389ca8SRabin Vincent __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K), 5092389ca8SRabin Vincent 51cb165c52SRabin Vincent __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), 52cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), 53cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 54cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 55cb165c52SRabin Vincent __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 56cb165c52SRabin Vincent }; 57cb165c52SRabin Vincent 58fcbd458eSMattias Wallin static struct map_desc u8500_ed_io_desc[] __initdata = { 59cb165c52SRabin Vincent __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K), 60cb165c52SRabin Vincent __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K), 61cb165c52SRabin Vincent }; 62cb165c52SRabin Vincent 63fcbd458eSMattias Wallin static struct map_desc u8500_v1_io_desc[] __initdata = { 64cb165c52SRabin Vincent __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 65fcbd458eSMattias Wallin __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE_V1, SZ_4K), 66fcbd458eSMattias Wallin }; 67fcbd458eSMattias Wallin 68fcbd458eSMattias Wallin static struct map_desc u8500_v2_io_desc[] __initdata = { 69fcbd458eSMattias Wallin __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 70cb165c52SRabin Vincent }; 71cb165c52SRabin Vincent 72cb165c52SRabin Vincent void __init u8500_map_io(void) 73cb165c52SRabin Vincent { 74abf12d71SRabin Vincent /* 75abf12d71SRabin Vincent * Map the UARTs early so that the DEBUG_LL stuff continues to work. 76abf12d71SRabin Vincent */ 77abf12d71SRabin Vincent iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); 78abf12d71SRabin Vincent 79abf12d71SRabin Vincent ux500_map_io(); 80abf12d71SRabin Vincent 81cb165c52SRabin Vincent iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 82cb165c52SRabin Vincent 83cb165c52SRabin Vincent if (cpu_is_u8500ed()) 84fcbd458eSMattias Wallin iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc)); 85fcbd458eSMattias Wallin else if (cpu_is_u8500v1()) 86fcbd458eSMattias Wallin iotable_init(u8500_v1_io_desc, ARRAY_SIZE(u8500_v1_io_desc)); 87fcbd458eSMattias Wallin else if (cpu_is_u8500v2()) 88fcbd458eSMattias Wallin iotable_init(u8500_v2_io_desc, ARRAY_SIZE(u8500_v2_io_desc)); 8911871890SLinus Walleij 9011871890SLinus Walleij _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); 91cb165c52SRabin Vincent } 92cb165c52SRabin Vincent 93aa90eb9dSRabin Vincent static struct resource db8500_pmu_resources[] = { 94aa90eb9dSRabin Vincent [0] = { 95aa90eb9dSRabin Vincent .start = IRQ_DB8500_PMU, 96aa90eb9dSRabin Vincent .end = IRQ_DB8500_PMU, 97aa90eb9dSRabin Vincent .flags = IORESOURCE_IRQ, 98aa90eb9dSRabin Vincent }, 99aa90eb9dSRabin Vincent }; 100aa90eb9dSRabin Vincent 101aa90eb9dSRabin Vincent /* 102aa90eb9dSRabin Vincent * The PMU IRQ lines of two cores are wired together into a single interrupt. 103aa90eb9dSRabin Vincent * Bounce the interrupt to the other core if it's not ours. 104aa90eb9dSRabin Vincent */ 105aa90eb9dSRabin Vincent static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler) 106aa90eb9dSRabin Vincent { 107aa90eb9dSRabin Vincent irqreturn_t ret = handler(irq, dev); 108aa90eb9dSRabin Vincent int other = !smp_processor_id(); 109aa90eb9dSRabin Vincent 110aa90eb9dSRabin Vincent if (ret == IRQ_NONE && cpu_online(other)) 111aa90eb9dSRabin Vincent irq_set_affinity(irq, cpumask_of(other)); 112aa90eb9dSRabin Vincent 113aa90eb9dSRabin Vincent /* 114aa90eb9dSRabin Vincent * We should be able to get away with the amount of IRQ_NONEs we give, 115aa90eb9dSRabin Vincent * while still having the spurious IRQ detection code kick in if the 116aa90eb9dSRabin Vincent * interrupt really starts hitting spuriously. 117aa90eb9dSRabin Vincent */ 118aa90eb9dSRabin Vincent return ret; 119aa90eb9dSRabin Vincent } 120aa90eb9dSRabin Vincent 121aa90eb9dSRabin Vincent static struct arm_pmu_platdata db8500_pmu_platdata = { 122aa90eb9dSRabin Vincent .handle_irq = db8500_pmu_handler, 123aa90eb9dSRabin Vincent }; 124aa90eb9dSRabin Vincent 125aa90eb9dSRabin Vincent static struct platform_device db8500_pmu_device = { 126aa90eb9dSRabin Vincent .name = "arm-pmu", 127aa90eb9dSRabin Vincent .id = ARM_PMU_DEVICE_CPU, 128aa90eb9dSRabin Vincent .num_resources = ARRAY_SIZE(db8500_pmu_resources), 129aa90eb9dSRabin Vincent .resource = db8500_pmu_resources, 130aa90eb9dSRabin Vincent .dev.platform_data = &db8500_pmu_platdata, 131aa90eb9dSRabin Vincent }; 132aa90eb9dSRabin Vincent 1333df57bcfSMattias Nilsson static struct platform_device db8500_prcmu_device = { 1343df57bcfSMattias Nilsson .name = "db8500-prcmu", 1353df57bcfSMattias Nilsson }; 1363df57bcfSMattias Nilsson 137aa90eb9dSRabin Vincent static struct platform_device *platform_devs[] __initdata = { 138aa90eb9dSRabin Vincent &u8500_dma40_device, 139aa90eb9dSRabin Vincent &db8500_pmu_device, 1403df57bcfSMattias Nilsson &db8500_prcmu_device, 141aa90eb9dSRabin Vincent }; 142aa90eb9dSRabin Vincent 14301afdd13SRabin Vincent static resource_size_t __initdata db8500_gpio_base[] = { 14401afdd13SRabin Vincent U8500_GPIOBANK0_BASE, 14501afdd13SRabin Vincent U8500_GPIOBANK1_BASE, 14601afdd13SRabin Vincent U8500_GPIOBANK2_BASE, 14701afdd13SRabin Vincent U8500_GPIOBANK3_BASE, 14801afdd13SRabin Vincent U8500_GPIOBANK4_BASE, 14901afdd13SRabin Vincent U8500_GPIOBANK5_BASE, 15001afdd13SRabin Vincent U8500_GPIOBANK6_BASE, 15101afdd13SRabin Vincent U8500_GPIOBANK7_BASE, 15201afdd13SRabin Vincent U8500_GPIOBANK8_BASE, 15301afdd13SRabin Vincent }; 15401afdd13SRabin Vincent 15501afdd13SRabin Vincent static void __init db8500_add_gpios(void) 15601afdd13SRabin Vincent { 15701afdd13SRabin Vincent struct nmk_gpio_platform_data pdata = { 15801afdd13SRabin Vincent /* No custom data yet */ 15901afdd13SRabin Vincent }; 16001afdd13SRabin Vincent 16133d78647SLinus Walleij if (cpu_is_u8500v2()) 16233d78647SLinus Walleij pdata.supports_sleepmode = true; 16333d78647SLinus Walleij 16401afdd13SRabin Vincent dbx500_add_gpios(ARRAY_AND_SIZE(db8500_gpio_base), 16501afdd13SRabin Vincent IRQ_DB8500_GPIO0, &pdata); 16601afdd13SRabin Vincent } 16701afdd13SRabin Vincent 1686f3f3c3fSMian Yousaf Kaukab static int usb_db8500_rx_dma_cfg[] = { 1696f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV38_USB_OTG_IEP_1_9, 1706f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV37_USB_OTG_IEP_2_10, 1716f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV36_USB_OTG_IEP_3_11, 1726f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV19_USB_OTG_IEP_4_12, 1736f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV18_USB_OTG_IEP_5_13, 1746f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV17_USB_OTG_IEP_6_14, 1756f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV16_USB_OTG_IEP_7_15, 1766f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV39_USB_OTG_IEP_8 1776f3f3c3fSMian Yousaf Kaukab }; 1786f3f3c3fSMian Yousaf Kaukab 1796f3f3c3fSMian Yousaf Kaukab static int usb_db8500_tx_dma_cfg[] = { 1806f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV38_USB_OTG_OEP_1_9, 1816f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV37_USB_OTG_OEP_2_10, 1826f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV36_USB_OTG_OEP_3_11, 1836f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV19_USB_OTG_OEP_4_12, 1846f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV18_USB_OTG_OEP_5_13, 1856f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV17_USB_OTG_OEP_6_14, 1866f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV16_USB_OTG_OEP_7_15, 1876f3f3c3fSMian Yousaf Kaukab DB8500_DMA_DEV39_USB_OTG_OEP_8 1886f3f3c3fSMian Yousaf Kaukab }; 1896f3f3c3fSMian Yousaf Kaukab 190cb165c52SRabin Vincent /* 191cb165c52SRabin Vincent * This function is called from the board init 192cb165c52SRabin Vincent */ 193cb165c52SRabin Vincent void __init u8500_init_devices(void) 194cb165c52SRabin Vincent { 1957b8ddb06SLinus Walleij if (cpu_is_u8500ed()) 1967b8ddb06SLinus Walleij dma40_u8500ed_fixup(); 1977b8ddb06SLinus Walleij 198fbf1eadfSRabin Vincent db8500_add_rtc(); 19901afdd13SRabin Vincent db8500_add_gpios(); 2006f3f3c3fSMian Yousaf Kaukab db8500_add_usb(usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 201fbf1eadfSRabin Vincent 2027c1a70e9SMartin Persson platform_device_register_simple("cpufreq-u8500", -1, NULL, 0); 203cb165c52SRabin Vincent platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 204cb165c52SRabin Vincent 205cb165c52SRabin Vincent return ; 206cb165c52SRabin Vincent } 207