xref: /openbmc/linux/arch/arm/mach-tegra/tegra.c (revision f7777dcc)
1 /*
2  * NVIDIA Tegra SoC device tree board support
3  *
4  * Copyright (C) 2011, 2013, NVIDIA Corporation
5  * Copyright (C) 2010 Secret Lab Technologies, Ltd.
6  * Copyright (C) 2010 Google, Inc.
7  *
8  * This software is licensed under the terms of the GNU General Public
9  * License version 2, as published by the Free Software Foundation, and
10  * may be copied, distributed, and modified under those terms.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18 
19 #include <linux/clocksource.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/serial_8250.h>
24 #include <linux/clk.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/irqdomain.h>
27 #include <linux/of.h>
28 #include <linux/of_address.h>
29 #include <linux/of_fdt.h>
30 #include <linux/of_platform.h>
31 #include <linux/pda_power.h>
32 #include <linux/io.h>
33 #include <linux/slab.h>
34 #include <linux/sys_soc.h>
35 #include <linux/usb/tegra_usb_phy.h>
36 #include <linux/clk/tegra.h>
37 
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/time.h>
41 #include <asm/setup.h>
42 
43 #include "board.h"
44 #include "common.h"
45 #include "fuse.h"
46 #include "iomap.h"
47 
48 static void __init tegra_dt_init(void)
49 {
50 	struct soc_device_attribute *soc_dev_attr;
51 	struct soc_device *soc_dev;
52 	struct device *parent = NULL;
53 
54 	tegra_clocks_apply_init_table();
55 
56 	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
57 	if (!soc_dev_attr)
58 		goto out;
59 
60 	soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
61 	soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
62 	soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
63 
64 	soc_dev = soc_device_register(soc_dev_attr);
65 	if (IS_ERR(soc_dev)) {
66 		kfree(soc_dev_attr->family);
67 		kfree(soc_dev_attr->revision);
68 		kfree(soc_dev_attr->soc_id);
69 		kfree(soc_dev_attr);
70 		goto out;
71 	}
72 
73 	parent = soc_device_to_device(soc_dev);
74 
75 	/*
76 	 * Finished with the static registrations now; fill in the missing
77 	 * devices
78 	 */
79 out:
80 	of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
81 }
82 
83 static void __init paz00_init(void)
84 {
85 	if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
86 		tegra_paz00_wifikill_init();
87 }
88 
89 static struct {
90 	char *machine;
91 	void (*init)(void);
92 } board_init_funcs[] = {
93 	{ "compal,paz00", paz00_init },
94 };
95 
96 static void __init tegra_dt_init_late(void)
97 {
98 	int i;
99 
100 	tegra_init_late();
101 
102 	for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
103 		if (of_machine_is_compatible(board_init_funcs[i].machine)) {
104 			board_init_funcs[i].init();
105 			break;
106 		}
107 	}
108 }
109 
110 static const char * const tegra_dt_board_compat[] = {
111 	"nvidia,tegra114",
112 	"nvidia,tegra30",
113 	"nvidia,tegra20",
114 	NULL
115 };
116 
117 DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
118 	.map_io		= tegra_map_common_io,
119 	.smp		= smp_ops(tegra_smp_ops),
120 	.init_early	= tegra_init_early,
121 	.init_irq	= tegra_dt_init_irq,
122 	.init_time	= clocksource_of_init,
123 	.init_machine	= tegra_dt_init,
124 	.init_late	= tegra_dt_init_late,
125 	.restart	= tegra_assert_system_reset,
126 	.dt_compat	= tegra_dt_board_compat,
127 MACHINE_END
128