1 /* 2 * NVIDIA Tegra SoC device tree board support 3 * 4 * Copyright (C) 2011, 2013, NVIDIA Corporation 5 * Copyright (C) 2010 Secret Lab Technologies, Ltd. 6 * Copyright (C) 2010 Google, Inc. 7 * 8 * This software is licensed under the terms of the GNU General Public 9 * License version 2, as published by the Free Software Foundation, and 10 * may be copied, distributed, and modified under those terms. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 */ 18 19 #include <linux/clk.h> 20 #include <linux/clk/tegra.h> 21 #include <linux/dma-mapping.h> 22 #include <linux/init.h> 23 #include <linux/io.h> 24 #include <linux/irqchip.h> 25 #include <linux/irqdomain.h> 26 #include <linux/kernel.h> 27 #include <linux/of_address.h> 28 #include <linux/of_fdt.h> 29 #include <linux/of.h> 30 #include <linux/of_platform.h> 31 #include <linux/pda_power.h> 32 #include <linux/platform_device.h> 33 #include <linux/serial_8250.h> 34 #include <linux/slab.h> 35 #include <linux/sys_soc.h> 36 #include <linux/usb/tegra_usb_phy.h> 37 38 #include <linux/firmware/trusted_foundations.h> 39 40 #include <soc/tegra/fuse.h> 41 #include <soc/tegra/pmc.h> 42 43 #include <asm/firmware.h> 44 #include <asm/hardware/cache-l2x0.h> 45 #include <asm/mach/arch.h> 46 #include <asm/mach/time.h> 47 #include <asm/mach-types.h> 48 #include <asm/setup.h> 49 50 #include "board.h" 51 #include "common.h" 52 #include "cpuidle.h" 53 #include "iomap.h" 54 #include "irq.h" 55 #include "pm.h" 56 #include "reset.h" 57 #include "sleep.h" 58 59 /* 60 * Storage for debug-macro.S's state. 61 * 62 * This must be in .data not .bss so that it gets initialized each time the 63 * kernel is loaded. The data is declared here rather than debug-macro.S so 64 * that multiple inclusions of debug-macro.S point at the same data. 65 */ 66 u32 tegra_uart_config[3] = { 67 /* Debug UART initialization required */ 68 1, 69 /* Debug UART physical address */ 70 0, 71 /* Debug UART virtual address */ 72 0, 73 }; 74 75 static void __init tegra_init_early(void) 76 { 77 of_register_trusted_foundations(); 78 tegra_cpu_reset_handler_init(); 79 call_firmware_op(l2x0_init); 80 } 81 82 static void __init tegra_dt_init_irq(void) 83 { 84 tegra_init_irq(); 85 irqchip_init(); 86 } 87 88 static void __init tegra_dt_init(void) 89 { 90 struct device *parent = tegra_soc_device_register(); 91 92 of_platform_default_populate(NULL, NULL, parent); 93 } 94 95 static void __init tegra_dt_init_late(void) 96 { 97 tegra_init_suspend(); 98 tegra_cpuidle_init(); 99 100 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && 101 of_machine_is_compatible("compal,paz00")) 102 tegra_paz00_wifikill_init(); 103 104 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && 105 of_machine_is_compatible("nvidia,tegra20")) 106 platform_device_register_simple("tegra20-cpufreq", -1, NULL, 0); 107 } 108 109 static const char * const tegra_dt_board_compat[] = { 110 "nvidia,tegra124", 111 "nvidia,tegra114", 112 "nvidia,tegra30", 113 "nvidia,tegra20", 114 NULL 115 }; 116 117 DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)") 118 .l2c_aux_val = 0x3c400001, 119 .l2c_aux_mask = 0xc20fc3fe, 120 .smp = smp_ops(tegra_smp_ops), 121 .map_io = tegra_map_common_io, 122 .init_early = tegra_init_early, 123 .init_irq = tegra_dt_init_irq, 124 .init_machine = tegra_dt_init, 125 .init_late = tegra_dt_init_late, 126 .dt_compat = tegra_dt_board_compat, 127 MACHINE_END 128