xref: /openbmc/linux/arch/arm/mach-tegra/reset.h (revision 9b93eb47)
1 /*
2  * arch/arm/mach-tegra/reset.h
3  *
4  * CPU reset dispatcher.
5  *
6  * Copyright (c) 2011, NVIDIA Corporation.
7  *
8  * This software is licensed under the terms of the GNU General Public
9  * License version 2, as published by the Free Software Foundation, and
10  * may be copied, distributed, and modified under those terms.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18 
19 #ifndef __MACH_TEGRA_RESET_H
20 #define __MACH_TEGRA_RESET_H
21 
22 #define TEGRA_RESET_MASK_PRESENT	0
23 #define TEGRA_RESET_MASK_LP1		1
24 #define TEGRA_RESET_MASK_LP2		2
25 #define TEGRA_RESET_STARTUP_SECONDARY	3
26 #define TEGRA_RESET_STARTUP_LP2		4
27 #define TEGRA_RESET_STARTUP_LP1		5
28 #define TEGRA_RESET_RESETTABLE_STATUS	6
29 #define TEGRA_RESET_TF_PRESENT		7
30 #define TEGRA_RESET_DATA_SIZE		8
31 
32 #define RESET_DATA(x)	((TEGRA_RESET_##x)*4)
33 
34 #ifndef __ASSEMBLY__
35 
36 #include "irammap.h"
37 
38 extern unsigned long __tegra_cpu_reset_handler_data[TEGRA_RESET_DATA_SIZE];
39 
40 void __tegra_cpu_reset_handler_start(void);
41 void __tegra_cpu_reset_handler(void);
42 void __tegra20_cpu1_resettable_status_offset(void);
43 void __tegra_cpu_reset_handler_end(void);
44 
45 #ifdef CONFIG_PM_SLEEP
46 #define tegra_cpu_lp1_mask \
47 	(IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \
48 	((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP1] - \
49 	 (u32)__tegra_cpu_reset_handler_start)))
50 #define tegra_cpu_lp2_mask \
51 	(IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \
52 	((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP2] - \
53 	 (u32)__tegra_cpu_reset_handler_start)))
54 #define tegra20_cpu1_resettable_status \
55 	(IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \
56 	((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_RESETTABLE_STATUS] - \
57 	 (u32)__tegra_cpu_reset_handler_start)))
58 #endif
59 
60 #define tegra_cpu_reset_handler_offset \
61 		((u32)__tegra_cpu_reset_handler - \
62 		 (u32)__tegra_cpu_reset_handler_start)
63 
64 #define tegra_cpu_reset_handler_size \
65 		(__tegra_cpu_reset_handler_end - \
66 		 __tegra_cpu_reset_handler_start)
67 
68 void __init tegra_cpu_reset_handler_init(void);
69 
70 #endif
71 #endif
72