19952f691SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2e7a932b1SJoseph Lo /* 3e7a932b1SJoseph Lo * Copyright (c) 2013, NVIDIA Corporation. All rights reserved. 4e7a932b1SJoseph Lo */ 5a0524accSThierry Reding 6e7a932b1SJoseph Lo #include <linux/kernel.h> 7e7a932b1SJoseph Lo 8e7a932b1SJoseph Lo #include "pm.h" 9e7a932b1SJoseph Lo 10e7a932b1SJoseph Lo #ifdef CONFIG_PM_SLEEP 11e7a932b1SJoseph Lo extern u32 tegra30_iram_start, tegra30_iram_end; 12e7a932b1SJoseph Lo extern void tegra30_sleep_core_finish(unsigned long); 13e7a932b1SJoseph Lo tegra30_lp1_iram_hook(void)14e7a932b1SJoseph Lovoid tegra30_lp1_iram_hook(void) 15e7a932b1SJoseph Lo { 16e7a932b1SJoseph Lo tegra_lp1_iram.start_addr = &tegra30_iram_start; 17e7a932b1SJoseph Lo tegra_lp1_iram.end_addr = &tegra30_iram_end; 18e7a932b1SJoseph Lo } 19e7a932b1SJoseph Lo tegra30_sleep_core_init(void)20e7a932b1SJoseph Lovoid tegra30_sleep_core_init(void) 21e7a932b1SJoseph Lo { 22e7a932b1SJoseph Lo tegra_sleep_core_finish = tegra30_sleep_core_finish; 23e7a932b1SJoseph Lo } 24e7a932b1SJoseph Lo #endif 25