1config ARCH_TEGRA 2 bool "NVIDIA Tegra" if ARCH_MULTI_V7 3 select ARCH_HAS_CPUFREQ 4 select ARCH_REQUIRE_GPIOLIB 5 select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS 6 select ARM_GIC 7 select CLKSRC_MMIO 8 select HAVE_ARM_SCU if SMP 9 select HAVE_ARM_TWD if SMP 10 select PINCTRL 11 select ARCH_HAS_RESET_CONTROLLER 12 select RESET_CONTROLLER 13 select SOC_BUS 14 select USB_ULPI if USB_PHY 15 select USB_ULPI_VIEWPORT if USB_PHY 16 help 17 This enables support for NVIDIA Tegra based systems. 18 19menu "NVIDIA Tegra options" 20 depends on ARCH_TEGRA 21 22config ARCH_TEGRA_2x_SOC 23 bool "Enable support for Tegra20 family" 24 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 25 select ARM_ERRATA_720789 26 select ARM_ERRATA_754327 if SMP 27 select ARM_ERRATA_764369 if SMP 28 select PINCTRL_TEGRA20 29 select PL310_ERRATA_727915 if CACHE_L2X0 30 select PL310_ERRATA_769419 if CACHE_L2X0 31 help 32 Support for NVIDIA Tegra AP20 and T20 processors, based on the 33 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 34 35config ARCH_TEGRA_3x_SOC 36 bool "Enable support for Tegra30 family" 37 select ARM_ERRATA_754322 38 select ARM_ERRATA_764369 if SMP 39 select PINCTRL_TEGRA30 40 select PL310_ERRATA_769419 if CACHE_L2X0 41 help 42 Support for NVIDIA Tegra T30 processor family, based on the 43 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 44 45config ARCH_TEGRA_114_SOC 46 bool "Enable support for Tegra114 family" 47 select ARM_ERRATA_798181 if SMP 48 select ARM_L1_CACHE_SHIFT_6 49 select HAVE_ARM_ARCH_TIMER 50 select PINCTRL_TEGRA114 51 help 52 Support for NVIDIA Tegra T114 processor family, based on the 53 ARM CortexA15MP CPU 54 55config ARCH_TEGRA_124_SOC 56 bool "Enable support for Tegra124 family" 57 select ARM_L1_CACHE_SHIFT_6 58 select HAVE_ARM_ARCH_TIMER 59 select PINCTRL_TEGRA124 60 help 61 Support for NVIDIA Tegra T124 processor family, based on the 62 ARM CortexA15MP CPU 63 64config TEGRA_AHB 65 bool "Enable AHB driver for NVIDIA Tegra SoCs" 66 default y 67 help 68 Adds AHB configuration functionality for NVIDIA Tegra SoCs, 69 which controls AHB bus master arbitration and some 70 performance parameters(priority, prefech size). 71 72endmenu 73