1if ARCH_TEGRA 2 3comment "NVIDIA Tegra options" 4 5config ARCH_TEGRA_2x_SOC 6 bool "Enable support for Tegra20 family" 7 select ARCH_REQUIRE_GPIOLIB 8 select ARM_ERRATA_720789 9 select ARM_ERRATA_742230 10 select ARM_ERRATA_751472 11 select ARM_ERRATA_754327 12 select ARM_ERRATA_764369 if SMP 13 select ARM_GIC 14 select CPU_FREQ_TABLE if CPU_FREQ 15 select CPU_V7 16 select PINCTRL 17 select PINCTRL_TEGRA20 18 select PL310_ERRATA_727915 if CACHE_L2X0 19 select PL310_ERRATA_769419 if CACHE_L2X0 20 select USB_ARCH_HAS_EHCI if USB_SUPPORT 21 select USB_ULPI if USB 22 select USB_ULPI_VIEWPORT if USB_SUPPORT 23 help 24 Support for NVIDIA Tegra AP20 and T20 processors, based on the 25 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 26 27config ARCH_TEGRA_3x_SOC 28 bool "Enable support for Tegra30 family" 29 select ARCH_REQUIRE_GPIOLIB 30 select ARM_ERRATA_743622 31 select ARM_ERRATA_751472 32 select ARM_ERRATA_754322 33 select ARM_ERRATA_764369 if SMP 34 select ARM_GIC 35 select CPU_FREQ_TABLE if CPU_FREQ 36 select CPU_V7 37 select PINCTRL 38 select PINCTRL_TEGRA30 39 select PL310_ERRATA_769419 if CACHE_L2X0 40 select USB_ARCH_HAS_EHCI if USB_SUPPORT 41 select USB_ULPI if USB 42 select USB_ULPI_VIEWPORT if USB_SUPPORT 43 help 44 Support for NVIDIA Tegra T30 processor family, based on the 45 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 46 47config TEGRA_PCI 48 bool "PCI Express support" 49 depends on ARCH_TEGRA_2x_SOC 50 select PCI 51 52config TEGRA_AHB 53 bool "Enable AHB driver for NVIDIA Tegra SoCs" 54 default y 55 help 56 Adds AHB configuration functionality for NVIDIA Tegra SoCs, 57 which controls AHB bus master arbitration and some 58 perfomance parameters(priority, prefech size). 59 60choice 61 prompt "Default low-level debug console UART" 62 default TEGRA_DEBUG_UART_NONE 63 64config TEGRA_DEBUG_UART_NONE 65 bool "None" 66 67config TEGRA_DEBUG_UARTA 68 bool "UART-A" 69 70config TEGRA_DEBUG_UARTB 71 bool "UART-B" 72 73config TEGRA_DEBUG_UARTC 74 bool "UART-C" 75 76config TEGRA_DEBUG_UARTD 77 bool "UART-D" 78 79config TEGRA_DEBUG_UARTE 80 bool "UART-E" 81 82endchoice 83 84choice 85 prompt "Automatic low-level debug console UART" 86 default TEGRA_DEBUG_UART_AUTO_NONE 87 88config TEGRA_DEBUG_UART_AUTO_NONE 89 bool "None" 90 91config TEGRA_DEBUG_UART_AUTO_ODMDATA 92 bool "Via ODMDATA" 93 help 94 Automatically determines which UART to use for low-level debug based 95 on the ODMDATA value. This value is part of the BCT, and is written 96 to the boot memory device using nvflash, or other flashing tool. 97 When bits 19:18 are 3, then bits 17:15 indicate which UART to use; 98 0/1/2/3/4 are UART A/B/C/D/E. 99 100config TEGRA_DEBUG_UART_AUTO_SCRATCH 101 bool "Via UART scratch register" 102 help 103 Automatically determines which UART to use for low-level debug based 104 on the UART scratch register value. Some bootloaders put ASCII 'D' 105 in this register when they initialize their own console UART output. 106 Using this option allows the kernel to automatically pick the same 107 UART. 108 109endchoice 110 111config TEGRA_EMC_SCALING_ENABLE 112 bool "Enable scaling the memory frequency" 113 114endif 115