1c5f80065SErik Gillingif ARCH_TEGRA 2c5f80065SErik Gilling 3c5f80065SErik Gillingcomment "NVIDIA Tegra options" 4c5f80065SErik Gilling 5c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC 644107d8bSPeter De Schrijver bool "Enable support for Tegra20 family" 7c5f80065SErik Gilling select CPU_V7 8c5f80065SErik Gilling select ARM_GIC 93c92db9aSErik Gilling select ARCH_REQUIRE_GPIOLIB 1091525d08SBenoit Goby select USB_ARCH_HAS_EHCI if USB_SUPPORT 1191525d08SBenoit Goby select USB_ULPI if USB_SUPPORT 1291525d08SBenoit Goby select USB_ULPI_VIEWPORT if USB_SUPPORT 13f35b431dSStephen Warren select ARM_ERRATA_720789 14f35b431dSStephen Warren select ARM_ERRATA_742230 15f35b431dSStephen Warren select ARM_ERRATA_751472 16f35b431dSStephen Warren select ARM_ERRATA_754327 17f35b431dSStephen Warren select ARM_ERRATA_764369 18f35b431dSStephen Warren select PL310_ERRATA_727915 if CACHE_L2X0 19f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 20c5f80065SErik Gilling help 21c5f80065SErik Gilling Support for NVIDIA Tegra AP20 and T20 processors, based on the 22c5f80065SErik Gilling ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 23c5f80065SErik Gilling 2444107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC 2544107d8bSPeter De Schrijver bool "Enable support for Tegra30 family" 2644107d8bSPeter De Schrijver select CPU_V7 2744107d8bSPeter De Schrijver select ARM_GIC 2844107d8bSPeter De Schrijver select ARCH_REQUIRE_GPIOLIB 2944107d8bSPeter De Schrijver select USB_ARCH_HAS_EHCI if USB_SUPPORT 3044107d8bSPeter De Schrijver select USB_ULPI if USB_SUPPORT 3144107d8bSPeter De Schrijver select USB_ULPI_VIEWPORT if USB_SUPPORT 3244107d8bSPeter De Schrijver select USE_OF 33f35b431dSStephen Warren select ARM_ERRATA_743622 34f35b431dSStephen Warren select ARM_ERRATA_751472 35f35b431dSStephen Warren select ARM_ERRATA_754322 36f35b431dSStephen Warren select ARM_ERRATA_764369 37f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 3844107d8bSPeter De Schrijver help 3944107d8bSPeter De Schrijver Support for NVIDIA Tegra T30 processor family, based on the 4044107d8bSPeter De Schrijver ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 41c5f80065SErik Gilling 4277ffc146SMike Rapoportconfig TEGRA_PCI 4377ffc146SMike Rapoport bool "PCI Express support" 44b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 4577ffc146SMike Rapoport select PCI 4677ffc146SMike Rapoport 47c5f80065SErik Gillingcomment "Tegra board type" 48c5f80065SErik Gilling 49c5f80065SErik Gillingconfig MACH_HARMONY 50c5f80065SErik Gilling bool "Harmony board" 51b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 52885f24e1SUwe Kleine-König select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 53c5f80065SErik Gilling help 54c5f80065SErik Gilling Support for nVidia Harmony development platform 55c5f80065SErik Gilling 56d9a51fe7SOlof Johanssonconfig MACH_KAEN 57d9a51fe7SOlof Johansson bool "Kaen board" 58b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 59d9a51fe7SOlof Johansson select MACH_SEABOARD 60885f24e1SUwe Kleine-König select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 61d9a51fe7SOlof Johansson help 62d9a51fe7SOlof Johansson Support for the Kaen version of Seaboard 63d9a51fe7SOlof Johansson 6465b935aaSMarc Dietrichconfig MACH_PAZ00 6565b935aaSMarc Dietrich bool "Paz00 board" 66b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 6765b935aaSMarc Dietrich help 6865b935aaSMarc Dietrich Support for the Toshiba AC100/Dynabook AZ netbook 6965b935aaSMarc Dietrich 70d9a51fe7SOlof Johanssonconfig MACH_SEABOARD 71d9a51fe7SOlof Johansson bool "Seaboard board" 72b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 73885f24e1SUwe Kleine-König select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 74d9a51fe7SOlof Johansson help 75d9a51fe7SOlof Johansson Support for nVidia Seaboard development platform. It will 76d9a51fe7SOlof Johansson also be included for some of the derivative boards that 77d9a51fe7SOlof Johansson have large similarities with the seaboard design. 78d9a51fe7SOlof Johansson 798e267f3dSGrant Likelyconfig MACH_TEGRA_DT 80a2385dc5SPeter De Schrijver bool "Generic Tegra20 board (FDT support)" 8124692c0fSStephen Warren depends on ARCH_TEGRA_2x_SOC 828e267f3dSGrant Likely select USE_OF 838e267f3dSGrant Likely help 84a2385dc5SPeter De Schrijver Support for generic NVIDIA Tegra20 boards using Flattened Device Tree 858e267f3dSGrant Likely 86cca414b2SMike Rapoportconfig MACH_TRIMSLICE 87cca414b2SMike Rapoport bool "TrimSlice board" 88b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 89cca414b2SMike Rapoport select TEGRA_PCI 90cca414b2SMike Rapoport help 91cca414b2SMike Rapoport Support for CompuLab TrimSlice platform 92cca414b2SMike Rapoport 93d9a51fe7SOlof Johanssonconfig MACH_WARIO 94d9a51fe7SOlof Johansson bool "Wario board" 95b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 96d9a51fe7SOlof Johansson select MACH_SEABOARD 97d9a51fe7SOlof Johansson help 98d9a51fe7SOlof Johansson Support for the Wario version of Seaboard 99d9a51fe7SOlof Johansson 100add29e61SPeter De Schrijverconfig MACH_VENTANA 101add29e61SPeter De Schrijver bool "Ventana board" 102b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 103add29e61SPeter De Schrijver select MACH_TEGRA_DT 104add29e61SPeter De Schrijver help 105add29e61SPeter De Schrijver Support for the nVidia Ventana development platform 106add29e61SPeter De Schrijver 107c5f80065SErik Gillingchoice 108c5f80065SErik Gilling prompt "Low-level debug console UART" 109c5f80065SErik Gilling default TEGRA_DEBUG_UART_NONE 110c5f80065SErik Gilling 111c5f80065SErik Gillingconfig TEGRA_DEBUG_UART_NONE 112c5f80065SErik Gilling bool "None" 113c5f80065SErik Gilling 114c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTA 115c5f80065SErik Gilling bool "UART-A" 116c5f80065SErik Gilling 117c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTB 118c5f80065SErik Gilling bool "UART-B" 119c5f80065SErik Gilling 120c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTC 121c5f80065SErik Gilling bool "UART-C" 122c5f80065SErik Gilling 123c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTD 124c5f80065SErik Gilling bool "UART-D" 125c5f80065SErik Gilling 126c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTE 127c5f80065SErik Gilling bool "UART-E" 128c5f80065SErik Gilling 129c5f80065SErik Gillingendchoice 130c5f80065SErik Gilling 1314de3a8faSColin Crossconfig TEGRA_SYSTEM_DMA 1324de3a8faSColin Cross bool "Enable system DMA driver for NVIDIA Tegra SoCs" 1334de3a8faSColin Cross default y 1344de3a8faSColin Cross help 1354de3a8faSColin Cross Adds system DMA functionality for NVIDIA Tegra SoCs, used by 1364de3a8faSColin Cross several Tegra device drivers 1374de3a8faSColin Cross 138efdf72adSColin Crossconfig TEGRA_EMC_SCALING_ENABLE 139efdf72adSColin Cross bool "Enable scaling the memory frequency" 14038376866SMark Brown 14138376866SMark Brownendif 142