190027225SStephen Warrenconfig ARCH_TEGRA 290027225SStephen Warren bool "NVIDIA Tegra" if ARCH_MULTI_V7 390027225SStephen Warren select ARCH_HAS_CPUFREQ 490027225SStephen Warren select ARCH_REQUIRE_GPIOLIB 590027225SStephen Warren select CLKDEV_LOOKUP 690027225SStephen Warren select CLKSRC_MMIO 790027225SStephen Warren select CLKSRC_OF 890027225SStephen Warren select COMMON_CLK 990027225SStephen Warren select GENERIC_CLOCKEVENTS 104c3ffffdSStephen Boyd select HAVE_ARM_SCU if SMP 11a894fcc2SStephen Boyd select HAVE_ARM_TWD if SMP 1290027225SStephen Warren select HAVE_CLK 1390027225SStephen Warren select HAVE_SMP 1490027225SStephen Warren select MIGHT_HAVE_CACHE_L2X0 1590027225SStephen Warren select SOC_BUS 1690027225SStephen Warren select SPARSE_IRQ 1790027225SStephen Warren select USE_OF 1890027225SStephen Warren help 1990027225SStephen Warren This enables support for NVIDIA Tegra based systems. 20c5f80065SErik Gilling 2190027225SStephen Warrenmenu "NVIDIA Tegra options" 2290027225SStephen Warren depends on ARCH_TEGRA 23c5f80065SErik Gilling 24c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC 2544107d8bSPeter De Schrijver bool "Enable support for Tegra20 family" 261d328606SJoseph Lo select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 27f35b431dSStephen Warren select ARM_ERRATA_720789 2845c9e592SStephen Warren select ARM_ERRATA_754327 if SMP 298f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 30b1b3f49cSRussell King select ARM_GIC 31b1b3f49cSRussell King select CPU_FREQ_TABLE if CPU_FREQ 32b1b3f49cSRussell King select CPU_V7 33b1b3f49cSRussell King select PINCTRL 34b1b3f49cSRussell King select PINCTRL_TEGRA20 35f35b431dSStephen Warren select PL310_ERRATA_727915 if CACHE_L2X0 36f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 37b1b3f49cSRussell King select USB_ARCH_HAS_EHCI if USB_SUPPORT 3875f32ec1SFelipe Balbi select USB_ULPI if USB_PHY 3975f32ec1SFelipe Balbi select USB_ULPI_VIEWPORT if USB_PHY 40c5f80065SErik Gilling help 41c5f80065SErik Gilling Support for NVIDIA Tegra AP20 and T20 processors, based on the 42c5f80065SErik Gilling ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 43c5f80065SErik Gilling 4444107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC 4544107d8bSPeter De Schrijver bool "Enable support for Tegra30 family" 46f35b431dSStephen Warren select ARM_ERRATA_754322 478f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 48b1b3f49cSRussell King select ARM_GIC 49013df388SArnd Bergmann select CPU_FREQ_TABLE if CPU_FREQ 50b1b3f49cSRussell King select CPU_V7 51b1b3f49cSRussell King select PINCTRL 52b1b3f49cSRussell King select PINCTRL_TEGRA30 53b1b3f49cSRussell King select PL310_ERRATA_769419 if CACHE_L2X0 54b1b3f49cSRussell King select USB_ARCH_HAS_EHCI if USB_SUPPORT 5575f32ec1SFelipe Balbi select USB_ULPI if USB_PHY 5675f32ec1SFelipe Balbi select USB_ULPI_VIEWPORT if USB_PHY 5744107d8bSPeter De Schrijver help 5844107d8bSPeter De Schrijver Support for NVIDIA Tegra T30 processor family, based on the 5944107d8bSPeter De Schrijver ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 60c5f80065SErik Gilling 615c541b88SHiroshi Doyuconfig ARCH_TEGRA_114_SOC 625c541b88SHiroshi Doyu bool "Enable support for Tegra114 family" 635c541b88SHiroshi Doyu select ARM_ARCH_TIMER 641d7e5c2cSStephen Warren select ARM_GIC 651d7e5c2cSStephen Warren select ARM_L1_CACHE_SHIFT_6 6663cc8467SArnd Bergmann select CPU_FREQ_TABLE if CPU_FREQ 671d7e5c2cSStephen Warren select CPU_V7 6820fd4806SLaxman Dewangan select PINCTRL 6920fd4806SLaxman Dewangan select PINCTRL_TEGRA114 705c541b88SHiroshi Doyu help 715c541b88SHiroshi Doyu Support for NVIDIA Tegra T114 processor family, based on the 725c541b88SHiroshi Doyu ARM CortexA15MP CPU 735c541b88SHiroshi Doyu 7477ffc146SMike Rapoportconfig TEGRA_PCI 7577ffc146SMike Rapoport bool "PCI Express support" 76b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 7777ffc146SMike Rapoport select PCI 7877ffc146SMike Rapoport 7987d0bab2SHiroshi DOYUconfig TEGRA_AHB 8087d0bab2SHiroshi DOYU bool "Enable AHB driver for NVIDIA Tegra SoCs" 8187d0bab2SHiroshi DOYU default y 8287d0bab2SHiroshi DOYU help 8387d0bab2SHiroshi DOYU Adds AHB configuration functionality for NVIDIA Tegra SoCs, 8487d0bab2SHiroshi DOYU which controls AHB bus master arbitration and some 85e41e85ccSMasanari Iida performance parameters(priority, prefech size). 8687d0bab2SHiroshi DOYU 87efdf72adSColin Crossconfig TEGRA_EMC_SCALING_ENABLE 88efdf72adSColin Cross bool "Enable scaling the memory frequency" 8938376866SMark Brown 9090027225SStephen Warrenendmenu 91