121278aeaSRob Herringmenuconfig ARCH_TEGRA 290027225SStephen Warren bool "NVIDIA Tegra" if ARCH_MULTI_V7 390027225SStephen Warren select ARCH_REQUIRE_GPIOLIB 41a5de3aeSAlexandre Courbot select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS 5bd968d59SThierry Reding select ARM_AMBA 620984c44SStephen Warren select ARM_GIC 790027225SStephen Warren select CLKSRC_MMIO 84c3ffffdSStephen Boyd select HAVE_ARM_SCU if SMP 9a894fcc2SStephen Boyd select HAVE_ARM_TWD if SMP 1020984c44SStephen Warren select PINCTRL 11e0421468SStephen Warren select ARCH_HAS_RESET_CONTROLLER 12e0421468SStephen Warren select RESET_CONTROLLER 1390027225SStephen Warren select SOC_BUS 1420984c44SStephen Warren select USB_ULPI if USB_PHY 1520984c44SStephen Warren select USB_ULPI_VIEWPORT if USB_PHY 1690027225SStephen Warren help 1790027225SStephen Warren This enables support for NVIDIA Tegra based systems. 18c5f80065SErik Gilling 1921278aeaSRob Herringif ARCH_TEGRA 20c5f80065SErik Gilling 21c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC 2244107d8bSPeter De Schrijver bool "Enable support for Tegra20 family" 231d328606SJoseph Lo select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 24f35b431dSStephen Warren select ARM_ERRATA_720789 2545c9e592SStephen Warren select ARM_ERRATA_754327 if SMP 268f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 27b1b3f49cSRussell King select PINCTRL_TEGRA20 28f35b431dSStephen Warren select PL310_ERRATA_727915 if CACHE_L2X0 29f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 30910978e7SThierry Reding select TEGRA_TIMER 31c5f80065SErik Gilling help 32c5f80065SErik Gilling Support for NVIDIA Tegra AP20 and T20 processors, based on the 33c5f80065SErik Gilling ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 34c5f80065SErik Gilling 3544107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC 3644107d8bSPeter De Schrijver bool "Enable support for Tegra30 family" 37f35b431dSStephen Warren select ARM_ERRATA_754322 388f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 39b1b3f49cSRussell King select PINCTRL_TEGRA30 40b1b3f49cSRussell King select PL310_ERRATA_769419 if CACHE_L2X0 41910978e7SThierry Reding select TEGRA_TIMER 4244107d8bSPeter De Schrijver help 4344107d8bSPeter De Schrijver Support for NVIDIA Tegra T30 processor family, based on the 4444107d8bSPeter De Schrijver ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 45c5f80065SErik Gilling 465c541b88SHiroshi Doyuconfig ARCH_TEGRA_114_SOC 475c541b88SHiroshi Doyu bool "Enable support for Tegra114 family" 4859fd3033SRussell King select ARM_ERRATA_798181 if SMP 491d7e5c2cSStephen Warren select ARM_L1_CACHE_SHIFT_6 50b6bda4e0SStephen Warren select HAVE_ARM_ARCH_TIMER 5120fd4806SLaxman Dewangan select PINCTRL_TEGRA114 52910978e7SThierry Reding select TEGRA_TIMER 535c541b88SHiroshi Doyu help 545c541b88SHiroshi Doyu Support for NVIDIA Tegra T114 processor family, based on the 555c541b88SHiroshi Doyu ARM CortexA15MP CPU 565c541b88SHiroshi Doyu 5773944475SJoseph Loconfig ARCH_TEGRA_124_SOC 5873944475SJoseph Lo bool "Enable support for Tegra124 family" 5973944475SJoseph Lo select ARM_L1_CACHE_SHIFT_6 6073944475SJoseph Lo select HAVE_ARM_ARCH_TIMER 617e1161f8SLaxman Dewangan select PINCTRL_TEGRA124 62910978e7SThierry Reding select TEGRA_TIMER 6373944475SJoseph Lo help 6473944475SJoseph Lo Support for NVIDIA Tegra T124 processor family, based on the 6573944475SJoseph Lo ARM CortexA15MP CPU 6673944475SJoseph Lo 6721278aeaSRob Herringendif 68