xref: /openbmc/linux/arch/arm/mach-tegra/Kconfig (revision 90027225)
190027225SStephen Warrenconfig ARCH_TEGRA
290027225SStephen Warren	bool "NVIDIA Tegra" if ARCH_MULTI_V7
390027225SStephen Warren	select ARCH_HAS_CPUFREQ
490027225SStephen Warren	select ARCH_REQUIRE_GPIOLIB
590027225SStephen Warren	select CLKDEV_LOOKUP
690027225SStephen Warren	select CLKSRC_MMIO
790027225SStephen Warren	select CLKSRC_OF
890027225SStephen Warren	select COMMON_CLK
990027225SStephen Warren	select GENERIC_CLOCKEVENTS
1090027225SStephen Warren	select HAVE_CLK
1190027225SStephen Warren	select HAVE_SMP
1290027225SStephen Warren	select MIGHT_HAVE_CACHE_L2X0
1390027225SStephen Warren	select SOC_BUS
1490027225SStephen Warren	select SPARSE_IRQ
1590027225SStephen Warren	select USE_OF
1690027225SStephen Warren	help
1790027225SStephen Warren	  This enables support for NVIDIA Tegra based systems.
18c5f80065SErik Gilling
1990027225SStephen Warrenmenu "NVIDIA Tegra options"
2090027225SStephen Warren	depends on ARCH_TEGRA
21c5f80065SErik Gilling
22c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC
2344107d8bSPeter De Schrijver	bool "Enable support for Tegra20 family"
241d328606SJoseph Lo	select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
25f35b431dSStephen Warren	select ARM_ERRATA_720789
2645c9e592SStephen Warren	select ARM_ERRATA_754327 if SMP
278f90cce5SArnd Bergmann	select ARM_ERRATA_764369 if SMP
28b1b3f49cSRussell King	select ARM_GIC
29b1b3f49cSRussell King	select CPU_FREQ_TABLE if CPU_FREQ
30b1b3f49cSRussell King	select CPU_V7
31b1b3f49cSRussell King	select PINCTRL
32b1b3f49cSRussell King	select PINCTRL_TEGRA20
33f35b431dSStephen Warren	select PL310_ERRATA_727915 if CACHE_L2X0
34f35b431dSStephen Warren	select PL310_ERRATA_769419 if CACHE_L2X0
35b1b3f49cSRussell King	select USB_ARCH_HAS_EHCI if USB_SUPPORT
36b1b3f49cSRussell King	select USB_ULPI if USB
37b1b3f49cSRussell King	select USB_ULPI_VIEWPORT if USB_SUPPORT
38c5f80065SErik Gilling	help
39c5f80065SErik Gilling	  Support for NVIDIA Tegra AP20 and T20 processors, based on the
40c5f80065SErik Gilling	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
41c5f80065SErik Gilling
4244107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC
4344107d8bSPeter De Schrijver	bool "Enable support for Tegra30 family"
44f35b431dSStephen Warren	select ARM_ERRATA_754322
458f90cce5SArnd Bergmann	select ARM_ERRATA_764369 if SMP
46b1b3f49cSRussell King	select ARM_GIC
47013df388SArnd Bergmann	select CPU_FREQ_TABLE if CPU_FREQ
48b1b3f49cSRussell King	select CPU_V7
49b1b3f49cSRussell King	select PINCTRL
50b1b3f49cSRussell King	select PINCTRL_TEGRA30
51b1b3f49cSRussell King	select PL310_ERRATA_769419 if CACHE_L2X0
52b1b3f49cSRussell King	select USB_ARCH_HAS_EHCI if USB_SUPPORT
53b1b3f49cSRussell King	select USB_ULPI if USB
54b1b3f49cSRussell King	select USB_ULPI_VIEWPORT if USB_SUPPORT
5544107d8bSPeter De Schrijver	help
5644107d8bSPeter De Schrijver	  Support for NVIDIA Tegra T30 processor family, based on the
5744107d8bSPeter De Schrijver	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
58c5f80065SErik Gilling
595c541b88SHiroshi Doyuconfig ARCH_TEGRA_114_SOC
605c541b88SHiroshi Doyu	bool "Enable support for Tegra114 family"
615c541b88SHiroshi Doyu	select ARM_ARCH_TIMER
621d7e5c2cSStephen Warren	select ARM_GIC
631d7e5c2cSStephen Warren	select ARM_L1_CACHE_SHIFT_6
641d7e5c2cSStephen Warren	select CPU_V7
6520fd4806SLaxman Dewangan	select PINCTRL
6620fd4806SLaxman Dewangan	select PINCTRL_TEGRA114
675c541b88SHiroshi Doyu	help
685c541b88SHiroshi Doyu	  Support for NVIDIA Tegra T114 processor family, based on the
695c541b88SHiroshi Doyu	  ARM CortexA15MP CPU
705c541b88SHiroshi Doyu
7177ffc146SMike Rapoportconfig TEGRA_PCI
7277ffc146SMike Rapoport	bool "PCI Express support"
73b2bbbc4dSPeter De Schrijver	depends on ARCH_TEGRA_2x_SOC
7477ffc146SMike Rapoport	select PCI
7577ffc146SMike Rapoport
7687d0bab2SHiroshi DOYUconfig TEGRA_AHB
7787d0bab2SHiroshi DOYU	bool "Enable AHB driver for NVIDIA Tegra SoCs"
7887d0bab2SHiroshi DOYU	default y
7987d0bab2SHiroshi DOYU	help
8087d0bab2SHiroshi DOYU	  Adds AHB configuration functionality for NVIDIA Tegra SoCs,
8187d0bab2SHiroshi DOYU	  which controls AHB bus master arbitration and some
82e41e85ccSMasanari Iida	  performance parameters(priority, prefech size).
8387d0bab2SHiroshi DOYU
84efdf72adSColin Crossconfig TEGRA_EMC_SCALING_ENABLE
85efdf72adSColin Cross	bool "Enable scaling the memory frequency"
8638376866SMark Brown
8790027225SStephen Warrenendmenu
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