1c5f80065SErik Gillingif ARCH_TEGRA 2c5f80065SErik Gilling 3c5f80065SErik Gillingcomment "NVIDIA Tegra options" 4c5f80065SErik Gilling 5c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC 644107d8bSPeter De Schrijver bool "Enable support for Tegra20 family" 7c5f80065SErik Gilling select CPU_V7 8c5f80065SErik Gilling select ARM_GIC 93c92db9aSErik Gilling select ARCH_REQUIRE_GPIOLIB 10f1f1ffa0SStephen Warren select PINCTRL 11f1f1ffa0SStephen Warren select PINCTRL_TEGRA20 1291525d08SBenoit Goby select USB_ARCH_HAS_EHCI if USB_SUPPORT 13279b6585SArnd Bergmann select USB_ULPI if USB 1491525d08SBenoit Goby select USB_ULPI_VIEWPORT if USB_SUPPORT 15f35b431dSStephen Warren select ARM_ERRATA_720789 16f35b431dSStephen Warren select ARM_ERRATA_742230 17f35b431dSStephen Warren select ARM_ERRATA_751472 18f35b431dSStephen Warren select ARM_ERRATA_754327 19f35b431dSStephen Warren select ARM_ERRATA_764369 20f35b431dSStephen Warren select PL310_ERRATA_727915 if CACHE_L2X0 21f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 22013df388SArnd Bergmann select CPU_FREQ_TABLE if CPU_FREQ 23c5f80065SErik Gilling help 24c5f80065SErik Gilling Support for NVIDIA Tegra AP20 and T20 processors, based on the 25c5f80065SErik Gilling ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 26c5f80065SErik Gilling 2744107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC 2844107d8bSPeter De Schrijver bool "Enable support for Tegra30 family" 2944107d8bSPeter De Schrijver select CPU_V7 3044107d8bSPeter De Schrijver select ARM_GIC 3144107d8bSPeter De Schrijver select ARCH_REQUIRE_GPIOLIB 32f1f1ffa0SStephen Warren select PINCTRL 33f1f1ffa0SStephen Warren select PINCTRL_TEGRA30 3444107d8bSPeter De Schrijver select USB_ARCH_HAS_EHCI if USB_SUPPORT 35279b6585SArnd Bergmann select USB_ULPI if USB 3644107d8bSPeter De Schrijver select USB_ULPI_VIEWPORT if USB_SUPPORT 3744107d8bSPeter De Schrijver select USE_OF 38f35b431dSStephen Warren select ARM_ERRATA_743622 39f35b431dSStephen Warren select ARM_ERRATA_751472 40f35b431dSStephen Warren select ARM_ERRATA_754322 41f35b431dSStephen Warren select ARM_ERRATA_764369 42f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 43013df388SArnd Bergmann select CPU_FREQ_TABLE if CPU_FREQ 4444107d8bSPeter De Schrijver help 4544107d8bSPeter De Schrijver Support for NVIDIA Tegra T30 processor family, based on the 4644107d8bSPeter De Schrijver ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 47c5f80065SErik Gilling 4877ffc146SMike Rapoportconfig TEGRA_PCI 4977ffc146SMike Rapoport bool "PCI Express support" 50b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 5177ffc146SMike Rapoport select PCI 5277ffc146SMike Rapoport 5387d0bab2SHiroshi DOYUconfig TEGRA_AHB 5487d0bab2SHiroshi DOYU bool "Enable AHB driver for NVIDIA Tegra SoCs" 5587d0bab2SHiroshi DOYU default y 5687d0bab2SHiroshi DOYU help 5787d0bab2SHiroshi DOYU Adds AHB configuration functionality for NVIDIA Tegra SoCs, 5887d0bab2SHiroshi DOYU which controls AHB bus master arbitration and some 5987d0bab2SHiroshi DOYU perfomance parameters(priority, prefech size). 6087d0bab2SHiroshi DOYU 61c5f80065SErik Gillingcomment "Tegra board type" 62c5f80065SErik Gilling 63c5f80065SErik Gillingconfig MACH_HARMONY 64c5f80065SErik Gilling bool "Harmony board" 65b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 66885f24e1SUwe Kleine-König select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 67c5f80065SErik Gilling help 68c5f80065SErik Gilling Support for nVidia Harmony development platform 69c5f80065SErik Gilling 70d9a51fe7SOlof Johanssonconfig MACH_KAEN 71d9a51fe7SOlof Johansson bool "Kaen board" 72b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 73d9a51fe7SOlof Johansson select MACH_SEABOARD 74885f24e1SUwe Kleine-König select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 75d9a51fe7SOlof Johansson help 76d9a51fe7SOlof Johansson Support for the Kaen version of Seaboard 77d9a51fe7SOlof Johansson 7865b935aaSMarc Dietrichconfig MACH_PAZ00 7965b935aaSMarc Dietrich bool "Paz00 board" 80b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 8165b935aaSMarc Dietrich help 8265b935aaSMarc Dietrich Support for the Toshiba AC100/Dynabook AZ netbook 8365b935aaSMarc Dietrich 84d9a51fe7SOlof Johanssonconfig MACH_SEABOARD 85d9a51fe7SOlof Johansson bool "Seaboard board" 86b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 87885f24e1SUwe Kleine-König select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 88d9a51fe7SOlof Johansson help 89d9a51fe7SOlof Johansson Support for nVidia Seaboard development platform. It will 90d9a51fe7SOlof Johansson also be included for some of the derivative boards that 91d9a51fe7SOlof Johansson have large similarities with the seaboard design. 92d9a51fe7SOlof Johansson 938e267f3dSGrant Likelyconfig MACH_TEGRA_DT 94a2385dc5SPeter De Schrijver bool "Generic Tegra20 board (FDT support)" 9524692c0fSStephen Warren depends on ARCH_TEGRA_2x_SOC 968e267f3dSGrant Likely select USE_OF 978e267f3dSGrant Likely help 98a2385dc5SPeter De Schrijver Support for generic NVIDIA Tegra20 boards using Flattened Device Tree 998e267f3dSGrant Likely 100cca414b2SMike Rapoportconfig MACH_TRIMSLICE 101cca414b2SMike Rapoport bool "TrimSlice board" 102b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 103cca414b2SMike Rapoport select TEGRA_PCI 104cca414b2SMike Rapoport help 105cca414b2SMike Rapoport Support for CompuLab TrimSlice platform 106cca414b2SMike Rapoport 107d9a51fe7SOlof Johanssonconfig MACH_WARIO 108d9a51fe7SOlof Johansson bool "Wario board" 109b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 110d9a51fe7SOlof Johansson select MACH_SEABOARD 111d9a51fe7SOlof Johansson help 112d9a51fe7SOlof Johansson Support for the Wario version of Seaboard 113d9a51fe7SOlof Johansson 114add29e61SPeter De Schrijverconfig MACH_VENTANA 115add29e61SPeter De Schrijver bool "Ventana board" 116b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 117add29e61SPeter De Schrijver select MACH_TEGRA_DT 118add29e61SPeter De Schrijver help 119add29e61SPeter De Schrijver Support for the nVidia Ventana development platform 120add29e61SPeter De Schrijver 121c5f80065SErik Gillingchoice 122c5f80065SErik Gilling prompt "Low-level debug console UART" 123c5f80065SErik Gilling default TEGRA_DEBUG_UART_NONE 124c5f80065SErik Gilling 125c5f80065SErik Gillingconfig TEGRA_DEBUG_UART_NONE 126c5f80065SErik Gilling bool "None" 127c5f80065SErik Gilling 128c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTA 129c5f80065SErik Gilling bool "UART-A" 130c5f80065SErik Gilling 131c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTB 132c5f80065SErik Gilling bool "UART-B" 133c5f80065SErik Gilling 134c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTC 135c5f80065SErik Gilling bool "UART-C" 136c5f80065SErik Gilling 137c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTD 138c5f80065SErik Gilling bool "UART-D" 139c5f80065SErik Gilling 140c5f80065SErik Gillingconfig TEGRA_DEBUG_UARTE 141c5f80065SErik Gilling bool "UART-E" 142c5f80065SErik Gilling 143c5f80065SErik Gillingendchoice 144c5f80065SErik Gilling 1454de3a8faSColin Crossconfig TEGRA_SYSTEM_DMA 1464de3a8faSColin Cross bool "Enable system DMA driver for NVIDIA Tegra SoCs" 1474de3a8faSColin Cross default y 1484de3a8faSColin Cross help 1494de3a8faSColin Cross Adds system DMA functionality for NVIDIA Tegra SoCs, used by 1504de3a8faSColin Cross several Tegra device drivers 1514de3a8faSColin Cross 152efdf72adSColin Crossconfig TEGRA_EMC_SCALING_ENABLE 153efdf72adSColin Cross bool "Enable scaling the memory frequency" 15438376866SMark Brown 15538376866SMark Brownendif 156