1c5f80065SErik Gillingif ARCH_TEGRA 2c5f80065SErik Gilling 3c5f80065SErik Gillingcomment "NVIDIA Tegra options" 4c5f80065SErik Gilling 5c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC 644107d8bSPeter De Schrijver bool "Enable support for Tegra20 family" 71d328606SJoseph Lo select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 8f35b431dSStephen Warren select ARM_ERRATA_720789 945c9e592SStephen Warren select ARM_ERRATA_742230 if SMP 10f35b431dSStephen Warren select ARM_ERRATA_751472 1145c9e592SStephen Warren select ARM_ERRATA_754327 if SMP 128f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 13b1b3f49cSRussell King select ARM_GIC 14b1b3f49cSRussell King select CPU_FREQ_TABLE if CPU_FREQ 15b1b3f49cSRussell King select CPU_V7 16b1b3f49cSRussell King select PINCTRL 17b1b3f49cSRussell King select PINCTRL_TEGRA20 18f35b431dSStephen Warren select PL310_ERRATA_727915 if CACHE_L2X0 19f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 20b1b3f49cSRussell King select USB_ARCH_HAS_EHCI if USB_SUPPORT 2175f32ec1SFelipe Balbi select USB_ULPI if USB_PHY 2275f32ec1SFelipe Balbi select USB_ULPI_VIEWPORT if USB_PHY 23c5f80065SErik Gilling help 24c5f80065SErik Gilling Support for NVIDIA Tegra AP20 and T20 processors, based on the 25c5f80065SErik Gilling ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 26c5f80065SErik Gilling 2744107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC 2844107d8bSPeter De Schrijver bool "Enable support for Tegra30 family" 29f35b431dSStephen Warren select ARM_ERRATA_743622 30f35b431dSStephen Warren select ARM_ERRATA_751472 31f35b431dSStephen Warren select ARM_ERRATA_754322 328f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 33b1b3f49cSRussell King select ARM_GIC 34013df388SArnd Bergmann select CPU_FREQ_TABLE if CPU_FREQ 35b1b3f49cSRussell King select CPU_V7 36b1b3f49cSRussell King select PINCTRL 37b1b3f49cSRussell King select PINCTRL_TEGRA30 38b1b3f49cSRussell King select PL310_ERRATA_769419 if CACHE_L2X0 39b1b3f49cSRussell King select USB_ARCH_HAS_EHCI if USB_SUPPORT 4075f32ec1SFelipe Balbi select USB_ULPI if USB_PHY 4175f32ec1SFelipe Balbi select USB_ULPI_VIEWPORT if USB_PHY 4244107d8bSPeter De Schrijver help 4344107d8bSPeter De Schrijver Support for NVIDIA Tegra T30 processor family, based on the 4444107d8bSPeter De Schrijver ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 45c5f80065SErik Gilling 465c541b88SHiroshi Doyuconfig ARCH_TEGRA_114_SOC 475c541b88SHiroshi Doyu bool "Enable support for Tegra114 family" 485c541b88SHiroshi Doyu select ARM_ARCH_TIMER 491d7e5c2cSStephen Warren select ARM_GIC 501d7e5c2cSStephen Warren select ARM_L1_CACHE_SHIFT_6 511d7e5c2cSStephen Warren select CPU_V7 5220fd4806SLaxman Dewangan select PINCTRL 5320fd4806SLaxman Dewangan select PINCTRL_TEGRA114 545c541b88SHiroshi Doyu help 555c541b88SHiroshi Doyu Support for NVIDIA Tegra T114 processor family, based on the 565c541b88SHiroshi Doyu ARM CortexA15MP CPU 575c541b88SHiroshi Doyu 5877ffc146SMike Rapoportconfig TEGRA_PCI 5977ffc146SMike Rapoport bool "PCI Express support" 60b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 6177ffc146SMike Rapoport select PCI 6277ffc146SMike Rapoport 6387d0bab2SHiroshi DOYUconfig TEGRA_AHB 6487d0bab2SHiroshi DOYU bool "Enable AHB driver for NVIDIA Tegra SoCs" 6587d0bab2SHiroshi DOYU default y 6687d0bab2SHiroshi DOYU help 6787d0bab2SHiroshi DOYU Adds AHB configuration functionality for NVIDIA Tegra SoCs, 6887d0bab2SHiroshi DOYU which controls AHB bus master arbitration and some 69e41e85ccSMasanari Iida performance parameters(priority, prefech size). 7087d0bab2SHiroshi DOYU 71efdf72adSColin Crossconfig TEGRA_EMC_SCALING_ENABLE 72efdf72adSColin Cross bool "Enable scaling the memory frequency" 7338376866SMark Brown 7438376866SMark Brownendif 75