190027225SStephen Warrenconfig ARCH_TEGRA 290027225SStephen Warren bool "NVIDIA Tegra" if ARCH_MULTI_V7 390027225SStephen Warren select ARCH_HAS_CPUFREQ 490027225SStephen Warren select ARCH_REQUIRE_GPIOLIB 520984c44SStephen Warren select ARM_GIC 690027225SStephen Warren select CLKDEV_LOOKUP 790027225SStephen Warren select CLKSRC_MMIO 890027225SStephen Warren select CLKSRC_OF 990027225SStephen Warren select COMMON_CLK 1020984c44SStephen Warren select CPU_V7 1190027225SStephen Warren select GENERIC_CLOCKEVENTS 124c3ffffdSStephen Boyd select HAVE_ARM_SCU if SMP 13a894fcc2SStephen Boyd select HAVE_ARM_TWD if SMP 1490027225SStephen Warren select HAVE_CLK 1590027225SStephen Warren select HAVE_SMP 1690027225SStephen Warren select MIGHT_HAVE_CACHE_L2X0 17e8a72e2aSThierry Reding select MIGHT_HAVE_PCI 1820984c44SStephen Warren select PINCTRL 1990027225SStephen Warren select SOC_BUS 2090027225SStephen Warren select SPARSE_IRQ 2120984c44SStephen Warren select USB_ARCH_HAS_EHCI if USB_SUPPORT 2220984c44SStephen Warren select USB_ULPI if USB_PHY 2320984c44SStephen Warren select USB_ULPI_VIEWPORT if USB_PHY 2490027225SStephen Warren select USE_OF 2590027225SStephen Warren help 2690027225SStephen Warren This enables support for NVIDIA Tegra based systems. 27c5f80065SErik Gilling 2890027225SStephen Warrenmenu "NVIDIA Tegra options" 2990027225SStephen Warren depends on ARCH_TEGRA 30c5f80065SErik Gilling 31c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC 3244107d8bSPeter De Schrijver bool "Enable support for Tegra20 family" 331d328606SJoseph Lo select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 34f35b431dSStephen Warren select ARM_ERRATA_720789 3545c9e592SStephen Warren select ARM_ERRATA_754327 if SMP 368f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 37b1b3f49cSRussell King select PINCTRL_TEGRA20 38f35b431dSStephen Warren select PL310_ERRATA_727915 if CACHE_L2X0 39f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 40c5f80065SErik Gilling help 41c5f80065SErik Gilling Support for NVIDIA Tegra AP20 and T20 processors, based on the 42c5f80065SErik Gilling ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 43c5f80065SErik Gilling 4444107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC 4544107d8bSPeter De Schrijver bool "Enable support for Tegra30 family" 46f35b431dSStephen Warren select ARM_ERRATA_754322 478f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 48b1b3f49cSRussell King select PINCTRL_TEGRA30 49b1b3f49cSRussell King select PL310_ERRATA_769419 if CACHE_L2X0 5044107d8bSPeter De Schrijver help 5144107d8bSPeter De Schrijver Support for NVIDIA Tegra T30 processor family, based on the 5244107d8bSPeter De Schrijver ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 53c5f80065SErik Gilling 545c541b88SHiroshi Doyuconfig ARCH_TEGRA_114_SOC 555c541b88SHiroshi Doyu bool "Enable support for Tegra114 family" 56f2bd77c8SJoseph Lo select ARM_ERRATA_798181 571d7e5c2cSStephen Warren select ARM_L1_CACHE_SHIFT_6 58b6bda4e0SStephen Warren select HAVE_ARM_ARCH_TIMER 5920fd4806SLaxman Dewangan select PINCTRL_TEGRA114 605c541b88SHiroshi Doyu help 615c541b88SHiroshi Doyu Support for NVIDIA Tegra T114 processor family, based on the 625c541b88SHiroshi Doyu ARM CortexA15MP CPU 635c541b88SHiroshi Doyu 6473944475SJoseph Loconfig ARCH_TEGRA_124_SOC 6573944475SJoseph Lo bool "Enable support for Tegra124 family" 6673944475SJoseph Lo select ARM_L1_CACHE_SHIFT_6 6773944475SJoseph Lo select HAVE_ARM_ARCH_TIMER 6873944475SJoseph Lo help 6973944475SJoseph Lo Support for NVIDIA Tegra T124 processor family, based on the 7073944475SJoseph Lo ARM CortexA15MP CPU 7173944475SJoseph Lo 7287d0bab2SHiroshi DOYUconfig TEGRA_AHB 7387d0bab2SHiroshi DOYU bool "Enable AHB driver for NVIDIA Tegra SoCs" 7487d0bab2SHiroshi DOYU default y 7587d0bab2SHiroshi DOYU help 7687d0bab2SHiroshi DOYU Adds AHB configuration functionality for NVIDIA Tegra SoCs, 7787d0bab2SHiroshi DOYU which controls AHB bus master arbitration and some 78e41e85ccSMasanari Iida performance parameters(priority, prefech size). 7987d0bab2SHiroshi DOYU 80efdf72adSColin Crossconfig TEGRA_EMC_SCALING_ENABLE 81efdf72adSColin Cross bool "Enable scaling the memory frequency" 8238376866SMark Brown 8390027225SStephen Warrenendmenu 84