1c5f80065SErik Gillingif ARCH_TEGRA 2c5f80065SErik Gilling 3c5f80065SErik Gillingcomment "NVIDIA Tegra options" 4c5f80065SErik Gilling 5c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC 644107d8bSPeter De Schrijver bool "Enable support for Tegra20 family" 71d328606SJoseph Lo select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 83c92db9aSErik Gilling select ARCH_REQUIRE_GPIOLIB 9f35b431dSStephen Warren select ARM_ERRATA_720789 1045c9e592SStephen Warren select ARM_ERRATA_742230 if SMP 11f35b431dSStephen Warren select ARM_ERRATA_751472 1245c9e592SStephen Warren select ARM_ERRATA_754327 if SMP 138f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 14b1b3f49cSRussell King select ARM_GIC 15b1b3f49cSRussell King select CPU_FREQ_TABLE if CPU_FREQ 16b1b3f49cSRussell King select CPU_V7 17b1b3f49cSRussell King select PINCTRL 18b1b3f49cSRussell King select PINCTRL_TEGRA20 19f35b431dSStephen Warren select PL310_ERRATA_727915 if CACHE_L2X0 20f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 21b1b3f49cSRussell King select USB_ARCH_HAS_EHCI if USB_SUPPORT 22b1b3f49cSRussell King select USB_ULPI if USB 23b1b3f49cSRussell King select USB_ULPI_VIEWPORT if USB_SUPPORT 24c5f80065SErik Gilling help 25c5f80065SErik Gilling Support for NVIDIA Tegra AP20 and T20 processors, based on the 26c5f80065SErik Gilling ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 27c5f80065SErik Gilling 2844107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC 2944107d8bSPeter De Schrijver bool "Enable support for Tegra30 family" 3044107d8bSPeter De Schrijver select ARCH_REQUIRE_GPIOLIB 31f35b431dSStephen Warren select ARM_ERRATA_743622 32f35b431dSStephen Warren select ARM_ERRATA_751472 33f35b431dSStephen Warren select ARM_ERRATA_754322 348f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 35b1b3f49cSRussell King select ARM_GIC 36013df388SArnd Bergmann select CPU_FREQ_TABLE if CPU_FREQ 37b1b3f49cSRussell King select CPU_V7 38b1b3f49cSRussell King select PINCTRL 39b1b3f49cSRussell King select PINCTRL_TEGRA30 40b1b3f49cSRussell King select PL310_ERRATA_769419 if CACHE_L2X0 41b1b3f49cSRussell King select USB_ARCH_HAS_EHCI if USB_SUPPORT 42b1b3f49cSRussell King select USB_ULPI if USB 43b1b3f49cSRussell King select USB_ULPI_VIEWPORT if USB_SUPPORT 4444107d8bSPeter De Schrijver help 4544107d8bSPeter De Schrijver Support for NVIDIA Tegra T30 processor family, based on the 4644107d8bSPeter De Schrijver ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 47c5f80065SErik Gilling 485c541b88SHiroshi Doyuconfig ARCH_TEGRA_114_SOC 495c541b88SHiroshi Doyu bool "Enable support for Tegra114 family" 505c541b88SHiroshi Doyu select ARM_GIC 515c541b88SHiroshi Doyu select CPU_V7 525c541b88SHiroshi Doyu select ARM_L1_CACHE_SHIFT_6 535c541b88SHiroshi Doyu select ARM_ARCH_TIMER 545c541b88SHiroshi Doyu help 555c541b88SHiroshi Doyu Support for NVIDIA Tegra T114 processor family, based on the 565c541b88SHiroshi Doyu ARM CortexA15MP CPU 575c541b88SHiroshi Doyu 5877ffc146SMike Rapoportconfig TEGRA_PCI 5977ffc146SMike Rapoport bool "PCI Express support" 60b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 6177ffc146SMike Rapoport select PCI 6277ffc146SMike Rapoport 6387d0bab2SHiroshi DOYUconfig TEGRA_AHB 6487d0bab2SHiroshi DOYU bool "Enable AHB driver for NVIDIA Tegra SoCs" 6587d0bab2SHiroshi DOYU default y 6687d0bab2SHiroshi DOYU help 6787d0bab2SHiroshi DOYU Adds AHB configuration functionality for NVIDIA Tegra SoCs, 6887d0bab2SHiroshi DOYU which controls AHB bus master arbitration and some 69e41e85ccSMasanari Iida performance parameters(priority, prefech size). 7087d0bab2SHiroshi DOYU 71efdf72adSColin Crossconfig TEGRA_EMC_SCALING_ENABLE 72efdf72adSColin Cross bool "Enable scaling the memory frequency" 7338376866SMark Brown 7438376866SMark Brownendif 75