190027225SStephen Warrenconfig ARCH_TEGRA 290027225SStephen Warren bool "NVIDIA Tegra" if ARCH_MULTI_V7 390027225SStephen Warren select ARCH_HAS_CPUFREQ 490027225SStephen Warren select ARCH_REQUIRE_GPIOLIB 520984c44SStephen Warren select ARM_GIC 690027225SStephen Warren select CLKDEV_LOOKUP 790027225SStephen Warren select CLKSRC_MMIO 890027225SStephen Warren select CLKSRC_OF 990027225SStephen Warren select COMMON_CLK 1020984c44SStephen Warren select CPU_V7 1190027225SStephen Warren select GENERIC_CLOCKEVENTS 124c3ffffdSStephen Boyd select HAVE_ARM_SCU if SMP 134c3ffffdSStephen Boyd select HAVE_ARM_TWD if LOCAL_TIMERS 1490027225SStephen Warren select HAVE_CLK 1590027225SStephen Warren select HAVE_SMP 1690027225SStephen Warren select MIGHT_HAVE_CACHE_L2X0 1720984c44SStephen Warren select PINCTRL 1890027225SStephen Warren select SOC_BUS 1990027225SStephen Warren select SPARSE_IRQ 2020984c44SStephen Warren select USB_ARCH_HAS_EHCI if USB_SUPPORT 2120984c44SStephen Warren select USB_ULPI if USB_PHY 2220984c44SStephen Warren select USB_ULPI_VIEWPORT if USB_PHY 2390027225SStephen Warren select USE_OF 2490027225SStephen Warren help 2590027225SStephen Warren This enables support for NVIDIA Tegra based systems. 26c5f80065SErik Gilling 2790027225SStephen Warrenmenu "NVIDIA Tegra options" 2890027225SStephen Warren depends on ARCH_TEGRA 29c5f80065SErik Gilling 30c5f80065SErik Gillingconfig ARCH_TEGRA_2x_SOC 3144107d8bSPeter De Schrijver bool "Enable support for Tegra20 family" 321d328606SJoseph Lo select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 33f35b431dSStephen Warren select ARM_ERRATA_720789 3445c9e592SStephen Warren select ARM_ERRATA_754327 if SMP 358f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 36b1b3f49cSRussell King select PINCTRL_TEGRA20 37f35b431dSStephen Warren select PL310_ERRATA_727915 if CACHE_L2X0 38f35b431dSStephen Warren select PL310_ERRATA_769419 if CACHE_L2X0 39c5f80065SErik Gilling help 40c5f80065SErik Gilling Support for NVIDIA Tegra AP20 and T20 processors, based on the 41c5f80065SErik Gilling ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 42c5f80065SErik Gilling 4344107d8bSPeter De Schrijverconfig ARCH_TEGRA_3x_SOC 4444107d8bSPeter De Schrijver bool "Enable support for Tegra30 family" 45f35b431dSStephen Warren select ARM_ERRATA_754322 468f90cce5SArnd Bergmann select ARM_ERRATA_764369 if SMP 47b1b3f49cSRussell King select PINCTRL_TEGRA30 48b1b3f49cSRussell King select PL310_ERRATA_769419 if CACHE_L2X0 4944107d8bSPeter De Schrijver help 5044107d8bSPeter De Schrijver Support for NVIDIA Tegra T30 processor family, based on the 5144107d8bSPeter De Schrijver ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 52c5f80065SErik Gilling 535c541b88SHiroshi Doyuconfig ARCH_TEGRA_114_SOC 545c541b88SHiroshi Doyu bool "Enable support for Tegra114 family" 55fb521a0dSMark Rutland select HAVE_ARM_ARCH_TIMER 56f2bd77c8SJoseph Lo select ARM_ERRATA_798181 571d7e5c2cSStephen Warren select ARM_L1_CACHE_SHIFT_6 5820fd4806SLaxman Dewangan select PINCTRL_TEGRA114 595c541b88SHiroshi Doyu help 605c541b88SHiroshi Doyu Support for NVIDIA Tegra T114 processor family, based on the 615c541b88SHiroshi Doyu ARM CortexA15MP CPU 625c541b88SHiroshi Doyu 6377ffc146SMike Rapoportconfig TEGRA_PCI 6477ffc146SMike Rapoport bool "PCI Express support" 65b2bbbc4dSPeter De Schrijver depends on ARCH_TEGRA_2x_SOC 6677ffc146SMike Rapoport select PCI 6777ffc146SMike Rapoport 6887d0bab2SHiroshi DOYUconfig TEGRA_AHB 6987d0bab2SHiroshi DOYU bool "Enable AHB driver for NVIDIA Tegra SoCs" 7087d0bab2SHiroshi DOYU default y 7187d0bab2SHiroshi DOYU help 7287d0bab2SHiroshi DOYU Adds AHB configuration functionality for NVIDIA Tegra SoCs, 7387d0bab2SHiroshi DOYU which controls AHB bus master arbitration and some 74e41e85ccSMasanari Iida performance parameters(priority, prefech size). 7587d0bab2SHiroshi DOYU 76efdf72adSColin Crossconfig TEGRA_EMC_SCALING_ENABLE 77efdf72adSColin Cross bool "Enable scaling the memory frequency" 7838376866SMark Brown 7990027225SStephen Warrenendmenu 80