1 /* 2 * Device Tree support for Allwinner A1X SoCs 3 * 4 * Copyright (C) 2012 Maxime Ripard 5 * 6 * Maxime Ripard <maxime.ripard@free-electrons.com> 7 * 8 * This file is licensed under the terms of the GNU General Public 9 * License version 2. This program is licensed "as is" without any 10 * warranty of any kind, whether express or implied. 11 */ 12 13 #include <linux/clk-provider.h> 14 #include <linux/clocksource.h> 15 #include <linux/delay.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/of_address.h> 19 #include <linux/of_irq.h> 20 #include <linux/of_platform.h> 21 #include <linux/io.h> 22 #include <linux/reboot.h> 23 24 #include <asm/mach/arch.h> 25 #include <asm/mach/map.h> 26 #include <asm/system_misc.h> 27 28 #define SUN4I_WATCHDOG_CTRL_REG 0x00 29 #define SUN4I_WATCHDOG_CTRL_RESTART BIT(0) 30 #define SUN4I_WATCHDOG_MODE_REG 0x04 31 #define SUN4I_WATCHDOG_MODE_ENABLE BIT(0) 32 #define SUN4I_WATCHDOG_MODE_RESET_ENABLE BIT(1) 33 34 #define SUN6I_WATCHDOG1_IRQ_REG 0x00 35 #define SUN6I_WATCHDOG1_CTRL_REG 0x10 36 #define SUN6I_WATCHDOG1_CTRL_RESTART BIT(0) 37 #define SUN6I_WATCHDOG1_CONFIG_REG 0x14 38 #define SUN6I_WATCHDOG1_CONFIG_RESTART BIT(0) 39 #define SUN6I_WATCHDOG1_CONFIG_IRQ BIT(1) 40 #define SUN6I_WATCHDOG1_MODE_REG 0x18 41 #define SUN6I_WATCHDOG1_MODE_ENABLE BIT(0) 42 43 static void __iomem *wdt_base; 44 45 static void sun4i_restart(enum reboot_mode mode, const char *cmd) 46 { 47 if (!wdt_base) 48 return; 49 50 /* Enable timer and set reset bit in the watchdog */ 51 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE, 52 wdt_base + SUN4I_WATCHDOG_MODE_REG); 53 54 /* 55 * Restart the watchdog. The default (and lowest) interval 56 * value for the watchdog is 0.5s. 57 */ 58 writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG); 59 60 while (1) { 61 mdelay(5); 62 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE, 63 wdt_base + SUN4I_WATCHDOG_MODE_REG); 64 } 65 } 66 67 static struct of_device_id sunxi_restart_ids[] = { 68 { .compatible = "allwinner,sun4i-a10-wdt" }, 69 { /*sentinel*/ } 70 }; 71 72 static void sunxi_setup_restart(void) 73 { 74 struct device_node *np; 75 76 np = of_find_matching_node(NULL, sunxi_restart_ids); 77 if (WARN(!np, "unable to setup watchdog restart")) 78 return; 79 80 wdt_base = of_iomap(np, 0); 81 WARN(!wdt_base, "failed to map watchdog base address"); 82 } 83 84 static void __init sunxi_dt_init(void) 85 { 86 sunxi_setup_restart(); 87 88 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 89 } 90 91 static const char * const sunxi_board_dt_compat[] = { 92 "allwinner,sun4i-a10", 93 "allwinner,sun5i-a10s", 94 "allwinner,sun5i-a13", 95 NULL, 96 }; 97 98 DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)") 99 .init_machine = sunxi_dt_init, 100 .dt_compat = sunxi_board_dt_compat, 101 .restart = sun4i_restart, 102 MACHINE_END 103 104 static const char * const sun6i_board_dt_compat[] = { 105 "allwinner,sun6i-a31", 106 NULL, 107 }; 108 109 extern void __init sun6i_reset_init(void); 110 static void __init sun6i_timer_init(void) 111 { 112 of_clk_init(NULL); 113 if (IS_ENABLED(CONFIG_RESET_CONTROLLER)) 114 sun6i_reset_init(); 115 clocksource_of_init(); 116 } 117 118 DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family") 119 .init_time = sun6i_timer_init, 120 .dt_compat = sun6i_board_dt_compat, 121 MACHINE_END 122 123 static const char * const sun7i_board_dt_compat[] = { 124 "allwinner,sun7i-a20", 125 NULL, 126 }; 127 128 DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family") 129 .init_machine = sunxi_dt_init, 130 .dt_compat = sun7i_board_dt_compat, 131 .restart = sun4i_restart, 132 MACHINE_END 133