1*c164620aSArnd Bergmann /* 2*c164620aSArnd Bergmann * SPEAr3xx/6xx Machine family specific definition 3*c164620aSArnd Bergmann * 4*c164620aSArnd Bergmann * Copyright (C) 2009,2012 ST Microelectronics 5*c164620aSArnd Bergmann * Rajeev Kumar<rajeev-dlh.kumar@st.com> 6*c164620aSArnd Bergmann * Viresh Kumar <vireshk@kernel.org> 7*c164620aSArnd Bergmann * 8*c164620aSArnd Bergmann * This file is licensed under the terms of the GNU General Public 9*c164620aSArnd Bergmann * License version 2. This program is licensed "as is" without any 10*c164620aSArnd Bergmann * warranty of any kind, whether express or implied. 11*c164620aSArnd Bergmann */ 12*c164620aSArnd Bergmann 13*c164620aSArnd Bergmann #ifndef __MACH_SPEAR_H 14*c164620aSArnd Bergmann #define __MACH_SPEAR_H 15*c164620aSArnd Bergmann 16*c164620aSArnd Bergmann #include <asm/memory.h> 17*c164620aSArnd Bergmann 18*c164620aSArnd Bergmann #if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX) 19*c164620aSArnd Bergmann 20*c164620aSArnd Bergmann /* ICM1 - Low speed connection */ 21*c164620aSArnd Bergmann #define SPEAR_ICM1_2_BASE UL(0xD0000000) 22*c164620aSArnd Bergmann #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000) 23*c164620aSArnd Bergmann #define SPEAR_ICM1_UART_BASE UL(0xD0000000) 24*c164620aSArnd Bergmann #define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE) 25*c164620aSArnd Bergmann #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) 26*c164620aSArnd Bergmann 27*c164620aSArnd Bergmann /* ML-1, 2 - Multi Layer CPU Subsystem */ 28*c164620aSArnd Bergmann #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) 29*c164620aSArnd Bergmann #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000) 30*c164620aSArnd Bergmann 31*c164620aSArnd Bergmann /* ICM3 - Basic Subsystem */ 32*c164620aSArnd Bergmann #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) 33*c164620aSArnd Bergmann #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000) 34*c164620aSArnd Bergmann #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) 35*c164620aSArnd Bergmann #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) 36*c164620aSArnd Bergmann #define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE) 37*c164620aSArnd Bergmann #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) 38*c164620aSArnd Bergmann #define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE) 39*c164620aSArnd Bergmann 40*c164620aSArnd Bergmann /* Debug uart for linux, will be used for debug and uncompress messages */ 41*c164620aSArnd Bergmann #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE 42*c164620aSArnd Bergmann 43*c164620aSArnd Bergmann /* Sysctl base for spear platform */ 44*c164620aSArnd Bergmann #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE 45*c164620aSArnd Bergmann #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE 46*c164620aSArnd Bergmann #endif /* SPEAR3xx || SPEAR6XX */ 47*c164620aSArnd Bergmann 48*c164620aSArnd Bergmann /* SPEAr320 Macros */ 49*c164620aSArnd Bergmann #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) 50*c164620aSArnd Bergmann #define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000) 51*c164620aSArnd Bergmann 52*c164620aSArnd Bergmann #ifdef CONFIG_ARCH_SPEAR13XX 53*c164620aSArnd Bergmann 54*c164620aSArnd Bergmann #define PERIP_GRP2_BASE UL(0xB3000000) 55*c164620aSArnd Bergmann #define VA_PERIP_GRP2_BASE IOMEM(0xF9000000) 56*c164620aSArnd Bergmann #define MCIF_SDHCI_BASE UL(0xB3000000) 57*c164620aSArnd Bergmann #define SYSRAM0_BASE UL(0xB3800000) 58*c164620aSArnd Bergmann #define VA_SYSRAM0_BASE IOMEM(0xF9800000) 59*c164620aSArnd Bergmann #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) 60*c164620aSArnd Bergmann 61*c164620aSArnd Bergmann #define PERIP_GRP1_BASE UL(0xE0000000) 62*c164620aSArnd Bergmann #define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) 63*c164620aSArnd Bergmann #define UART_BASE UL(0xE0000000) 64*c164620aSArnd Bergmann #define VA_UART_BASE IOMEM(0xFD000000) 65*c164620aSArnd Bergmann #define SSP_BASE UL(0xE0100000) 66*c164620aSArnd Bergmann #define MISC_BASE UL(0xE0700000) 67*c164620aSArnd Bergmann #define VA_MISC_BASE IOMEM(0xFD700000) 68*c164620aSArnd Bergmann 69*c164620aSArnd Bergmann #define A9SM_AND_MPMC_BASE UL(0xEC000000) 70*c164620aSArnd Bergmann #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) 71*c164620aSArnd Bergmann 72*c164620aSArnd Bergmann #define SPEAR1310_RAS_BASE UL(0xD8400000) 73*c164620aSArnd Bergmann #define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000)) 74*c164620aSArnd Bergmann 75*c164620aSArnd Bergmann /* A9SM peripheral offsets */ 76*c164620aSArnd Bergmann #define A9SM_PERIP_BASE UL(0xEC800000) 77*c164620aSArnd Bergmann #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) 78*c164620aSArnd Bergmann #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) 79*c164620aSArnd Bergmann 80*c164620aSArnd Bergmann #define L2CC_BASE UL(0xED000000) 81*c164620aSArnd Bergmann #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) 82*c164620aSArnd Bergmann 83*c164620aSArnd Bergmann /* others */ 84*c164620aSArnd Bergmann #define MCIF_CF_BASE UL(0xB2800000) 85*c164620aSArnd Bergmann 86*c164620aSArnd Bergmann /* Debug uart for linux, will be used for debug and uncompress messages */ 87*c164620aSArnd Bergmann #define SPEAR_DBG_UART_BASE UART_BASE 88*c164620aSArnd Bergmann 89*c164620aSArnd Bergmann #endif /* SPEAR13XX */ 90*c164620aSArnd Bergmann 91*c164620aSArnd Bergmann #endif /* __MACH_SPEAR_H */ 92