10fdebc5eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2c164620aSArnd Bergmann /* 3c164620aSArnd Bergmann * SPEAr3xx/6xx Machine family specific definition 4c164620aSArnd Bergmann * 5c164620aSArnd Bergmann * Copyright (C) 2009,2012 ST Microelectronics 6c164620aSArnd Bergmann * Rajeev Kumar<rajeev-dlh.kumar@st.com> 7c164620aSArnd Bergmann * Viresh Kumar <vireshk@kernel.org> 8c164620aSArnd Bergmann */ 9c164620aSArnd Bergmann 10c164620aSArnd Bergmann #ifndef __MACH_SPEAR_H 11c164620aSArnd Bergmann #define __MACH_SPEAR_H 12c164620aSArnd Bergmann 13*a9ff6961SLinus Walleij #include <asm/page.h> 14c164620aSArnd Bergmann 15c164620aSArnd Bergmann #if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX) 16c164620aSArnd Bergmann 17c164620aSArnd Bergmann /* ICM1 - Low speed connection */ 18c164620aSArnd Bergmann #define SPEAR_ICM1_2_BASE UL(0xD0000000) 19c164620aSArnd Bergmann #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000) 20c164620aSArnd Bergmann #define SPEAR_ICM1_UART_BASE UL(0xD0000000) 21c164620aSArnd Bergmann #define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE) 22c164620aSArnd Bergmann #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) 23c164620aSArnd Bergmann 24c164620aSArnd Bergmann /* ML-1, 2 - Multi Layer CPU Subsystem */ 25c164620aSArnd Bergmann #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) 26c164620aSArnd Bergmann #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000) 27c164620aSArnd Bergmann 28c164620aSArnd Bergmann /* ICM3 - Basic Subsystem */ 29c164620aSArnd Bergmann #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) 30c164620aSArnd Bergmann #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000) 31c164620aSArnd Bergmann #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) 32c164620aSArnd Bergmann #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) 33c164620aSArnd Bergmann #define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE) 34c164620aSArnd Bergmann #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) 35c164620aSArnd Bergmann #define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE) 36c164620aSArnd Bergmann 37c164620aSArnd Bergmann /* Debug uart for linux, will be used for debug and uncompress messages */ 38c164620aSArnd Bergmann #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE 39c164620aSArnd Bergmann 40c164620aSArnd Bergmann /* Sysctl base for spear platform */ 41c164620aSArnd Bergmann #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE 42c164620aSArnd Bergmann #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE 43c164620aSArnd Bergmann #endif /* SPEAR3xx || SPEAR6XX */ 44c164620aSArnd Bergmann 45c164620aSArnd Bergmann /* SPEAr320 Macros */ 46c164620aSArnd Bergmann #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) 47c164620aSArnd Bergmann #define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000) 48c164620aSArnd Bergmann 49c164620aSArnd Bergmann #ifdef CONFIG_ARCH_SPEAR13XX 50c164620aSArnd Bergmann 51c164620aSArnd Bergmann #define PERIP_GRP2_BASE UL(0xB3000000) 52c164620aSArnd Bergmann #define VA_PERIP_GRP2_BASE IOMEM(0xF9000000) 53c164620aSArnd Bergmann #define MCIF_SDHCI_BASE UL(0xB3000000) 54c164620aSArnd Bergmann #define SYSRAM0_BASE UL(0xB3800000) 55c164620aSArnd Bergmann #define VA_SYSRAM0_BASE IOMEM(0xF9800000) 56c164620aSArnd Bergmann #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) 57c164620aSArnd Bergmann 58c164620aSArnd Bergmann #define PERIP_GRP1_BASE UL(0xE0000000) 59c164620aSArnd Bergmann #define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) 60c164620aSArnd Bergmann #define UART_BASE UL(0xE0000000) 61c164620aSArnd Bergmann #define VA_UART_BASE IOMEM(0xFD000000) 62c164620aSArnd Bergmann #define SSP_BASE UL(0xE0100000) 63c164620aSArnd Bergmann #define MISC_BASE UL(0xE0700000) 64c164620aSArnd Bergmann #define VA_MISC_BASE IOMEM(0xFD700000) 65c164620aSArnd Bergmann 66c164620aSArnd Bergmann #define A9SM_AND_MPMC_BASE UL(0xEC000000) 67c164620aSArnd Bergmann #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) 68c164620aSArnd Bergmann 69c164620aSArnd Bergmann #define SPEAR1310_RAS_BASE UL(0xD8400000) 70c164620aSArnd Bergmann #define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000)) 71c164620aSArnd Bergmann 72c164620aSArnd Bergmann /* A9SM peripheral offsets */ 73c164620aSArnd Bergmann #define A9SM_PERIP_BASE UL(0xEC800000) 74c164620aSArnd Bergmann #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) 75c164620aSArnd Bergmann #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) 76c164620aSArnd Bergmann 77c164620aSArnd Bergmann #define L2CC_BASE UL(0xED000000) 78c164620aSArnd Bergmann #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) 79c164620aSArnd Bergmann 80c164620aSArnd Bergmann /* others */ 81c164620aSArnd Bergmann #define MCIF_CF_BASE UL(0xB2800000) 82c164620aSArnd Bergmann 83c164620aSArnd Bergmann /* Debug uart for linux, will be used for debug and uncompress messages */ 84c164620aSArnd Bergmann #define SPEAR_DBG_UART_BASE UART_BASE 85c164620aSArnd Bergmann 86c164620aSArnd Bergmann #endif /* SPEAR13XX */ 87c164620aSArnd Bergmann 88c164620aSArnd Bergmann #endif /* __MACH_SPEAR_H */ 89