xref: /openbmc/linux/arch/arm/mach-socfpga/socfpga.c (revision d0b73b48)
1 /*
2  *  Copyright (C) 2012 Altera Corporation
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17 #include <linux/dw_apb_timer.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 
22 #include <asm/hardware/cache-l2x0.h>
23 #include <asm/hardware/gic.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 
27 #include "core.h"
28 
29 void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE));
30 void __iomem *sys_manager_base_addr;
31 void __iomem *rst_manager_base_addr;
32 
33 static struct map_desc scu_io_desc __initdata = {
34 	.virtual	= SOCFPGA_SCU_VIRT_BASE,
35 	.pfn		= 0, /* run-time */
36 	.length		= SZ_8K,
37 	.type		= MT_DEVICE,
38 };
39 
40 static struct map_desc uart_io_desc __initdata = {
41 	.virtual	= 0xfec02000,
42 	.pfn		= __phys_to_pfn(0xffc02000),
43 	.length		= SZ_8K,
44 	.type		= MT_DEVICE,
45 };
46 
47 static void __init socfpga_scu_map_io(void)
48 {
49 	unsigned long base;
50 
51 	/* Get SCU base */
52 	asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
53 
54 	scu_io_desc.pfn = __phys_to_pfn(base);
55 	iotable_init(&scu_io_desc, 1);
56 }
57 
58 static void __init socfpga_map_io(void)
59 {
60 	socfpga_scu_map_io();
61 	iotable_init(&uart_io_desc, 1);
62 	early_printk("Early printk initialized\n");
63 }
64 
65 const static struct of_device_id irq_match[] = {
66 	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
67 	{}
68 };
69 
70 void __init socfpga_sysmgr_init(void)
71 {
72 	struct device_node *np;
73 
74 	np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr");
75 	sys_manager_base_addr = of_iomap(np, 0);
76 
77 	np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
78 	rst_manager_base_addr = of_iomap(np, 0);
79 }
80 
81 static void __init gic_init_irq(void)
82 {
83 	of_irq_init(irq_match);
84 	socfpga_sysmgr_init();
85 }
86 
87 static void socfpga_cyclone5_restart(char mode, const char *cmd)
88 {
89 	/* TODO: */
90 }
91 
92 static void __init socfpga_cyclone5_init(void)
93 {
94 	l2x0_of_init(0, ~0UL);
95 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
96 	socfpga_init_clocks();
97 }
98 
99 static const char *altera_dt_match[] = {
100 	"altr,socfpga",
101 	"altr,socfpga-cyclone5",
102 	NULL
103 };
104 
105 DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
106 	.smp		= smp_ops(socfpga_smp_ops),
107 	.map_io		= socfpga_map_io,
108 	.init_irq	= gic_init_irq,
109 	.handle_irq     = gic_handle_irq,
110 	.timer		= &dw_apb_timer,
111 	.init_machine	= socfpga_cyclone5_init,
112 	.restart	= socfpga_cyclone5_restart,
113 	.dt_compat	= altera_dt_match,
114 MACHINE_END
115