xref: /openbmc/linux/arch/arm/mach-socfpga/platsmp.c (revision 80ecbd24)
1 /*
2  * Copyright 2010-2011 Calxeda, Inc.
3  * Copyright 2012 Pavel Machek <pavel@denx.de>
4  * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
5  * Copyright (C) 2012 Altera Corporation
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms and conditions of the GNU General Public License,
9  * version 2, as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/smp.h>
22 #include <linux/io.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 
26 #include <asm/cacheflush.h>
27 #include <asm/smp_scu.h>
28 #include <asm/smp_plat.h>
29 
30 #include "core.h"
31 
32 static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
33 {
34 	int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
35 
36 	if (cpu1start_addr) {
37 		memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
38 
39 		__raw_writel(virt_to_phys(socfpga_secondary_startup),
40 			(sys_manager_base_addr + (cpu1start_addr & 0x000000ff)));
41 
42 		flush_cache_all();
43 		smp_wmb();
44 		outer_clean_range(0, trampoline_size);
45 
46 		/* This will release CPU #1 out of reset.*/
47 		__raw_writel(0, rst_manager_base_addr + 0x10);
48 	}
49 
50 	return 0;
51 }
52 
53 /*
54  * Initialise the CPU possible map early - this describes the CPUs
55  * which may be present or become present in the system.
56  */
57 static void __init socfpga_smp_init_cpus(void)
58 {
59 	unsigned int i, ncores;
60 
61 	ncores = scu_get_core_count(socfpga_scu_base_addr);
62 
63 	for (i = 0; i < ncores; i++)
64 		set_cpu_possible(i, true);
65 
66 	/* sanity check */
67 	if (ncores > num_possible_cpus()) {
68 		pr_warn("socfpga: no. of cores (%d) greater than configured"
69 			"maximum of %d - clipping\n", ncores, num_possible_cpus());
70 		ncores = num_possible_cpus();
71 	}
72 
73 	for (i = 0; i < ncores; i++)
74 		set_cpu_possible(i, true);
75 }
76 
77 static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
78 {
79 	scu_enable(socfpga_scu_base_addr);
80 }
81 
82 /*
83  * platform-specific code to shutdown a CPU
84  *
85  * Called with IRQs disabled
86  */
87 static void socfpga_cpu_die(unsigned int cpu)
88 {
89 	cpu_do_idle();
90 
91 	/* We should have never returned from idle */
92 	panic("cpu %d unexpectedly exit from shutdown\n", cpu);
93 }
94 
95 struct smp_operations socfpga_smp_ops __initdata = {
96 	.smp_init_cpus		= socfpga_smp_init_cpus,
97 	.smp_prepare_cpus	= socfpga_smp_prepare_cpus,
98 	.smp_boot_secondary	= socfpga_boot_secondary,
99 #ifdef CONFIG_HOTPLUG_CPU
100 	.cpu_die		= socfpga_cpu_die,
101 #endif
102 };
103