16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 256d9598e2SMagnus Damm #include <linux/platform_device.h> 2648609533SSimon Horman #include <linux/of_platform.h> 276d9598e2SMagnus Damm #include <linux/delay.h> 286d9598e2SMagnus Damm #include <linux/input.h> 296d9598e2SMagnus Damm #include <linux/io.h> 306d9598e2SMagnus Damm #include <linux/serial_sci.h> 31681e1b3eSMagnus Damm #include <linux/sh_dma.h> 326d9598e2SMagnus Damm #include <linux/sh_timer.h> 339a27dee7SHideki EIRAKU #include <linux/platform_data/sh_ipmmu.h> 34341eb546SMagnus Damm #include <linux/platform_data/irq-renesas-intc-irqpin.h> 35ded59d6dSGeert Uytterhoeven 366d9598e2SMagnus Damm #include <asm/mach-types.h> 3750e15c34SMagnus Damm #include <asm/mach/map.h> 386d9598e2SMagnus Damm #include <asm/mach/arch.h> 393be26fdbSMagnus Damm #include <asm/mach/time.h> 40ded59d6dSGeert Uytterhoeven 41fd44aa5eSMagnus Damm #include "common.h" 4274ac0de8SMagnus Damm #include "dma-register.h" 43b6bab126SMagnus Damm #include "irqs.h" 44ded59d6dSGeert Uytterhoeven #include "sh73a0.h" 456d9598e2SMagnus Damm 4650e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4750e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4850e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4950e15c34SMagnus Damm */ 5050e15c34SMagnus Damm { 5150e15c34SMagnus Damm .virtual = 0xe6000000, 5250e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5350e15c34SMagnus Damm .length = 256 << 20, 5450e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5550e15c34SMagnus Damm }, 5650e15c34SMagnus Damm }; 5750e15c34SMagnus Damm 5850e15c34SMagnus Damm void __init sh73a0_map_io(void) 5950e15c34SMagnus Damm { 6050e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 6150e15c34SMagnus Damm } 6250e15c34SMagnus Damm 63474f6758SMagnus Damm /* PFC */ 64474f6758SMagnus Damm static struct resource pfc_resources[] __initdata = { 65474f6758SMagnus Damm DEFINE_RES_MEM(0xe6050000, 0x8000), 66474f6758SMagnus Damm DEFINE_RES_MEM(0xe605801c, 0x000c), 67994d66a4SLaurent Pinchart }; 68994d66a4SLaurent Pinchart 69994d66a4SLaurent Pinchart void __init sh73a0_pinmux_init(void) 70994d66a4SLaurent Pinchart { 71474f6758SMagnus Damm platform_device_register_simple("pfc-sh73a0", -1, pfc_resources, 72474f6758SMagnus Damm ARRAY_SIZE(pfc_resources)); 73994d66a4SLaurent Pinchart } 74994d66a4SLaurent Pinchart 75d000fff9SLaurent Pinchart /* SCIF */ 76d000fff9SLaurent Pinchart #define SH73A0_SCIF(scif_type, index, baseaddr, irq) \ 77d000fff9SLaurent Pinchart static struct plat_sci_port scif##index##_platform_data = { \ 78d000fff9SLaurent Pinchart .type = scif_type, \ 79d000fff9SLaurent Pinchart .flags = UPF_BOOT_AUTOCONF, \ 80d000fff9SLaurent Pinchart .scscr = SCSCR_RE | SCSCR_TE, \ 81d000fff9SLaurent Pinchart }; \ 82d000fff9SLaurent Pinchart \ 8331e1ee86SLaurent Pinchart static struct resource scif##index##_resources[] = { \ 8431e1ee86SLaurent Pinchart DEFINE_RES_MEM(baseaddr, 0x100), \ 8531e1ee86SLaurent Pinchart DEFINE_RES_IRQ(irq), \ 8631e1ee86SLaurent Pinchart }; \ 8731e1ee86SLaurent Pinchart \ 88d000fff9SLaurent Pinchart static struct platform_device scif##index##_device = { \ 89d000fff9SLaurent Pinchart .name = "sh-sci", \ 90d000fff9SLaurent Pinchart .id = index, \ 9131e1ee86SLaurent Pinchart .resource = scif##index##_resources, \ 9231e1ee86SLaurent Pinchart .num_resources = ARRAY_SIZE(scif##index##_resources), \ 93d000fff9SLaurent Pinchart .dev = { \ 94d000fff9SLaurent Pinchart .platform_data = &scif##index##_platform_data, \ 95d000fff9SLaurent Pinchart }, \ 96d000fff9SLaurent Pinchart } 976d9598e2SMagnus Damm 98d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(72)); 99d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(73)); 100d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(74)); 101d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(75)); 102d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(78)); 103d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(79)); 104d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156)); 105d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143)); 106d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80)); 1076d9598e2SMagnus Damm 108652256fdSLaurent Pinchart static struct sh_timer_config cmt1_platform_data = { 109652256fdSLaurent Pinchart .channels_mask = 0x3f, 1106d9598e2SMagnus Damm }; 1116d9598e2SMagnus Damm 112652256fdSLaurent Pinchart static struct resource cmt1_resources[] = { 113652256fdSLaurent Pinchart DEFINE_RES_MEM(0xe6138000, 0x200), 114652256fdSLaurent Pinchart DEFINE_RES_IRQ(gic_spi(65)), 1156d9598e2SMagnus Damm }; 1166d9598e2SMagnus Damm 117652256fdSLaurent Pinchart static struct platform_device cmt1_device = { 118652256fdSLaurent Pinchart .name = "sh-cmt-48", 119652256fdSLaurent Pinchart .id = 1, 1206d9598e2SMagnus Damm .dev = { 121652256fdSLaurent Pinchart .platform_data = &cmt1_platform_data, 1226d9598e2SMagnus Damm }, 123652256fdSLaurent Pinchart .resource = cmt1_resources, 124652256fdSLaurent Pinchart .num_resources = ARRAY_SIZE(cmt1_resources), 1256d9598e2SMagnus Damm }; 1266d9598e2SMagnus Damm 1275010f3dbSMagnus Damm /* TMU */ 1283df592bcSLaurent Pinchart static struct sh_timer_config tmu0_platform_data = { 1293df592bcSLaurent Pinchart .channels_mask = 7, 1305010f3dbSMagnus Damm }; 1315010f3dbSMagnus Damm 1323df592bcSLaurent Pinchart static struct resource tmu0_resources[] = { 1333df592bcSLaurent Pinchart DEFINE_RES_MEM(0xfff60000, 0x2c), 1343df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xe80)), 1353df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xea0)), 1363df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xec0)), 1375010f3dbSMagnus Damm }; 1385010f3dbSMagnus Damm 1393df592bcSLaurent Pinchart static struct platform_device tmu0_device = { 1403df592bcSLaurent Pinchart .name = "sh-tmu", 1415010f3dbSMagnus Damm .id = 0, 1425010f3dbSMagnus Damm .dev = { 1433df592bcSLaurent Pinchart .platform_data = &tmu0_platform_data, 1445010f3dbSMagnus Damm }, 1453df592bcSLaurent Pinchart .resource = tmu0_resources, 1463df592bcSLaurent Pinchart .num_resources = ARRAY_SIZE(tmu0_resources), 1475010f3dbSMagnus Damm }; 1485010f3dbSMagnus Damm 149b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 1508e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6820000, 0x426), 151b028f94bSYoshii Takashi [1] = { 152b028f94bSYoshii Takashi .start = gic_spi(167), 153b028f94bSYoshii Takashi .end = gic_spi(170), 154b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 155b028f94bSYoshii Takashi }, 156b028f94bSYoshii Takashi }; 157b028f94bSYoshii Takashi 158b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 1598e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6822000, 0x426), 160b028f94bSYoshii Takashi [1] = { 161b028f94bSYoshii Takashi .start = gic_spi(51), 162b028f94bSYoshii Takashi .end = gic_spi(54), 163b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 164b028f94bSYoshii Takashi }, 165b028f94bSYoshii Takashi }; 166b028f94bSYoshii Takashi 167b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 1688e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6824000, 0x426), 169b028f94bSYoshii Takashi [1] = { 170b028f94bSYoshii Takashi .start = gic_spi(171), 171b028f94bSYoshii Takashi .end = gic_spi(174), 172b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 173b028f94bSYoshii Takashi }, 174b028f94bSYoshii Takashi }; 175b028f94bSYoshii Takashi 176b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 1778e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6826000, 0x426), 178b028f94bSYoshii Takashi [1] = { 179b028f94bSYoshii Takashi .start = gic_spi(183), 180b028f94bSYoshii Takashi .end = gic_spi(186), 181b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 182b028f94bSYoshii Takashi }, 183b028f94bSYoshii Takashi }; 184b028f94bSYoshii Takashi 185b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 1868e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6828000, 0x426), 187b028f94bSYoshii Takashi [1] = { 188b028f94bSYoshii Takashi .start = gic_spi(187), 189b028f94bSYoshii Takashi .end = gic_spi(190), 190b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 191b028f94bSYoshii Takashi }, 192b028f94bSYoshii Takashi }; 193b028f94bSYoshii Takashi 194b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 195b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 196b028f94bSYoshii Takashi .id = 0, 197b028f94bSYoshii Takashi .resource = i2c0_resources, 198b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 199b028f94bSYoshii Takashi }; 200b028f94bSYoshii Takashi 201b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 202b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 203b028f94bSYoshii Takashi .id = 1, 204b028f94bSYoshii Takashi .resource = i2c1_resources, 205b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 206b028f94bSYoshii Takashi }; 207b028f94bSYoshii Takashi 208b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 209b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 210b028f94bSYoshii Takashi .id = 2, 211b028f94bSYoshii Takashi .resource = i2c2_resources, 212b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 213b028f94bSYoshii Takashi }; 214b028f94bSYoshii Takashi 215b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 216b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 217b028f94bSYoshii Takashi .id = 3, 218b028f94bSYoshii Takashi .resource = i2c3_resources, 219b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 220b028f94bSYoshii Takashi }; 221b028f94bSYoshii Takashi 222b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 223b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 224b028f94bSYoshii Takashi .id = 4, 225b028f94bSYoshii Takashi .resource = i2c4_resources, 226b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 227b028f94bSYoshii Takashi }; 228b028f94bSYoshii Takashi 229681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 230681e1b3eSMagnus Damm { 231681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 232681e1b3eSMagnus Damm .addr = 0xe6c40020, 233681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 234681e1b3eSMagnus Damm .mid_rid = 0x21, 235681e1b3eSMagnus Damm }, { 236681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 237681e1b3eSMagnus Damm .addr = 0xe6c40024, 238681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 239681e1b3eSMagnus Damm .mid_rid = 0x22, 240681e1b3eSMagnus Damm }, { 241681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 242681e1b3eSMagnus Damm .addr = 0xe6c50020, 243681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 244681e1b3eSMagnus Damm .mid_rid = 0x25, 245681e1b3eSMagnus Damm }, { 246681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 247681e1b3eSMagnus Damm .addr = 0xe6c50024, 248681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 249681e1b3eSMagnus Damm .mid_rid = 0x26, 250681e1b3eSMagnus Damm }, { 251681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 252681e1b3eSMagnus Damm .addr = 0xe6c60020, 253681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 254681e1b3eSMagnus Damm .mid_rid = 0x29, 255681e1b3eSMagnus Damm }, { 256681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 257681e1b3eSMagnus Damm .addr = 0xe6c60024, 258681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 259681e1b3eSMagnus Damm .mid_rid = 0x2a, 260681e1b3eSMagnus Damm }, { 261681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 262681e1b3eSMagnus Damm .addr = 0xe6c70020, 263681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 264681e1b3eSMagnus Damm .mid_rid = 0x2d, 265681e1b3eSMagnus Damm }, { 266681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 267681e1b3eSMagnus Damm .addr = 0xe6c70024, 268681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 269681e1b3eSMagnus Damm .mid_rid = 0x2e, 270681e1b3eSMagnus Damm }, { 271681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 272681e1b3eSMagnus Damm .addr = 0xe6c80020, 273681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 274681e1b3eSMagnus Damm .mid_rid = 0x39, 275681e1b3eSMagnus Damm }, { 276681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 277681e1b3eSMagnus Damm .addr = 0xe6c80024, 278681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 279681e1b3eSMagnus Damm .mid_rid = 0x3a, 280681e1b3eSMagnus Damm }, { 281681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 282681e1b3eSMagnus Damm .addr = 0xe6cb0020, 283681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 284681e1b3eSMagnus Damm .mid_rid = 0x35, 285681e1b3eSMagnus Damm }, { 286681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 287681e1b3eSMagnus Damm .addr = 0xe6cb0024, 288681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 289681e1b3eSMagnus Damm .mid_rid = 0x36, 290681e1b3eSMagnus Damm }, { 291681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 292681e1b3eSMagnus Damm .addr = 0xe6cc0020, 293681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 294681e1b3eSMagnus Damm .mid_rid = 0x1d, 295681e1b3eSMagnus Damm }, { 296681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 297681e1b3eSMagnus Damm .addr = 0xe6cc0024, 298681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 299681e1b3eSMagnus Damm .mid_rid = 0x1e, 300681e1b3eSMagnus Damm }, { 301681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 302681e1b3eSMagnus Damm .addr = 0xe6cd0020, 303681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 304681e1b3eSMagnus Damm .mid_rid = 0x19, 305681e1b3eSMagnus Damm }, { 306681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 307681e1b3eSMagnus Damm .addr = 0xe6cd0024, 308681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 309681e1b3eSMagnus Damm .mid_rid = 0x1a, 310681e1b3eSMagnus Damm }, { 311681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 312681e1b3eSMagnus Damm .addr = 0xe6c30040, 313681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 314681e1b3eSMagnus Damm .mid_rid = 0x3d, 315681e1b3eSMagnus Damm }, { 316681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 317681e1b3eSMagnus Damm .addr = 0xe6c30060, 318681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 319681e1b3eSMagnus Damm .mid_rid = 0x3e, 320681e1b3eSMagnus Damm }, { 321681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 322681e1b3eSMagnus Damm .addr = 0xee100030, 323681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 324681e1b3eSMagnus Damm .mid_rid = 0xc1, 325681e1b3eSMagnus Damm }, { 326681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 327681e1b3eSMagnus Damm .addr = 0xee100030, 328681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 329681e1b3eSMagnus Damm .mid_rid = 0xc2, 330681e1b3eSMagnus Damm }, { 331681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 332681e1b3eSMagnus Damm .addr = 0xee120030, 333681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 334681e1b3eSMagnus Damm .mid_rid = 0xc9, 335681e1b3eSMagnus Damm }, { 336681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 337681e1b3eSMagnus Damm .addr = 0xee120030, 338681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 339681e1b3eSMagnus Damm .mid_rid = 0xca, 340681e1b3eSMagnus Damm }, { 341681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 342681e1b3eSMagnus Damm .addr = 0xee140030, 343681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 344681e1b3eSMagnus Damm .mid_rid = 0xcd, 345681e1b3eSMagnus Damm }, { 346681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 347681e1b3eSMagnus Damm .addr = 0xee140030, 348681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 349681e1b3eSMagnus Damm .mid_rid = 0xce, 350681e1b3eSMagnus Damm }, { 351681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 352681e1b3eSMagnus Damm .addr = 0xe6bd0034, 353681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 354681e1b3eSMagnus Damm .mid_rid = 0xd1, 355681e1b3eSMagnus Damm }, { 356681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 357681e1b3eSMagnus Damm .addr = 0xe6bd0034, 358681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 359681e1b3eSMagnus Damm .mid_rid = 0xd2, 360681e1b3eSMagnus Damm }, 361681e1b3eSMagnus Damm }; 362681e1b3eSMagnus Damm 363681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 364681e1b3eSMagnus Damm { \ 365681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 366681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 367681e1b3eSMagnus Damm } 368681e1b3eSMagnus Damm 369681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 370681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 371681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 372681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 373681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 374681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 375681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 376681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 377681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 378681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 379681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 380681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 381681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 382681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 383681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 384681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 385681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 386681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 387681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 388681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 389681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 390681e1b3eSMagnus Damm }; 391681e1b3eSMagnus Damm 392681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 393681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 394681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 395681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 396681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 3976088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 3986088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 3996088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 4006088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 4016088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 4026088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 403681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 404681e1b3eSMagnus Damm }; 405681e1b3eSMagnus Damm 406681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 407abbec5f4SSimon Horman DEFINE_RES_MEM(0xfe000020, 0x89e0), 408681e1b3eSMagnus Damm { 40920052462SShimoda, Yoshihiro .name = "error_irq", 410681e1b3eSMagnus Damm .start = gic_spi(129), 411681e1b3eSMagnus Damm .end = gic_spi(129), 412681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 413681e1b3eSMagnus Damm }, 414681e1b3eSMagnus Damm { 415681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 416681e1b3eSMagnus Damm .start = gic_spi(109), 417681e1b3eSMagnus Damm .end = gic_spi(128), 418681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 419681e1b3eSMagnus Damm }, 420681e1b3eSMagnus Damm }; 421681e1b3eSMagnus Damm 422681e1b3eSMagnus Damm static struct platform_device dma0_device = { 423681e1b3eSMagnus Damm .name = "sh-dma-engine", 424681e1b3eSMagnus Damm .id = 0, 425681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 426681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 427681e1b3eSMagnus Damm .dev = { 428681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 429681e1b3eSMagnus Damm }, 430681e1b3eSMagnus Damm }; 431681e1b3eSMagnus Damm 432832290b2SKuninori Morimoto /* MPDMAC */ 433832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 434832290b2SKuninori Morimoto { 435832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 436832290b2SKuninori Morimoto .addr = 0xec230020, 437832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 438832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 439832290b2SKuninori Morimoto }, { 440832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 441832290b2SKuninori Morimoto .addr = 0xec230024, 442832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 443832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 444832290b2SKuninori Morimoto }, { 445832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 446832290b2SKuninori Morimoto .addr = 0xec230060, 447832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 448832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 449832290b2SKuninori Morimoto }, { 450832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 451832290b2SKuninori Morimoto .addr = 0xec230064, 452832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 453832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 454832290b2SKuninori Morimoto }, { 455832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 456832290b2SKuninori Morimoto .addr = 0xec240020, 457832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 458832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 459832290b2SKuninori Morimoto }, { 460832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 461832290b2SKuninori Morimoto .addr = 0xec240024, 462832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 463832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 464832290b2SKuninori Morimoto }, { 465832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 466832290b2SKuninori Morimoto .addr = 0xec240060, 467832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 468832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 469832290b2SKuninori Morimoto }, 470832290b2SKuninori Morimoto }; 471832290b2SKuninori Morimoto 472832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 473832290b2SKuninori Morimoto { \ 474832290b2SKuninori Morimoto .offset = a, \ 475832290b2SKuninori Morimoto .dmars = b, \ 476832290b2SKuninori Morimoto .dmars_bit = c, \ 477832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 478832290b2SKuninori Morimoto } 479832290b2SKuninori Morimoto 480832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 481832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 482832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 483832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 484832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 485832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 486832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 487832290b2SKuninori Morimoto }; 488832290b2SKuninori Morimoto 489832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 490832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 491832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 492832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 493832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 4946088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 4956088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 4966088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 4976088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 4986088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 4996088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 500832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 501832290b2SKuninori Morimoto .chclr_present = 1, 502832290b2SKuninori Morimoto }; 503832290b2SKuninori Morimoto 504832290b2SKuninori Morimoto /* Resource order important! */ 505832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 506832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 507abbec5f4SSimon Horman DEFINE_RES_MEM(0xec618020, 0x270), 508832290b2SKuninori Morimoto /* DMARSx */ 509abbec5f4SSimon Horman DEFINE_RES_MEM(0xec619000, 0xc), 510832290b2SKuninori Morimoto { 511832290b2SKuninori Morimoto .name = "error_irq", 512832290b2SKuninori Morimoto .start = gic_spi(181), 513832290b2SKuninori Morimoto .end = gic_spi(181), 514832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 515832290b2SKuninori Morimoto }, 516832290b2SKuninori Morimoto { 517832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 518832290b2SKuninori Morimoto .start = gic_spi(175), 519832290b2SKuninori Morimoto .end = gic_spi(180), 520832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 521832290b2SKuninori Morimoto }, 522832290b2SKuninori Morimoto }; 523832290b2SKuninori Morimoto 524832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 525832290b2SKuninori Morimoto .name = "sh-dma-engine", 526832290b2SKuninori Morimoto .id = 1, 527832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 528832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 529832290b2SKuninori Morimoto .dev = { 530832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 531832290b2SKuninori Morimoto }, 532832290b2SKuninori Morimoto }; 533832290b2SKuninori Morimoto 534f23f5be0STetsuyuki Kobayashi static struct resource pmu_resources[] = { 535f23f5be0STetsuyuki Kobayashi [0] = { 536f23f5be0STetsuyuki Kobayashi .start = gic_spi(55), 537f23f5be0STetsuyuki Kobayashi .end = gic_spi(55), 538f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 539f23f5be0STetsuyuki Kobayashi }, 540f23f5be0STetsuyuki Kobayashi [1] = { 541f23f5be0STetsuyuki Kobayashi .start = gic_spi(56), 542f23f5be0STetsuyuki Kobayashi .end = gic_spi(56), 543f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 544f23f5be0STetsuyuki Kobayashi }, 545f23f5be0STetsuyuki Kobayashi }; 546f23f5be0STetsuyuki Kobayashi 547f23f5be0STetsuyuki Kobayashi static struct platform_device pmu_device = { 548f23f5be0STetsuyuki Kobayashi .name = "arm-pmu", 549f23f5be0STetsuyuki Kobayashi .id = -1, 550f23f5be0STetsuyuki Kobayashi .num_resources = ARRAY_SIZE(pmu_resources), 551f23f5be0STetsuyuki Kobayashi .resource = pmu_resources, 552f23f5be0STetsuyuki Kobayashi }; 553f23f5be0STetsuyuki Kobayashi 5549a27dee7SHideki EIRAKU /* an IPMMU module for ICB */ 5559a27dee7SHideki EIRAKU static struct resource ipmmu_resources[] = { 5566244cd73SKuninori Morimoto DEFINE_RES_MEM(0xfe951000, 0x100), 5579a27dee7SHideki EIRAKU }; 5589a27dee7SHideki EIRAKU 5599a27dee7SHideki EIRAKU static const char * const ipmmu_dev_names[] = { 5609a27dee7SHideki EIRAKU "sh_mobile_lcdc_fb.0", 5619a27dee7SHideki EIRAKU }; 5629a27dee7SHideki EIRAKU 5639a27dee7SHideki EIRAKU static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { 5649a27dee7SHideki EIRAKU .dev_names = ipmmu_dev_names, 5659a27dee7SHideki EIRAKU .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), 5669a27dee7SHideki EIRAKU }; 5679a27dee7SHideki EIRAKU 5689a27dee7SHideki EIRAKU static struct platform_device ipmmu_device = { 5699a27dee7SHideki EIRAKU .name = "ipmmu", 5709a27dee7SHideki EIRAKU .id = -1, 5719a27dee7SHideki EIRAKU .dev = { 5729a27dee7SHideki EIRAKU .platform_data = &ipmmu_platform_data, 5739a27dee7SHideki EIRAKU }, 5749a27dee7SHideki EIRAKU .resource = ipmmu_resources, 5759a27dee7SHideki EIRAKU .num_resources = ARRAY_SIZE(ipmmu_resources), 5769a27dee7SHideki EIRAKU }; 5779a27dee7SHideki EIRAKU 5781461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin0_platform_data = { 579341eb546SMagnus Damm .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */ 580341eb546SMagnus Damm }; 581341eb546SMagnus Damm 582341eb546SMagnus Damm static struct resource irqpin0_resources[] = { 583341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ 584341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ 585341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ 586341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ 587341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ 588341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(1)), /* IRQ0 */ 589341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(2)), /* IRQ1 */ 590341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(3)), /* IRQ2 */ 591341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(4)), /* IRQ3 */ 592341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(5)), /* IRQ4 */ 593341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(6)), /* IRQ5 */ 594341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(7)), /* IRQ6 */ 595341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(8)), /* IRQ7 */ 596341eb546SMagnus Damm }; 597341eb546SMagnus Damm 598341eb546SMagnus Damm static struct platform_device irqpin0_device = { 599341eb546SMagnus Damm .name = "renesas_intc_irqpin", 600341eb546SMagnus Damm .id = 0, 601341eb546SMagnus Damm .resource = irqpin0_resources, 602341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin0_resources), 603341eb546SMagnus Damm .dev = { 604341eb546SMagnus Damm .platform_data = &irqpin0_platform_data, 605341eb546SMagnus Damm }, 606341eb546SMagnus Damm }; 607341eb546SMagnus Damm 6081461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin1_platform_data = { 609341eb546SMagnus Damm .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */ 610341eb546SMagnus Damm .control_parent = true, /* Disable spurious IRQ10 */ 611341eb546SMagnus Damm }; 612341eb546SMagnus Damm 613341eb546SMagnus Damm static struct resource irqpin1_resources[] = { 614341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ 615341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ 616341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ 617341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */ 618341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */ 619341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(9)), /* IRQ8 */ 620341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(10)), /* IRQ9 */ 621341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(11)), /* IRQ10 */ 622341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(12)), /* IRQ11 */ 623341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(13)), /* IRQ12 */ 624341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(14)), /* IRQ13 */ 625341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(15)), /* IRQ14 */ 626341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(16)), /* IRQ15 */ 627341eb546SMagnus Damm }; 628341eb546SMagnus Damm 629341eb546SMagnus Damm static struct platform_device irqpin1_device = { 630341eb546SMagnus Damm .name = "renesas_intc_irqpin", 631341eb546SMagnus Damm .id = 1, 632341eb546SMagnus Damm .resource = irqpin1_resources, 633341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin1_resources), 634341eb546SMagnus Damm .dev = { 635341eb546SMagnus Damm .platform_data = &irqpin1_platform_data, 636341eb546SMagnus Damm }, 637341eb546SMagnus Damm }; 638341eb546SMagnus Damm 6391461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin2_platform_data = { 640341eb546SMagnus Damm .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */ 641341eb546SMagnus Damm }; 642341eb546SMagnus Damm 643341eb546SMagnus Damm static struct resource irqpin2_resources[] = { 644341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */ 645341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI20A */ 646341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ20A */ 647341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK20A */ 648341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR20A */ 649341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(17)), /* IRQ16 */ 650341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(18)), /* IRQ17 */ 651341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(19)), /* IRQ18 */ 652341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(20)), /* IRQ19 */ 653341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(21)), /* IRQ20 */ 654341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(22)), /* IRQ21 */ 655341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(23)), /* IRQ22 */ 656341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(24)), /* IRQ23 */ 657341eb546SMagnus Damm }; 658341eb546SMagnus Damm 659341eb546SMagnus Damm static struct platform_device irqpin2_device = { 660341eb546SMagnus Damm .name = "renesas_intc_irqpin", 661341eb546SMagnus Damm .id = 2, 662341eb546SMagnus Damm .resource = irqpin2_resources, 663341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin2_resources), 664341eb546SMagnus Damm .dev = { 665341eb546SMagnus Damm .platform_data = &irqpin2_platform_data, 666341eb546SMagnus Damm }, 667341eb546SMagnus Damm }; 668341eb546SMagnus Damm 6691461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin3_platform_data = { 670341eb546SMagnus Damm .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */ 671341eb546SMagnus Damm }; 672341eb546SMagnus Damm 673341eb546SMagnus Damm static struct resource irqpin3_resources[] = { 674341eb546SMagnus Damm DEFINE_RES_MEM(0xe690000c, 4), /* ICR4A */ 675341eb546SMagnus Damm DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */ 676341eb546SMagnus Damm DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */ 677341eb546SMagnus Damm DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */ 678341eb546SMagnus Damm DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */ 679341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(25)), /* IRQ24 */ 680341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(26)), /* IRQ25 */ 681341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(27)), /* IRQ26 */ 682341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(28)), /* IRQ27 */ 683341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(29)), /* IRQ28 */ 684341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(30)), /* IRQ29 */ 685341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(31)), /* IRQ30 */ 686341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(32)), /* IRQ31 */ 687341eb546SMagnus Damm }; 688341eb546SMagnus Damm 689341eb546SMagnus Damm static struct platform_device irqpin3_device = { 690341eb546SMagnus Damm .name = "renesas_intc_irqpin", 691341eb546SMagnus Damm .id = 3, 692341eb546SMagnus Damm .resource = irqpin3_resources, 693341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin3_resources), 694341eb546SMagnus Damm .dev = { 695341eb546SMagnus Damm .platform_data = &irqpin3_platform_data, 696341eb546SMagnus Damm }, 697341eb546SMagnus Damm }; 698341eb546SMagnus Damm 6993b00f934SSimon Horman static struct platform_device *sh73a0_devices_dt[] __initdata = { 700700ce7c2SSimon Horman &cmt1_device, 701700ce7c2SSimon Horman }; 702700ce7c2SSimon Horman 703700ce7c2SSimon Horman static struct platform_device *sh73a0_early_devices[] __initdata = { 7046d9598e2SMagnus Damm &scif0_device, 7056d9598e2SMagnus Damm &scif1_device, 7066d9598e2SMagnus Damm &scif2_device, 7076d9598e2SMagnus Damm &scif3_device, 7086d9598e2SMagnus Damm &scif4_device, 7096d9598e2SMagnus Damm &scif5_device, 7106d9598e2SMagnus Damm &scif6_device, 7116d9598e2SMagnus Damm &scif7_device, 7126d9598e2SMagnus Damm &scif8_device, 7133df592bcSLaurent Pinchart &tmu0_device, 7149a27dee7SHideki EIRAKU &ipmmu_device, 7156d9598e2SMagnus Damm }; 7166d9598e2SMagnus Damm 717b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 718b028f94bSYoshii Takashi &i2c0_device, 719b028f94bSYoshii Takashi &i2c1_device, 720b028f94bSYoshii Takashi &i2c2_device, 721b028f94bSYoshii Takashi &i2c3_device, 722b028f94bSYoshii Takashi &i2c4_device, 723681e1b3eSMagnus Damm &dma0_device, 724832290b2SKuninori Morimoto &mpdma0_device, 725f23f5be0STetsuyuki Kobayashi &pmu_device, 726341eb546SMagnus Damm &irqpin0_device, 727341eb546SMagnus Damm &irqpin1_device, 728341eb546SMagnus Damm &irqpin2_device, 729341eb546SMagnus Damm &irqpin3_device, 730b028f94bSYoshii Takashi }; 731b028f94bSYoshii Takashi 7320a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 733681e1b3eSMagnus Damm 7346d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 7356d9598e2SMagnus Damm { 736681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 737681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 738681e1b3eSMagnus Damm 7393b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 7403b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 7416d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 7426d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 743b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 744b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 7456d9598e2SMagnus Damm } 7466d9598e2SMagnus Damm 74743cb8cb7SMagnus Damm void __init sh73a0_init_delay(void) 74843cb8cb7SMagnus Damm { 74943cb8cb7SMagnus Damm shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ 75043cb8cb7SMagnus Damm } 75143cb8cb7SMagnus Damm 752d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 753d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 754d6720003SKuninori Morimoto 7556bb27d73SStephen Warren void __init sh73a0_earlytimer_init(void) 7563be26fdbSMagnus Damm { 75743cb8cb7SMagnus Damm sh73a0_init_delay(); 7583be26fdbSMagnus Damm sh73a0_clock_init(); 7593be26fdbSMagnus Damm shmobile_earlytimer_init(); 760d6720003SKuninori Morimoto sh73a0_register_twd(); 7613be26fdbSMagnus Damm } 7623be26fdbSMagnus Damm 7636d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 7646d9598e2SMagnus Damm { 7653b00f934SSimon Horman early_platform_add_devices(sh73a0_devices_dt, 7663b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 7676d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 7686d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 76950e15c34SMagnus Damm 77050e15c34SMagnus Damm /* setup early console here as well */ 77150e15c34SMagnus Damm shmobile_setup_console(); 7726d9598e2SMagnus Damm } 77348609533SSimon Horman 77448609533SSimon Horman #ifdef CONFIG_USE_OF 77548609533SSimon Horman 77648609533SSimon Horman void __init sh73a0_add_standard_devices_dt(void) 77748609533SSimon Horman { 778d2347382SGuennadi Liakhovetski struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, }; 779d2347382SGuennadi Liakhovetski 78048609533SSimon Horman /* clocks are setup late during boot in the case of DT */ 78148609533SSimon Horman sh73a0_clock_init(); 78248609533SSimon Horman 7833b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 7843b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 785ea31597fSMagnus Damm of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 786d2347382SGuennadi Liakhovetski 787d2347382SGuennadi Liakhovetski /* Instantiate cpufreq-cpu0 */ 788d2347382SGuennadi Liakhovetski platform_device_register_full(&devinfo); 78948609533SSimon Horman } 79048609533SSimon Horman 79148609533SSimon Horman static const char *sh73a0_boards_compat_dt[] __initdata = { 79248609533SSimon Horman "renesas,sh73a0", 79348609533SSimon Horman NULL, 79448609533SSimon Horman }; 79548609533SSimon Horman 79648609533SSimon Horman DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") 797f9989507SSimon Horman .smp = smp_ops(sh73a0_smp_ops), 79848609533SSimon Horman .map_io = sh73a0_map_io, 7993b00f934SSimon Horman .init_early = sh73a0_init_delay, 80048609533SSimon Horman .nr_irqs = NR_IRQS_LEGACY, 80148609533SSimon Horman .init_machine = sh73a0_add_standard_devices_dt, 802e604d809SMagnus Damm .init_late = shmobile_init_late, 80348609533SSimon Horman .dt_compat = sh73a0_boards_compat_dt, 80448609533SSimon Horman MACHINE_END 80548609533SSimon Horman #endif /* CONFIG_USE_OF */ 806