16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 256d9598e2SMagnus Damm #include <linux/platform_device.h> 266d9598e2SMagnus Damm #include <linux/delay.h> 276d9598e2SMagnus Damm #include <linux/input.h> 286d9598e2SMagnus Damm #include <linux/io.h> 296d9598e2SMagnus Damm #include <linux/serial_sci.h> 30681e1b3eSMagnus Damm #include <linux/sh_dma.h> 316d9598e2SMagnus Damm #include <linux/sh_intc.h> 326d9598e2SMagnus Damm #include <linux/sh_timer.h> 336d9598e2SMagnus Damm #include <mach/hardware.h> 34250a2723SRob Herring #include <mach/irqs.h> 35681e1b3eSMagnus Damm #include <mach/sh73a0.h> 3650e15c34SMagnus Damm #include <mach/common.h> 376d9598e2SMagnus Damm #include <asm/mach-types.h> 3850e15c34SMagnus Damm #include <asm/mach/map.h> 396d9598e2SMagnus Damm #include <asm/mach/arch.h> 403be26fdbSMagnus Damm #include <asm/mach/time.h> 416d9598e2SMagnus Damm 4250e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4350e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4450e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4550e15c34SMagnus Damm */ 4650e15c34SMagnus Damm { 4750e15c34SMagnus Damm .virtual = 0xe6000000, 4850e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 4950e15c34SMagnus Damm .length = 256 << 20, 5050e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5150e15c34SMagnus Damm }, 5250e15c34SMagnus Damm }; 5350e15c34SMagnus Damm 5450e15c34SMagnus Damm void __init sh73a0_map_io(void) 5550e15c34SMagnus Damm { 5650e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 5750e15c34SMagnus Damm } 5850e15c34SMagnus Damm 596d9598e2SMagnus Damm static struct plat_sci_port scif0_platform_data = { 606d9598e2SMagnus Damm .mapbase = 0xe6c40000, 616d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 62f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 63f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 646d9598e2SMagnus Damm .type = PORT_SCIFA, 656d9598e2SMagnus Damm .irqs = { gic_spi(72), gic_spi(72), 666d9598e2SMagnus Damm gic_spi(72), gic_spi(72) }, 676d9598e2SMagnus Damm }; 686d9598e2SMagnus Damm 696d9598e2SMagnus Damm static struct platform_device scif0_device = { 706d9598e2SMagnus Damm .name = "sh-sci", 716d9598e2SMagnus Damm .id = 0, 726d9598e2SMagnus Damm .dev = { 736d9598e2SMagnus Damm .platform_data = &scif0_platform_data, 746d9598e2SMagnus Damm }, 756d9598e2SMagnus Damm }; 766d9598e2SMagnus Damm 776d9598e2SMagnus Damm static struct plat_sci_port scif1_platform_data = { 786d9598e2SMagnus Damm .mapbase = 0xe6c50000, 796d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 80f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 81f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 826d9598e2SMagnus Damm .type = PORT_SCIFA, 836d9598e2SMagnus Damm .irqs = { gic_spi(73), gic_spi(73), 846d9598e2SMagnus Damm gic_spi(73), gic_spi(73) }, 856d9598e2SMagnus Damm }; 866d9598e2SMagnus Damm 876d9598e2SMagnus Damm static struct platform_device scif1_device = { 886d9598e2SMagnus Damm .name = "sh-sci", 896d9598e2SMagnus Damm .id = 1, 906d9598e2SMagnus Damm .dev = { 916d9598e2SMagnus Damm .platform_data = &scif1_platform_data, 926d9598e2SMagnus Damm }, 936d9598e2SMagnus Damm }; 946d9598e2SMagnus Damm 956d9598e2SMagnus Damm static struct plat_sci_port scif2_platform_data = { 966d9598e2SMagnus Damm .mapbase = 0xe6c60000, 976d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 98f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 99f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1006d9598e2SMagnus Damm .type = PORT_SCIFA, 1016d9598e2SMagnus Damm .irqs = { gic_spi(74), gic_spi(74), 1026d9598e2SMagnus Damm gic_spi(74), gic_spi(74) }, 1036d9598e2SMagnus Damm }; 1046d9598e2SMagnus Damm 1056d9598e2SMagnus Damm static struct platform_device scif2_device = { 1066d9598e2SMagnus Damm .name = "sh-sci", 1076d9598e2SMagnus Damm .id = 2, 1086d9598e2SMagnus Damm .dev = { 1096d9598e2SMagnus Damm .platform_data = &scif2_platform_data, 1106d9598e2SMagnus Damm }, 1116d9598e2SMagnus Damm }; 1126d9598e2SMagnus Damm 1136d9598e2SMagnus Damm static struct plat_sci_port scif3_platform_data = { 1146d9598e2SMagnus Damm .mapbase = 0xe6c70000, 1156d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 116f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 117f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1186d9598e2SMagnus Damm .type = PORT_SCIFA, 1196d9598e2SMagnus Damm .irqs = { gic_spi(75), gic_spi(75), 1206d9598e2SMagnus Damm gic_spi(75), gic_spi(75) }, 1216d9598e2SMagnus Damm }; 1226d9598e2SMagnus Damm 1236d9598e2SMagnus Damm static struct platform_device scif3_device = { 1246d9598e2SMagnus Damm .name = "sh-sci", 1256d9598e2SMagnus Damm .id = 3, 1266d9598e2SMagnus Damm .dev = { 1276d9598e2SMagnus Damm .platform_data = &scif3_platform_data, 1286d9598e2SMagnus Damm }, 1296d9598e2SMagnus Damm }; 1306d9598e2SMagnus Damm 1316d9598e2SMagnus Damm static struct plat_sci_port scif4_platform_data = { 1326d9598e2SMagnus Damm .mapbase = 0xe6c80000, 1336d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 134f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 135f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1366d9598e2SMagnus Damm .type = PORT_SCIFA, 1376d9598e2SMagnus Damm .irqs = { gic_spi(78), gic_spi(78), 1386d9598e2SMagnus Damm gic_spi(78), gic_spi(78) }, 1396d9598e2SMagnus Damm }; 1406d9598e2SMagnus Damm 1416d9598e2SMagnus Damm static struct platform_device scif4_device = { 1426d9598e2SMagnus Damm .name = "sh-sci", 1436d9598e2SMagnus Damm .id = 4, 1446d9598e2SMagnus Damm .dev = { 1456d9598e2SMagnus Damm .platform_data = &scif4_platform_data, 1466d9598e2SMagnus Damm }, 1476d9598e2SMagnus Damm }; 1486d9598e2SMagnus Damm 1496d9598e2SMagnus Damm static struct plat_sci_port scif5_platform_data = { 1506d9598e2SMagnus Damm .mapbase = 0xe6cb0000, 1516d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 152f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 153f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1546d9598e2SMagnus Damm .type = PORT_SCIFA, 1556d9598e2SMagnus Damm .irqs = { gic_spi(79), gic_spi(79), 1566d9598e2SMagnus Damm gic_spi(79), gic_spi(79) }, 1576d9598e2SMagnus Damm }; 1586d9598e2SMagnus Damm 1596d9598e2SMagnus Damm static struct platform_device scif5_device = { 1606d9598e2SMagnus Damm .name = "sh-sci", 1616d9598e2SMagnus Damm .id = 5, 1626d9598e2SMagnus Damm .dev = { 1636d9598e2SMagnus Damm .platform_data = &scif5_platform_data, 1646d9598e2SMagnus Damm }, 1656d9598e2SMagnus Damm }; 1666d9598e2SMagnus Damm 1676d9598e2SMagnus Damm static struct plat_sci_port scif6_platform_data = { 1686d9598e2SMagnus Damm .mapbase = 0xe6cc0000, 1696d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 170f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 171f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1726d9598e2SMagnus Damm .type = PORT_SCIFA, 1736d9598e2SMagnus Damm .irqs = { gic_spi(156), gic_spi(156), 1746d9598e2SMagnus Damm gic_spi(156), gic_spi(156) }, 1756d9598e2SMagnus Damm }; 1766d9598e2SMagnus Damm 1776d9598e2SMagnus Damm static struct platform_device scif6_device = { 1786d9598e2SMagnus Damm .name = "sh-sci", 1796d9598e2SMagnus Damm .id = 6, 1806d9598e2SMagnus Damm .dev = { 1816d9598e2SMagnus Damm .platform_data = &scif6_platform_data, 1826d9598e2SMagnus Damm }, 1836d9598e2SMagnus Damm }; 1846d9598e2SMagnus Damm 1856d9598e2SMagnus Damm static struct plat_sci_port scif7_platform_data = { 1866d9598e2SMagnus Damm .mapbase = 0xe6cd0000, 1876d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 188f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 189f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1906d9598e2SMagnus Damm .type = PORT_SCIFA, 1916d9598e2SMagnus Damm .irqs = { gic_spi(143), gic_spi(143), 1926d9598e2SMagnus Damm gic_spi(143), gic_spi(143) }, 1936d9598e2SMagnus Damm }; 1946d9598e2SMagnus Damm 1956d9598e2SMagnus Damm static struct platform_device scif7_device = { 1966d9598e2SMagnus Damm .name = "sh-sci", 1976d9598e2SMagnus Damm .id = 7, 1986d9598e2SMagnus Damm .dev = { 1996d9598e2SMagnus Damm .platform_data = &scif7_platform_data, 2006d9598e2SMagnus Damm }, 2016d9598e2SMagnus Damm }; 2026d9598e2SMagnus Damm 2036d9598e2SMagnus Damm static struct plat_sci_port scif8_platform_data = { 2046d9598e2SMagnus Damm .mapbase = 0xe6c30000, 2056d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 206f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 207f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2086d9598e2SMagnus Damm .type = PORT_SCIFB, 2096d9598e2SMagnus Damm .irqs = { gic_spi(80), gic_spi(80), 2106d9598e2SMagnus Damm gic_spi(80), gic_spi(80) }, 2116d9598e2SMagnus Damm }; 2126d9598e2SMagnus Damm 2136d9598e2SMagnus Damm static struct platform_device scif8_device = { 2146d9598e2SMagnus Damm .name = "sh-sci", 2156d9598e2SMagnus Damm .id = 8, 2166d9598e2SMagnus Damm .dev = { 2176d9598e2SMagnus Damm .platform_data = &scif8_platform_data, 2186d9598e2SMagnus Damm }, 2196d9598e2SMagnus Damm }; 2206d9598e2SMagnus Damm 2216d9598e2SMagnus Damm static struct sh_timer_config cmt10_platform_data = { 2226d9598e2SMagnus Damm .name = "CMT10", 2236d9598e2SMagnus Damm .channel_offset = 0x10, 2246d9598e2SMagnus Damm .timer_bit = 0, 2256d9598e2SMagnus Damm .clockevent_rating = 125, 2266d9598e2SMagnus Damm .clocksource_rating = 125, 2276d9598e2SMagnus Damm }; 2286d9598e2SMagnus Damm 2296d9598e2SMagnus Damm static struct resource cmt10_resources[] = { 2306d9598e2SMagnus Damm [0] = { 2316d9598e2SMagnus Damm .name = "CMT10", 2326d9598e2SMagnus Damm .start = 0xe6138010, 2336d9598e2SMagnus Damm .end = 0xe613801b, 2346d9598e2SMagnus Damm .flags = IORESOURCE_MEM, 2356d9598e2SMagnus Damm }, 2366d9598e2SMagnus Damm [1] = { 2376d9598e2SMagnus Damm .start = gic_spi(65), 2386d9598e2SMagnus Damm .flags = IORESOURCE_IRQ, 2396d9598e2SMagnus Damm }, 2406d9598e2SMagnus Damm }; 2416d9598e2SMagnus Damm 2426d9598e2SMagnus Damm static struct platform_device cmt10_device = { 2436d9598e2SMagnus Damm .name = "sh_cmt", 2446d9598e2SMagnus Damm .id = 10, 2456d9598e2SMagnus Damm .dev = { 2466d9598e2SMagnus Damm .platform_data = &cmt10_platform_data, 2476d9598e2SMagnus Damm }, 2486d9598e2SMagnus Damm .resource = cmt10_resources, 2496d9598e2SMagnus Damm .num_resources = ARRAY_SIZE(cmt10_resources), 2506d9598e2SMagnus Damm }; 2516d9598e2SMagnus Damm 2525010f3dbSMagnus Damm /* TMU */ 2535010f3dbSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 2545010f3dbSMagnus Damm .name = "TMU00", 2555010f3dbSMagnus Damm .channel_offset = 0x4, 2565010f3dbSMagnus Damm .timer_bit = 0, 2575010f3dbSMagnus Damm .clockevent_rating = 200, 2585010f3dbSMagnus Damm }; 2595010f3dbSMagnus Damm 2605010f3dbSMagnus Damm static struct resource tmu00_resources[] = { 2615010f3dbSMagnus Damm [0] = { 2625010f3dbSMagnus Damm .name = "TMU00", 2635010f3dbSMagnus Damm .start = 0xfff60008, 2645010f3dbSMagnus Damm .end = 0xfff60013, 2655010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 2665010f3dbSMagnus Damm }, 2675010f3dbSMagnus Damm [1] = { 2685010f3dbSMagnus Damm .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ 2695010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 2705010f3dbSMagnus Damm }, 2715010f3dbSMagnus Damm }; 2725010f3dbSMagnus Damm 2735010f3dbSMagnus Damm static struct platform_device tmu00_device = { 2745010f3dbSMagnus Damm .name = "sh_tmu", 2755010f3dbSMagnus Damm .id = 0, 2765010f3dbSMagnus Damm .dev = { 2775010f3dbSMagnus Damm .platform_data = &tmu00_platform_data, 2785010f3dbSMagnus Damm }, 2795010f3dbSMagnus Damm .resource = tmu00_resources, 2805010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 2815010f3dbSMagnus Damm }; 2825010f3dbSMagnus Damm 2835010f3dbSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 2845010f3dbSMagnus Damm .name = "TMU01", 2855010f3dbSMagnus Damm .channel_offset = 0x10, 2865010f3dbSMagnus Damm .timer_bit = 1, 2875010f3dbSMagnus Damm .clocksource_rating = 200, 2885010f3dbSMagnus Damm }; 2895010f3dbSMagnus Damm 2905010f3dbSMagnus Damm static struct resource tmu01_resources[] = { 2915010f3dbSMagnus Damm [0] = { 2925010f3dbSMagnus Damm .name = "TMU01", 2935010f3dbSMagnus Damm .start = 0xfff60014, 2945010f3dbSMagnus Damm .end = 0xfff6001f, 2955010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 2965010f3dbSMagnus Damm }, 2975010f3dbSMagnus Damm [1] = { 2985010f3dbSMagnus Damm .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ 2995010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 3005010f3dbSMagnus Damm }, 3015010f3dbSMagnus Damm }; 3025010f3dbSMagnus Damm 3035010f3dbSMagnus Damm static struct platform_device tmu01_device = { 3045010f3dbSMagnus Damm .name = "sh_tmu", 3055010f3dbSMagnus Damm .id = 1, 3065010f3dbSMagnus Damm .dev = { 3075010f3dbSMagnus Damm .platform_data = &tmu01_platform_data, 3085010f3dbSMagnus Damm }, 3095010f3dbSMagnus Damm .resource = tmu01_resources, 3105010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 3115010f3dbSMagnus Damm }; 3125010f3dbSMagnus Damm 313b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 314b028f94bSYoshii Takashi [0] = { 315b028f94bSYoshii Takashi .name = "IIC0", 316b028f94bSYoshii Takashi .start = 0xe6820000, 317b028f94bSYoshii Takashi .end = 0xe6820425 - 1, 318b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 319b028f94bSYoshii Takashi }, 320b028f94bSYoshii Takashi [1] = { 321b028f94bSYoshii Takashi .start = gic_spi(167), 322b028f94bSYoshii Takashi .end = gic_spi(170), 323b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 324b028f94bSYoshii Takashi }, 325b028f94bSYoshii Takashi }; 326b028f94bSYoshii Takashi 327b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 328b028f94bSYoshii Takashi [0] = { 329b028f94bSYoshii Takashi .name = "IIC1", 330b028f94bSYoshii Takashi .start = 0xe6822000, 331b028f94bSYoshii Takashi .end = 0xe6822425 - 1, 332b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 333b028f94bSYoshii Takashi }, 334b028f94bSYoshii Takashi [1] = { 335b028f94bSYoshii Takashi .start = gic_spi(51), 336b028f94bSYoshii Takashi .end = gic_spi(54), 337b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 338b028f94bSYoshii Takashi }, 339b028f94bSYoshii Takashi }; 340b028f94bSYoshii Takashi 341b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 342b028f94bSYoshii Takashi [0] = { 343b028f94bSYoshii Takashi .name = "IIC2", 344b028f94bSYoshii Takashi .start = 0xe6824000, 345b028f94bSYoshii Takashi .end = 0xe6824425 - 1, 346b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 347b028f94bSYoshii Takashi }, 348b028f94bSYoshii Takashi [1] = { 349b028f94bSYoshii Takashi .start = gic_spi(171), 350b028f94bSYoshii Takashi .end = gic_spi(174), 351b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 352b028f94bSYoshii Takashi }, 353b028f94bSYoshii Takashi }; 354b028f94bSYoshii Takashi 355b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 356b028f94bSYoshii Takashi [0] = { 357b028f94bSYoshii Takashi .name = "IIC3", 358b028f94bSYoshii Takashi .start = 0xe6826000, 359b028f94bSYoshii Takashi .end = 0xe6826425 - 1, 360b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 361b028f94bSYoshii Takashi }, 362b028f94bSYoshii Takashi [1] = { 363b028f94bSYoshii Takashi .start = gic_spi(183), 364b028f94bSYoshii Takashi .end = gic_spi(186), 365b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 366b028f94bSYoshii Takashi }, 367b028f94bSYoshii Takashi }; 368b028f94bSYoshii Takashi 369b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 370b028f94bSYoshii Takashi [0] = { 371b028f94bSYoshii Takashi .name = "IIC4", 372b028f94bSYoshii Takashi .start = 0xe6828000, 373b028f94bSYoshii Takashi .end = 0xe6828425 - 1, 374b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 375b028f94bSYoshii Takashi }, 376b028f94bSYoshii Takashi [1] = { 377b028f94bSYoshii Takashi .start = gic_spi(187), 378b028f94bSYoshii Takashi .end = gic_spi(190), 379b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 380b028f94bSYoshii Takashi }, 381b028f94bSYoshii Takashi }; 382b028f94bSYoshii Takashi 383b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 384b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 385b028f94bSYoshii Takashi .id = 0, 386b028f94bSYoshii Takashi .resource = i2c0_resources, 387b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 388b028f94bSYoshii Takashi }; 389b028f94bSYoshii Takashi 390b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 391b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 392b028f94bSYoshii Takashi .id = 1, 393b028f94bSYoshii Takashi .resource = i2c1_resources, 394b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 395b028f94bSYoshii Takashi }; 396b028f94bSYoshii Takashi 397b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 398b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 399b028f94bSYoshii Takashi .id = 2, 400b028f94bSYoshii Takashi .resource = i2c2_resources, 401b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 402b028f94bSYoshii Takashi }; 403b028f94bSYoshii Takashi 404b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 405b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 406b028f94bSYoshii Takashi .id = 3, 407b028f94bSYoshii Takashi .resource = i2c3_resources, 408b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 409b028f94bSYoshii Takashi }; 410b028f94bSYoshii Takashi 411b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 412b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 413b028f94bSYoshii Takashi .id = 4, 414b028f94bSYoshii Takashi .resource = i2c4_resources, 415b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 416b028f94bSYoshii Takashi }; 417b028f94bSYoshii Takashi 418681e1b3eSMagnus Damm /* Transmit sizes and respective CHCR register values */ 419681e1b3eSMagnus Damm enum { 420681e1b3eSMagnus Damm XMIT_SZ_8BIT = 0, 421681e1b3eSMagnus Damm XMIT_SZ_16BIT = 1, 422681e1b3eSMagnus Damm XMIT_SZ_32BIT = 2, 423681e1b3eSMagnus Damm XMIT_SZ_64BIT = 7, 424681e1b3eSMagnus Damm XMIT_SZ_128BIT = 3, 425681e1b3eSMagnus Damm XMIT_SZ_256BIT = 4, 426681e1b3eSMagnus Damm XMIT_SZ_512BIT = 5, 427681e1b3eSMagnus Damm }; 428681e1b3eSMagnus Damm 429681e1b3eSMagnus Damm /* log2(size / 8) - used to calculate number of transfers */ 430681e1b3eSMagnus Damm #define TS_SHIFT { \ 431681e1b3eSMagnus Damm [XMIT_SZ_8BIT] = 0, \ 432681e1b3eSMagnus Damm [XMIT_SZ_16BIT] = 1, \ 433681e1b3eSMagnus Damm [XMIT_SZ_32BIT] = 2, \ 434681e1b3eSMagnus Damm [XMIT_SZ_64BIT] = 3, \ 435681e1b3eSMagnus Damm [XMIT_SZ_128BIT] = 4, \ 436681e1b3eSMagnus Damm [XMIT_SZ_256BIT] = 5, \ 437681e1b3eSMagnus Damm [XMIT_SZ_512BIT] = 6, \ 438681e1b3eSMagnus Damm } 439681e1b3eSMagnus Damm 440681e1b3eSMagnus Damm #define TS_INDEX2VAL(i) ((((i) & 3) << 3) | (((i) & 0xc) << (20 - 2))) 441681e1b3eSMagnus Damm #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz))) 442681e1b3eSMagnus Damm #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz))) 443681e1b3eSMagnus Damm 444681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 445681e1b3eSMagnus Damm { 446681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 447681e1b3eSMagnus Damm .addr = 0xe6c40020, 448681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 449681e1b3eSMagnus Damm .mid_rid = 0x21, 450681e1b3eSMagnus Damm }, { 451681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 452681e1b3eSMagnus Damm .addr = 0xe6c40024, 453681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 454681e1b3eSMagnus Damm .mid_rid = 0x22, 455681e1b3eSMagnus Damm }, { 456681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 457681e1b3eSMagnus Damm .addr = 0xe6c50020, 458681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 459681e1b3eSMagnus Damm .mid_rid = 0x25, 460681e1b3eSMagnus Damm }, { 461681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 462681e1b3eSMagnus Damm .addr = 0xe6c50024, 463681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 464681e1b3eSMagnus Damm .mid_rid = 0x26, 465681e1b3eSMagnus Damm }, { 466681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 467681e1b3eSMagnus Damm .addr = 0xe6c60020, 468681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 469681e1b3eSMagnus Damm .mid_rid = 0x29, 470681e1b3eSMagnus Damm }, { 471681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 472681e1b3eSMagnus Damm .addr = 0xe6c60024, 473681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 474681e1b3eSMagnus Damm .mid_rid = 0x2a, 475681e1b3eSMagnus Damm }, { 476681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 477681e1b3eSMagnus Damm .addr = 0xe6c70020, 478681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 479681e1b3eSMagnus Damm .mid_rid = 0x2d, 480681e1b3eSMagnus Damm }, { 481681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 482681e1b3eSMagnus Damm .addr = 0xe6c70024, 483681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 484681e1b3eSMagnus Damm .mid_rid = 0x2e, 485681e1b3eSMagnus Damm }, { 486681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 487681e1b3eSMagnus Damm .addr = 0xe6c80020, 488681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 489681e1b3eSMagnus Damm .mid_rid = 0x39, 490681e1b3eSMagnus Damm }, { 491681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 492681e1b3eSMagnus Damm .addr = 0xe6c80024, 493681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 494681e1b3eSMagnus Damm .mid_rid = 0x3a, 495681e1b3eSMagnus Damm }, { 496681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 497681e1b3eSMagnus Damm .addr = 0xe6cb0020, 498681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 499681e1b3eSMagnus Damm .mid_rid = 0x35, 500681e1b3eSMagnus Damm }, { 501681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 502681e1b3eSMagnus Damm .addr = 0xe6cb0024, 503681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 504681e1b3eSMagnus Damm .mid_rid = 0x36, 505681e1b3eSMagnus Damm }, { 506681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 507681e1b3eSMagnus Damm .addr = 0xe6cc0020, 508681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 509681e1b3eSMagnus Damm .mid_rid = 0x1d, 510681e1b3eSMagnus Damm }, { 511681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 512681e1b3eSMagnus Damm .addr = 0xe6cc0024, 513681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 514681e1b3eSMagnus Damm .mid_rid = 0x1e, 515681e1b3eSMagnus Damm }, { 516681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 517681e1b3eSMagnus Damm .addr = 0xe6cd0020, 518681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 519681e1b3eSMagnus Damm .mid_rid = 0x19, 520681e1b3eSMagnus Damm }, { 521681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 522681e1b3eSMagnus Damm .addr = 0xe6cd0024, 523681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 524681e1b3eSMagnus Damm .mid_rid = 0x1a, 525681e1b3eSMagnus Damm }, { 526681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 527681e1b3eSMagnus Damm .addr = 0xe6c30040, 528681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 529681e1b3eSMagnus Damm .mid_rid = 0x3d, 530681e1b3eSMagnus Damm }, { 531681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 532681e1b3eSMagnus Damm .addr = 0xe6c30060, 533681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 534681e1b3eSMagnus Damm .mid_rid = 0x3e, 535681e1b3eSMagnus Damm }, { 536681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 537681e1b3eSMagnus Damm .addr = 0xee100030, 538681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 539681e1b3eSMagnus Damm .mid_rid = 0xc1, 540681e1b3eSMagnus Damm }, { 541681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 542681e1b3eSMagnus Damm .addr = 0xee100030, 543681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 544681e1b3eSMagnus Damm .mid_rid = 0xc2, 545681e1b3eSMagnus Damm }, { 546681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 547681e1b3eSMagnus Damm .addr = 0xee120030, 548681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 549681e1b3eSMagnus Damm .mid_rid = 0xc9, 550681e1b3eSMagnus Damm }, { 551681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 552681e1b3eSMagnus Damm .addr = 0xee120030, 553681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 554681e1b3eSMagnus Damm .mid_rid = 0xca, 555681e1b3eSMagnus Damm }, { 556681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 557681e1b3eSMagnus Damm .addr = 0xee140030, 558681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 559681e1b3eSMagnus Damm .mid_rid = 0xcd, 560681e1b3eSMagnus Damm }, { 561681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 562681e1b3eSMagnus Damm .addr = 0xee140030, 563681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 564681e1b3eSMagnus Damm .mid_rid = 0xce, 565681e1b3eSMagnus Damm }, { 566681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 567681e1b3eSMagnus Damm .addr = 0xe6bd0034, 568681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 569681e1b3eSMagnus Damm .mid_rid = 0xd1, 570681e1b3eSMagnus Damm }, { 571681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 572681e1b3eSMagnus Damm .addr = 0xe6bd0034, 573681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 574681e1b3eSMagnus Damm .mid_rid = 0xd2, 575681e1b3eSMagnus Damm }, 576681e1b3eSMagnus Damm }; 577681e1b3eSMagnus Damm 578681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 579681e1b3eSMagnus Damm { \ 580681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 581681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 582681e1b3eSMagnus Damm } 583681e1b3eSMagnus Damm 584681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 585681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 586681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 587681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 588681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 589681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 590681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 591681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 592681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 593681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 594681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 595681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 596681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 597681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 598681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 599681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 600681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 601681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 602681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 603681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 604681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 605681e1b3eSMagnus Damm }; 606681e1b3eSMagnus Damm 607681e1b3eSMagnus Damm static const unsigned int ts_shift[] = TS_SHIFT; 608681e1b3eSMagnus Damm 609681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 610681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 611681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 612681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 613681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 614681e1b3eSMagnus Damm .ts_low_shift = 3, 615681e1b3eSMagnus Damm .ts_low_mask = 0x18, 616681e1b3eSMagnus Damm .ts_high_shift = (20 - 2), /* 2 bits for shifted low TS */ 617681e1b3eSMagnus Damm .ts_high_mask = 0x00300000, 618681e1b3eSMagnus Damm .ts_shift = ts_shift, 619681e1b3eSMagnus Damm .ts_shift_num = ARRAY_SIZE(ts_shift), 620681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 621681e1b3eSMagnus Damm }; 622681e1b3eSMagnus Damm 623681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 624681e1b3eSMagnus Damm { 625681e1b3eSMagnus Damm /* Registers including DMAOR and channels including DMARSx */ 626681e1b3eSMagnus Damm .start = 0xfe000020, 627681e1b3eSMagnus Damm .end = 0xfe008a00 - 1, 628681e1b3eSMagnus Damm .flags = IORESOURCE_MEM, 629681e1b3eSMagnus Damm }, 630681e1b3eSMagnus Damm { 63120052462SShimoda, Yoshihiro .name = "error_irq", 632681e1b3eSMagnus Damm .start = gic_spi(129), 633681e1b3eSMagnus Damm .end = gic_spi(129), 634681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 635681e1b3eSMagnus Damm }, 636681e1b3eSMagnus Damm { 637681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 638681e1b3eSMagnus Damm .start = gic_spi(109), 639681e1b3eSMagnus Damm .end = gic_spi(128), 640681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 641681e1b3eSMagnus Damm }, 642681e1b3eSMagnus Damm }; 643681e1b3eSMagnus Damm 644681e1b3eSMagnus Damm static struct platform_device dma0_device = { 645681e1b3eSMagnus Damm .name = "sh-dma-engine", 646681e1b3eSMagnus Damm .id = 0, 647681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 648681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 649681e1b3eSMagnus Damm .dev = { 650681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 651681e1b3eSMagnus Damm }, 652681e1b3eSMagnus Damm }; 653681e1b3eSMagnus Damm 6546d9598e2SMagnus Damm static struct platform_device *sh73a0_early_devices[] __initdata = { 6556d9598e2SMagnus Damm &scif0_device, 6566d9598e2SMagnus Damm &scif1_device, 6576d9598e2SMagnus Damm &scif2_device, 6586d9598e2SMagnus Damm &scif3_device, 6596d9598e2SMagnus Damm &scif4_device, 6606d9598e2SMagnus Damm &scif5_device, 6616d9598e2SMagnus Damm &scif6_device, 6626d9598e2SMagnus Damm &scif7_device, 6636d9598e2SMagnus Damm &scif8_device, 6646d9598e2SMagnus Damm &cmt10_device, 6655010f3dbSMagnus Damm &tmu00_device, 6665010f3dbSMagnus Damm &tmu01_device, 6676d9598e2SMagnus Damm }; 6686d9598e2SMagnus Damm 669b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 670b028f94bSYoshii Takashi &i2c0_device, 671b028f94bSYoshii Takashi &i2c1_device, 672b028f94bSYoshii Takashi &i2c2_device, 673b028f94bSYoshii Takashi &i2c3_device, 674b028f94bSYoshii Takashi &i2c4_device, 675681e1b3eSMagnus Damm &dma0_device, 676b028f94bSYoshii Takashi }; 677b028f94bSYoshii Takashi 678681e1b3eSMagnus Damm #define SRCR2 0xe61580b0 679681e1b3eSMagnus Damm 6806d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 6816d9598e2SMagnus Damm { 682681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 683681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 684681e1b3eSMagnus Damm 6856d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 6866d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 687b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 688b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 6896d9598e2SMagnus Damm } 6906d9598e2SMagnus Damm 691d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 692d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 693d6720003SKuninori Morimoto 6943be26fdbSMagnus Damm static void __init sh73a0_earlytimer_init(void) 6953be26fdbSMagnus Damm { 6963be26fdbSMagnus Damm sh73a0_clock_init(); 6973be26fdbSMagnus Damm shmobile_earlytimer_init(); 698d6720003SKuninori Morimoto sh73a0_register_twd(); 6993be26fdbSMagnus Damm } 7003be26fdbSMagnus Damm 7016d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 7026d9598e2SMagnus Damm { 7036d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 7046d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 70550e15c34SMagnus Damm 70650e15c34SMagnus Damm /* setup early console here as well */ 70750e15c34SMagnus Damm shmobile_setup_console(); 7083be26fdbSMagnus Damm 7093be26fdbSMagnus Damm /* override timer setup with soc-specific code */ 7103be26fdbSMagnus Damm shmobile_timer.init = sh73a0_earlytimer_init; 7116d9598e2SMagnus Damm } 712