16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 256d9598e2SMagnus Damm #include <linux/platform_device.h> 2648609533SSimon Horman #include <linux/of_platform.h> 276d9598e2SMagnus Damm #include <linux/delay.h> 286d9598e2SMagnus Damm #include <linux/input.h> 296d9598e2SMagnus Damm #include <linux/io.h> 306d9598e2SMagnus Damm #include <linux/serial_sci.h> 31681e1b3eSMagnus Damm #include <linux/sh_dma.h> 326d9598e2SMagnus Damm #include <linux/sh_intc.h> 336d9598e2SMagnus Damm #include <linux/sh_timer.h> 349a27dee7SHideki EIRAKU #include <linux/platform_data/sh_ipmmu.h> 35341eb546SMagnus Damm #include <linux/platform_data/irq-renesas-intc-irqpin.h> 366088b422SKuninori Morimoto #include <mach/dma-register.h> 37250a2723SRob Herring #include <mach/irqs.h> 38681e1b3eSMagnus Damm #include <mach/sh73a0.h> 3950e15c34SMagnus Damm #include <mach/common.h> 406d9598e2SMagnus Damm #include <asm/mach-types.h> 4150e15c34SMagnus Damm #include <asm/mach/map.h> 426d9598e2SMagnus Damm #include <asm/mach/arch.h> 433be26fdbSMagnus Damm #include <asm/mach/time.h> 446d9598e2SMagnus Damm 4550e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4650e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4750e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4850e15c34SMagnus Damm */ 4950e15c34SMagnus Damm { 5050e15c34SMagnus Damm .virtual = 0xe6000000, 5150e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5250e15c34SMagnus Damm .length = 256 << 20, 5350e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5450e15c34SMagnus Damm }, 5550e15c34SMagnus Damm }; 5650e15c34SMagnus Damm 5750e15c34SMagnus Damm void __init sh73a0_map_io(void) 5850e15c34SMagnus Damm { 5950e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 6050e15c34SMagnus Damm } 6150e15c34SMagnus Damm 62474f6758SMagnus Damm /* PFC */ 63474f6758SMagnus Damm static struct resource pfc_resources[] __initdata = { 64474f6758SMagnus Damm DEFINE_RES_MEM(0xe6050000, 0x8000), 65474f6758SMagnus Damm DEFINE_RES_MEM(0xe605801c, 0x000c), 66994d66a4SLaurent Pinchart }; 67994d66a4SLaurent Pinchart 68994d66a4SLaurent Pinchart void __init sh73a0_pinmux_init(void) 69994d66a4SLaurent Pinchart { 70474f6758SMagnus Damm platform_device_register_simple("pfc-sh73a0", -1, pfc_resources, 71474f6758SMagnus Damm ARRAY_SIZE(pfc_resources)); 72994d66a4SLaurent Pinchart } 73994d66a4SLaurent Pinchart 74d000fff9SLaurent Pinchart /* SCIF */ 75d000fff9SLaurent Pinchart #define SH73A0_SCIF(scif_type, index, baseaddr, irq) \ 76d000fff9SLaurent Pinchart static struct plat_sci_port scif##index##_platform_data = { \ 77d000fff9SLaurent Pinchart .type = scif_type, \ 78d000fff9SLaurent Pinchart .mapbase = baseaddr, \ 79d000fff9SLaurent Pinchart .flags = UPF_BOOT_AUTOCONF, \ 80d000fff9SLaurent Pinchart .irqs = SCIx_IRQ_MUXED(irq), \ 81d000fff9SLaurent Pinchart .scbrr_algo_id = SCBRR_ALGO_4, \ 82d000fff9SLaurent Pinchart .scscr = SCSCR_RE | SCSCR_TE, \ 83d000fff9SLaurent Pinchart }; \ 84d000fff9SLaurent Pinchart \ 85d000fff9SLaurent Pinchart static struct platform_device scif##index##_device = { \ 86d000fff9SLaurent Pinchart .name = "sh-sci", \ 87d000fff9SLaurent Pinchart .id = index, \ 88d000fff9SLaurent Pinchart .dev = { \ 89d000fff9SLaurent Pinchart .platform_data = &scif##index##_platform_data, \ 90d000fff9SLaurent Pinchart }, \ 91d000fff9SLaurent Pinchart } 926d9598e2SMagnus Damm 93d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(72)); 94d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(73)); 95d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(74)); 96d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(75)); 97d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(78)); 98d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(79)); 99d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156)); 100d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143)); 101d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80)); 1026d9598e2SMagnus Damm 1036d9598e2SMagnus Damm static struct sh_timer_config cmt10_platform_data = { 1046d9598e2SMagnus Damm .name = "CMT10", 1056d9598e2SMagnus Damm .channel_offset = 0x10, 1066d9598e2SMagnus Damm .timer_bit = 0, 1075600a848SSimon Horman .clockevent_rating = 80, 1086d9598e2SMagnus Damm .clocksource_rating = 125, 1096d9598e2SMagnus Damm }; 1106d9598e2SMagnus Damm 1116d9598e2SMagnus Damm static struct resource cmt10_resources[] = { 1126d9598e2SMagnus Damm [0] = { 1136d9598e2SMagnus Damm .name = "CMT10", 1146d9598e2SMagnus Damm .start = 0xe6138010, 1156d9598e2SMagnus Damm .end = 0xe613801b, 1166d9598e2SMagnus Damm .flags = IORESOURCE_MEM, 1176d9598e2SMagnus Damm }, 1186d9598e2SMagnus Damm [1] = { 1196d9598e2SMagnus Damm .start = gic_spi(65), 1206d9598e2SMagnus Damm .flags = IORESOURCE_IRQ, 1216d9598e2SMagnus Damm }, 1226d9598e2SMagnus Damm }; 1236d9598e2SMagnus Damm 1246d9598e2SMagnus Damm static struct platform_device cmt10_device = { 1256d9598e2SMagnus Damm .name = "sh_cmt", 1266d9598e2SMagnus Damm .id = 10, 1276d9598e2SMagnus Damm .dev = { 1286d9598e2SMagnus Damm .platform_data = &cmt10_platform_data, 1296d9598e2SMagnus Damm }, 1306d9598e2SMagnus Damm .resource = cmt10_resources, 1316d9598e2SMagnus Damm .num_resources = ARRAY_SIZE(cmt10_resources), 1326d9598e2SMagnus Damm }; 1336d9598e2SMagnus Damm 1345010f3dbSMagnus Damm /* TMU */ 1355010f3dbSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 1365010f3dbSMagnus Damm .name = "TMU00", 1375010f3dbSMagnus Damm .channel_offset = 0x4, 1385010f3dbSMagnus Damm .timer_bit = 0, 1395010f3dbSMagnus Damm .clockevent_rating = 200, 1405010f3dbSMagnus Damm }; 1415010f3dbSMagnus Damm 1425010f3dbSMagnus Damm static struct resource tmu00_resources[] = { 143abbec5f4SSimon Horman [0] = DEFINE_RES_MEM_NAMED(0xfff60008, 0xc, "TMU00"), 1445010f3dbSMagnus Damm [1] = { 1455010f3dbSMagnus Damm .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ 1465010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 1475010f3dbSMagnus Damm }, 1485010f3dbSMagnus Damm }; 1495010f3dbSMagnus Damm 1505010f3dbSMagnus Damm static struct platform_device tmu00_device = { 1515010f3dbSMagnus Damm .name = "sh_tmu", 1525010f3dbSMagnus Damm .id = 0, 1535010f3dbSMagnus Damm .dev = { 1545010f3dbSMagnus Damm .platform_data = &tmu00_platform_data, 1555010f3dbSMagnus Damm }, 1565010f3dbSMagnus Damm .resource = tmu00_resources, 1575010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 1585010f3dbSMagnus Damm }; 1595010f3dbSMagnus Damm 1605010f3dbSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 1615010f3dbSMagnus Damm .name = "TMU01", 1625010f3dbSMagnus Damm .channel_offset = 0x10, 1635010f3dbSMagnus Damm .timer_bit = 1, 1645010f3dbSMagnus Damm .clocksource_rating = 200, 1655010f3dbSMagnus Damm }; 1665010f3dbSMagnus Damm 1675010f3dbSMagnus Damm static struct resource tmu01_resources[] = { 168abbec5f4SSimon Horman [0] = DEFINE_RES_MEM_NAMED(0xfff60014, 0xc, "TMU00"), 1695010f3dbSMagnus Damm [1] = { 1705010f3dbSMagnus Damm .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ 1715010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 1725010f3dbSMagnus Damm }, 1735010f3dbSMagnus Damm }; 1745010f3dbSMagnus Damm 1755010f3dbSMagnus Damm static struct platform_device tmu01_device = { 1765010f3dbSMagnus Damm .name = "sh_tmu", 1775010f3dbSMagnus Damm .id = 1, 1785010f3dbSMagnus Damm .dev = { 1795010f3dbSMagnus Damm .platform_data = &tmu01_platform_data, 1805010f3dbSMagnus Damm }, 1815010f3dbSMagnus Damm .resource = tmu01_resources, 1825010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 1835010f3dbSMagnus Damm }; 1845010f3dbSMagnus Damm 185b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 186abbec5f4SSimon Horman [0] = DEFINE_RES_MEM_NAMED(0xe6820000, 0x426, "IIC0"), 187b028f94bSYoshii Takashi [1] = { 188b028f94bSYoshii Takashi .start = gic_spi(167), 189b028f94bSYoshii Takashi .end = gic_spi(170), 190b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 191b028f94bSYoshii Takashi }, 192b028f94bSYoshii Takashi }; 193b028f94bSYoshii Takashi 194b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 195abbec5f4SSimon Horman [0] = DEFINE_RES_MEM_NAMED(0xe6822000, 0x426, "IIC1"), 196b028f94bSYoshii Takashi [1] = { 197b028f94bSYoshii Takashi .start = gic_spi(51), 198b028f94bSYoshii Takashi .end = gic_spi(54), 199b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 200b028f94bSYoshii Takashi }, 201b028f94bSYoshii Takashi }; 202b028f94bSYoshii Takashi 203b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 204abbec5f4SSimon Horman [0] = DEFINE_RES_MEM_NAMED(0xe6824000, 0x426, "IIC2"), 205b028f94bSYoshii Takashi [1] = { 206b028f94bSYoshii Takashi .start = gic_spi(171), 207b028f94bSYoshii Takashi .end = gic_spi(174), 208b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 209b028f94bSYoshii Takashi }, 210b028f94bSYoshii Takashi }; 211b028f94bSYoshii Takashi 212b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 213abbec5f4SSimon Horman [0] = DEFINE_RES_MEM_NAMED(0xe6826000, 0x426, "IIC3"), 214b028f94bSYoshii Takashi [1] = { 215b028f94bSYoshii Takashi .start = gic_spi(183), 216b028f94bSYoshii Takashi .end = gic_spi(186), 217b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 218b028f94bSYoshii Takashi }, 219b028f94bSYoshii Takashi }; 220b028f94bSYoshii Takashi 221b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 222abbec5f4SSimon Horman [0] = DEFINE_RES_MEM_NAMED(0xe6828000, 0x426, "IIC4"), 223b028f94bSYoshii Takashi [1] = { 224b028f94bSYoshii Takashi .start = gic_spi(187), 225b028f94bSYoshii Takashi .end = gic_spi(190), 226b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 227b028f94bSYoshii Takashi }, 228b028f94bSYoshii Takashi }; 229b028f94bSYoshii Takashi 230b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 231b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 232b028f94bSYoshii Takashi .id = 0, 233b028f94bSYoshii Takashi .resource = i2c0_resources, 234b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 235b028f94bSYoshii Takashi }; 236b028f94bSYoshii Takashi 237b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 238b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 239b028f94bSYoshii Takashi .id = 1, 240b028f94bSYoshii Takashi .resource = i2c1_resources, 241b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 242b028f94bSYoshii Takashi }; 243b028f94bSYoshii Takashi 244b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 245b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 246b028f94bSYoshii Takashi .id = 2, 247b028f94bSYoshii Takashi .resource = i2c2_resources, 248b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 249b028f94bSYoshii Takashi }; 250b028f94bSYoshii Takashi 251b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 252b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 253b028f94bSYoshii Takashi .id = 3, 254b028f94bSYoshii Takashi .resource = i2c3_resources, 255b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 256b028f94bSYoshii Takashi }; 257b028f94bSYoshii Takashi 258b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 259b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 260b028f94bSYoshii Takashi .id = 4, 261b028f94bSYoshii Takashi .resource = i2c4_resources, 262b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 263b028f94bSYoshii Takashi }; 264b028f94bSYoshii Takashi 265681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 266681e1b3eSMagnus Damm { 267681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 268681e1b3eSMagnus Damm .addr = 0xe6c40020, 269681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 270681e1b3eSMagnus Damm .mid_rid = 0x21, 271681e1b3eSMagnus Damm }, { 272681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 273681e1b3eSMagnus Damm .addr = 0xe6c40024, 274681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 275681e1b3eSMagnus Damm .mid_rid = 0x22, 276681e1b3eSMagnus Damm }, { 277681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 278681e1b3eSMagnus Damm .addr = 0xe6c50020, 279681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 280681e1b3eSMagnus Damm .mid_rid = 0x25, 281681e1b3eSMagnus Damm }, { 282681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 283681e1b3eSMagnus Damm .addr = 0xe6c50024, 284681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 285681e1b3eSMagnus Damm .mid_rid = 0x26, 286681e1b3eSMagnus Damm }, { 287681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 288681e1b3eSMagnus Damm .addr = 0xe6c60020, 289681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 290681e1b3eSMagnus Damm .mid_rid = 0x29, 291681e1b3eSMagnus Damm }, { 292681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 293681e1b3eSMagnus Damm .addr = 0xe6c60024, 294681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 295681e1b3eSMagnus Damm .mid_rid = 0x2a, 296681e1b3eSMagnus Damm }, { 297681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 298681e1b3eSMagnus Damm .addr = 0xe6c70020, 299681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 300681e1b3eSMagnus Damm .mid_rid = 0x2d, 301681e1b3eSMagnus Damm }, { 302681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 303681e1b3eSMagnus Damm .addr = 0xe6c70024, 304681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 305681e1b3eSMagnus Damm .mid_rid = 0x2e, 306681e1b3eSMagnus Damm }, { 307681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 308681e1b3eSMagnus Damm .addr = 0xe6c80020, 309681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 310681e1b3eSMagnus Damm .mid_rid = 0x39, 311681e1b3eSMagnus Damm }, { 312681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 313681e1b3eSMagnus Damm .addr = 0xe6c80024, 314681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 315681e1b3eSMagnus Damm .mid_rid = 0x3a, 316681e1b3eSMagnus Damm }, { 317681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 318681e1b3eSMagnus Damm .addr = 0xe6cb0020, 319681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 320681e1b3eSMagnus Damm .mid_rid = 0x35, 321681e1b3eSMagnus Damm }, { 322681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 323681e1b3eSMagnus Damm .addr = 0xe6cb0024, 324681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 325681e1b3eSMagnus Damm .mid_rid = 0x36, 326681e1b3eSMagnus Damm }, { 327681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 328681e1b3eSMagnus Damm .addr = 0xe6cc0020, 329681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 330681e1b3eSMagnus Damm .mid_rid = 0x1d, 331681e1b3eSMagnus Damm }, { 332681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 333681e1b3eSMagnus Damm .addr = 0xe6cc0024, 334681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 335681e1b3eSMagnus Damm .mid_rid = 0x1e, 336681e1b3eSMagnus Damm }, { 337681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 338681e1b3eSMagnus Damm .addr = 0xe6cd0020, 339681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 340681e1b3eSMagnus Damm .mid_rid = 0x19, 341681e1b3eSMagnus Damm }, { 342681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 343681e1b3eSMagnus Damm .addr = 0xe6cd0024, 344681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 345681e1b3eSMagnus Damm .mid_rid = 0x1a, 346681e1b3eSMagnus Damm }, { 347681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 348681e1b3eSMagnus Damm .addr = 0xe6c30040, 349681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 350681e1b3eSMagnus Damm .mid_rid = 0x3d, 351681e1b3eSMagnus Damm }, { 352681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 353681e1b3eSMagnus Damm .addr = 0xe6c30060, 354681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 355681e1b3eSMagnus Damm .mid_rid = 0x3e, 356681e1b3eSMagnus Damm }, { 357681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 358681e1b3eSMagnus Damm .addr = 0xee100030, 359681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 360681e1b3eSMagnus Damm .mid_rid = 0xc1, 361681e1b3eSMagnus Damm }, { 362681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 363681e1b3eSMagnus Damm .addr = 0xee100030, 364681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 365681e1b3eSMagnus Damm .mid_rid = 0xc2, 366681e1b3eSMagnus Damm }, { 367681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 368681e1b3eSMagnus Damm .addr = 0xee120030, 369681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 370681e1b3eSMagnus Damm .mid_rid = 0xc9, 371681e1b3eSMagnus Damm }, { 372681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 373681e1b3eSMagnus Damm .addr = 0xee120030, 374681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 375681e1b3eSMagnus Damm .mid_rid = 0xca, 376681e1b3eSMagnus Damm }, { 377681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 378681e1b3eSMagnus Damm .addr = 0xee140030, 379681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 380681e1b3eSMagnus Damm .mid_rid = 0xcd, 381681e1b3eSMagnus Damm }, { 382681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 383681e1b3eSMagnus Damm .addr = 0xee140030, 384681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 385681e1b3eSMagnus Damm .mid_rid = 0xce, 386681e1b3eSMagnus Damm }, { 387681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 388681e1b3eSMagnus Damm .addr = 0xe6bd0034, 389681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 390681e1b3eSMagnus Damm .mid_rid = 0xd1, 391681e1b3eSMagnus Damm }, { 392681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 393681e1b3eSMagnus Damm .addr = 0xe6bd0034, 394681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 395681e1b3eSMagnus Damm .mid_rid = 0xd2, 396681e1b3eSMagnus Damm }, 397681e1b3eSMagnus Damm }; 398681e1b3eSMagnus Damm 399681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 400681e1b3eSMagnus Damm { \ 401681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 402681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 403681e1b3eSMagnus Damm } 404681e1b3eSMagnus Damm 405681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 406681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 407681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 408681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 409681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 410681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 411681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 412681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 413681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 414681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 415681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 416681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 417681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 418681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 419681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 420681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 421681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 422681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 423681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 424681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 425681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 426681e1b3eSMagnus Damm }; 427681e1b3eSMagnus Damm 428681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 429681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 430681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 431681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 432681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 4336088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 4346088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 4356088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 4366088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 4376088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 4386088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 439681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 440681e1b3eSMagnus Damm }; 441681e1b3eSMagnus Damm 442681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 443abbec5f4SSimon Horman DEFINE_RES_MEM(0xfe000020, 0x89e0), 444681e1b3eSMagnus Damm { 44520052462SShimoda, Yoshihiro .name = "error_irq", 446681e1b3eSMagnus Damm .start = gic_spi(129), 447681e1b3eSMagnus Damm .end = gic_spi(129), 448681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 449681e1b3eSMagnus Damm }, 450681e1b3eSMagnus Damm { 451681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 452681e1b3eSMagnus Damm .start = gic_spi(109), 453681e1b3eSMagnus Damm .end = gic_spi(128), 454681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 455681e1b3eSMagnus Damm }, 456681e1b3eSMagnus Damm }; 457681e1b3eSMagnus Damm 458681e1b3eSMagnus Damm static struct platform_device dma0_device = { 459681e1b3eSMagnus Damm .name = "sh-dma-engine", 460681e1b3eSMagnus Damm .id = 0, 461681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 462681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 463681e1b3eSMagnus Damm .dev = { 464681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 465681e1b3eSMagnus Damm }, 466681e1b3eSMagnus Damm }; 467681e1b3eSMagnus Damm 468832290b2SKuninori Morimoto /* MPDMAC */ 469832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 470832290b2SKuninori Morimoto { 471832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 472832290b2SKuninori Morimoto .addr = 0xec230020, 473832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 474832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 475832290b2SKuninori Morimoto }, { 476832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 477832290b2SKuninori Morimoto .addr = 0xec230024, 478832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 479832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 480832290b2SKuninori Morimoto }, { 481832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 482832290b2SKuninori Morimoto .addr = 0xec230060, 483832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 484832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 485832290b2SKuninori Morimoto }, { 486832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 487832290b2SKuninori Morimoto .addr = 0xec230064, 488832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 489832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 490832290b2SKuninori Morimoto }, { 491832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 492832290b2SKuninori Morimoto .addr = 0xec240020, 493832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 494832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 495832290b2SKuninori Morimoto }, { 496832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 497832290b2SKuninori Morimoto .addr = 0xec240024, 498832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 499832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 500832290b2SKuninori Morimoto }, { 501832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 502832290b2SKuninori Morimoto .addr = 0xec240060, 503832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 504832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 505832290b2SKuninori Morimoto }, 506832290b2SKuninori Morimoto }; 507832290b2SKuninori Morimoto 508832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 509832290b2SKuninori Morimoto { \ 510832290b2SKuninori Morimoto .offset = a, \ 511832290b2SKuninori Morimoto .dmars = b, \ 512832290b2SKuninori Morimoto .dmars_bit = c, \ 513832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 514832290b2SKuninori Morimoto } 515832290b2SKuninori Morimoto 516832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 517832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 518832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 519832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 520832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 521832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 522832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 523832290b2SKuninori Morimoto }; 524832290b2SKuninori Morimoto 525832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 526832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 527832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 528832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 529832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 5306088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 5316088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 5326088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 5336088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 5346088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 5356088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 536832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 537832290b2SKuninori Morimoto .chclr_present = 1, 538832290b2SKuninori Morimoto }; 539832290b2SKuninori Morimoto 540832290b2SKuninori Morimoto /* Resource order important! */ 541832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 542832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 543abbec5f4SSimon Horman DEFINE_RES_MEM(0xec618020, 0x270), 544832290b2SKuninori Morimoto /* DMARSx */ 545abbec5f4SSimon Horman DEFINE_RES_MEM(0xec619000, 0xc), 546832290b2SKuninori Morimoto { 547832290b2SKuninori Morimoto .name = "error_irq", 548832290b2SKuninori Morimoto .start = gic_spi(181), 549832290b2SKuninori Morimoto .end = gic_spi(181), 550832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 551832290b2SKuninori Morimoto }, 552832290b2SKuninori Morimoto { 553832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 554832290b2SKuninori Morimoto .start = gic_spi(175), 555832290b2SKuninori Morimoto .end = gic_spi(180), 556832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 557832290b2SKuninori Morimoto }, 558832290b2SKuninori Morimoto }; 559832290b2SKuninori Morimoto 560832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 561832290b2SKuninori Morimoto .name = "sh-dma-engine", 562832290b2SKuninori Morimoto .id = 1, 563832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 564832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 565832290b2SKuninori Morimoto .dev = { 566832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 567832290b2SKuninori Morimoto }, 568832290b2SKuninori Morimoto }; 569832290b2SKuninori Morimoto 570f23f5be0STetsuyuki Kobayashi static struct resource pmu_resources[] = { 571f23f5be0STetsuyuki Kobayashi [0] = { 572f23f5be0STetsuyuki Kobayashi .start = gic_spi(55), 573f23f5be0STetsuyuki Kobayashi .end = gic_spi(55), 574f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 575f23f5be0STetsuyuki Kobayashi }, 576f23f5be0STetsuyuki Kobayashi [1] = { 577f23f5be0STetsuyuki Kobayashi .start = gic_spi(56), 578f23f5be0STetsuyuki Kobayashi .end = gic_spi(56), 579f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 580f23f5be0STetsuyuki Kobayashi }, 581f23f5be0STetsuyuki Kobayashi }; 582f23f5be0STetsuyuki Kobayashi 583f23f5be0STetsuyuki Kobayashi static struct platform_device pmu_device = { 584f23f5be0STetsuyuki Kobayashi .name = "arm-pmu", 585f23f5be0STetsuyuki Kobayashi .id = -1, 586f23f5be0STetsuyuki Kobayashi .num_resources = ARRAY_SIZE(pmu_resources), 587f23f5be0STetsuyuki Kobayashi .resource = pmu_resources, 588f23f5be0STetsuyuki Kobayashi }; 589f23f5be0STetsuyuki Kobayashi 5909a27dee7SHideki EIRAKU /* an IPMMU module for ICB */ 5919a27dee7SHideki EIRAKU static struct resource ipmmu_resources[] = { 592abbec5f4SSimon Horman DEFINE_RES_MEM_NAMED(0xfe951000, 0x100, "IPMMU"), 5939a27dee7SHideki EIRAKU }; 5949a27dee7SHideki EIRAKU 5959a27dee7SHideki EIRAKU static const char * const ipmmu_dev_names[] = { 5969a27dee7SHideki EIRAKU "sh_mobile_lcdc_fb.0", 5979a27dee7SHideki EIRAKU }; 5989a27dee7SHideki EIRAKU 5999a27dee7SHideki EIRAKU static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { 6009a27dee7SHideki EIRAKU .dev_names = ipmmu_dev_names, 6019a27dee7SHideki EIRAKU .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), 6029a27dee7SHideki EIRAKU }; 6039a27dee7SHideki EIRAKU 6049a27dee7SHideki EIRAKU static struct platform_device ipmmu_device = { 6059a27dee7SHideki EIRAKU .name = "ipmmu", 6069a27dee7SHideki EIRAKU .id = -1, 6079a27dee7SHideki EIRAKU .dev = { 6089a27dee7SHideki EIRAKU .platform_data = &ipmmu_platform_data, 6099a27dee7SHideki EIRAKU }, 6109a27dee7SHideki EIRAKU .resource = ipmmu_resources, 6119a27dee7SHideki EIRAKU .num_resources = ARRAY_SIZE(ipmmu_resources), 6129a27dee7SHideki EIRAKU }; 6139a27dee7SHideki EIRAKU 6141461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin0_platform_data = { 615341eb546SMagnus Damm .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */ 616341eb546SMagnus Damm }; 617341eb546SMagnus Damm 618341eb546SMagnus Damm static struct resource irqpin0_resources[] = { 619341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ 620341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ 621341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ 622341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ 623341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ 624341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(1)), /* IRQ0 */ 625341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(2)), /* IRQ1 */ 626341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(3)), /* IRQ2 */ 627341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(4)), /* IRQ3 */ 628341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(5)), /* IRQ4 */ 629341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(6)), /* IRQ5 */ 630341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(7)), /* IRQ6 */ 631341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(8)), /* IRQ7 */ 632341eb546SMagnus Damm }; 633341eb546SMagnus Damm 634341eb546SMagnus Damm static struct platform_device irqpin0_device = { 635341eb546SMagnus Damm .name = "renesas_intc_irqpin", 636341eb546SMagnus Damm .id = 0, 637341eb546SMagnus Damm .resource = irqpin0_resources, 638341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin0_resources), 639341eb546SMagnus Damm .dev = { 640341eb546SMagnus Damm .platform_data = &irqpin0_platform_data, 641341eb546SMagnus Damm }, 642341eb546SMagnus Damm }; 643341eb546SMagnus Damm 6441461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin1_platform_data = { 645341eb546SMagnus Damm .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */ 646341eb546SMagnus Damm .control_parent = true, /* Disable spurious IRQ10 */ 647341eb546SMagnus Damm }; 648341eb546SMagnus Damm 649341eb546SMagnus Damm static struct resource irqpin1_resources[] = { 650341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ 651341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ 652341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ 653341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */ 654341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */ 655341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(9)), /* IRQ8 */ 656341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(10)), /* IRQ9 */ 657341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(11)), /* IRQ10 */ 658341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(12)), /* IRQ11 */ 659341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(13)), /* IRQ12 */ 660341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(14)), /* IRQ13 */ 661341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(15)), /* IRQ14 */ 662341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(16)), /* IRQ15 */ 663341eb546SMagnus Damm }; 664341eb546SMagnus Damm 665341eb546SMagnus Damm static struct platform_device irqpin1_device = { 666341eb546SMagnus Damm .name = "renesas_intc_irqpin", 667341eb546SMagnus Damm .id = 1, 668341eb546SMagnus Damm .resource = irqpin1_resources, 669341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin1_resources), 670341eb546SMagnus Damm .dev = { 671341eb546SMagnus Damm .platform_data = &irqpin1_platform_data, 672341eb546SMagnus Damm }, 673341eb546SMagnus Damm }; 674341eb546SMagnus Damm 6751461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin2_platform_data = { 676341eb546SMagnus Damm .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */ 677341eb546SMagnus Damm }; 678341eb546SMagnus Damm 679341eb546SMagnus Damm static struct resource irqpin2_resources[] = { 680341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */ 681341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI20A */ 682341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ20A */ 683341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK20A */ 684341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR20A */ 685341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(17)), /* IRQ16 */ 686341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(18)), /* IRQ17 */ 687341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(19)), /* IRQ18 */ 688341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(20)), /* IRQ19 */ 689341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(21)), /* IRQ20 */ 690341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(22)), /* IRQ21 */ 691341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(23)), /* IRQ22 */ 692341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(24)), /* IRQ23 */ 693341eb546SMagnus Damm }; 694341eb546SMagnus Damm 695341eb546SMagnus Damm static struct platform_device irqpin2_device = { 696341eb546SMagnus Damm .name = "renesas_intc_irqpin", 697341eb546SMagnus Damm .id = 2, 698341eb546SMagnus Damm .resource = irqpin2_resources, 699341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin2_resources), 700341eb546SMagnus Damm .dev = { 701341eb546SMagnus Damm .platform_data = &irqpin2_platform_data, 702341eb546SMagnus Damm }, 703341eb546SMagnus Damm }; 704341eb546SMagnus Damm 7051461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin3_platform_data = { 706341eb546SMagnus Damm .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */ 707341eb546SMagnus Damm }; 708341eb546SMagnus Damm 709341eb546SMagnus Damm static struct resource irqpin3_resources[] = { 710341eb546SMagnus Damm DEFINE_RES_MEM(0xe690000c, 4), /* ICR4A */ 711341eb546SMagnus Damm DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */ 712341eb546SMagnus Damm DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */ 713341eb546SMagnus Damm DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */ 714341eb546SMagnus Damm DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */ 715341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(25)), /* IRQ24 */ 716341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(26)), /* IRQ25 */ 717341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(27)), /* IRQ26 */ 718341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(28)), /* IRQ27 */ 719341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(29)), /* IRQ28 */ 720341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(30)), /* IRQ29 */ 721341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(31)), /* IRQ30 */ 722341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(32)), /* IRQ31 */ 723341eb546SMagnus Damm }; 724341eb546SMagnus Damm 725341eb546SMagnus Damm static struct platform_device irqpin3_device = { 726341eb546SMagnus Damm .name = "renesas_intc_irqpin", 727341eb546SMagnus Damm .id = 3, 728341eb546SMagnus Damm .resource = irqpin3_resources, 729341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin3_resources), 730341eb546SMagnus Damm .dev = { 731341eb546SMagnus Damm .platform_data = &irqpin3_platform_data, 732341eb546SMagnus Damm }, 733341eb546SMagnus Damm }; 734341eb546SMagnus Damm 7353b00f934SSimon Horman static struct platform_device *sh73a0_devices_dt[] __initdata = { 7366d9598e2SMagnus Damm &scif0_device, 7376d9598e2SMagnus Damm &scif1_device, 7386d9598e2SMagnus Damm &scif2_device, 7396d9598e2SMagnus Damm &scif3_device, 7406d9598e2SMagnus Damm &scif4_device, 7416d9598e2SMagnus Damm &scif5_device, 7426d9598e2SMagnus Damm &scif6_device, 7436d9598e2SMagnus Damm &scif7_device, 7446d9598e2SMagnus Damm &scif8_device, 7456d9598e2SMagnus Damm &cmt10_device, 74648609533SSimon Horman }; 74748609533SSimon Horman 74848609533SSimon Horman static struct platform_device *sh73a0_early_devices[] __initdata = { 7495010f3dbSMagnus Damm &tmu00_device, 7505010f3dbSMagnus Damm &tmu01_device, 7519a27dee7SHideki EIRAKU &ipmmu_device, 7526d9598e2SMagnus Damm }; 7536d9598e2SMagnus Damm 754b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 755b028f94bSYoshii Takashi &i2c0_device, 756b028f94bSYoshii Takashi &i2c1_device, 757b028f94bSYoshii Takashi &i2c2_device, 758b028f94bSYoshii Takashi &i2c3_device, 759b028f94bSYoshii Takashi &i2c4_device, 760681e1b3eSMagnus Damm &dma0_device, 761832290b2SKuninori Morimoto &mpdma0_device, 762f23f5be0STetsuyuki Kobayashi &pmu_device, 763341eb546SMagnus Damm &irqpin0_device, 764341eb546SMagnus Damm &irqpin1_device, 765341eb546SMagnus Damm &irqpin2_device, 766341eb546SMagnus Damm &irqpin3_device, 767b028f94bSYoshii Takashi }; 768b028f94bSYoshii Takashi 7690a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 770681e1b3eSMagnus Damm 7716d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 7726d9598e2SMagnus Damm { 773681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 774681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 775681e1b3eSMagnus Damm 7763b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 7773b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 7786d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 7796d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 780b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 781b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 7826d9598e2SMagnus Damm } 7836d9598e2SMagnus Damm 78443cb8cb7SMagnus Damm void __init sh73a0_init_delay(void) 78543cb8cb7SMagnus Damm { 78643cb8cb7SMagnus Damm shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ 78743cb8cb7SMagnus Damm } 78843cb8cb7SMagnus Damm 789d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 790d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 791d6720003SKuninori Morimoto 7926bb27d73SStephen Warren void __init sh73a0_earlytimer_init(void) 7933be26fdbSMagnus Damm { 79443cb8cb7SMagnus Damm sh73a0_init_delay(); 7953be26fdbSMagnus Damm sh73a0_clock_init(); 7963be26fdbSMagnus Damm shmobile_earlytimer_init(); 797d6720003SKuninori Morimoto sh73a0_register_twd(); 7983be26fdbSMagnus Damm } 7993be26fdbSMagnus Damm 8006d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 8016d9598e2SMagnus Damm { 8023b00f934SSimon Horman early_platform_add_devices(sh73a0_devices_dt, 8033b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 8046d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 8056d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 80650e15c34SMagnus Damm 80750e15c34SMagnus Damm /* setup early console here as well */ 80850e15c34SMagnus Damm shmobile_setup_console(); 8096d9598e2SMagnus Damm } 81048609533SSimon Horman 81148609533SSimon Horman #ifdef CONFIG_USE_OF 81248609533SSimon Horman 81348609533SSimon Horman void __init sh73a0_add_standard_devices_dt(void) 81448609533SSimon Horman { 815d2347382SGuennadi Liakhovetski struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, }; 816d2347382SGuennadi Liakhovetski 81748609533SSimon Horman /* clocks are setup late during boot in the case of DT */ 81848609533SSimon Horman sh73a0_clock_init(); 81948609533SSimon Horman 8203b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 8213b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 822ea31597fSMagnus Damm of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 823d2347382SGuennadi Liakhovetski 824d2347382SGuennadi Liakhovetski /* Instantiate cpufreq-cpu0 */ 825d2347382SGuennadi Liakhovetski platform_device_register_full(&devinfo); 82648609533SSimon Horman } 82748609533SSimon Horman 82848609533SSimon Horman static const char *sh73a0_boards_compat_dt[] __initdata = { 82948609533SSimon Horman "renesas,sh73a0", 83048609533SSimon Horman NULL, 83148609533SSimon Horman }; 83248609533SSimon Horman 83348609533SSimon Horman DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") 834f9989507SSimon Horman .smp = smp_ops(sh73a0_smp_ops), 83548609533SSimon Horman .map_io = sh73a0_map_io, 8363b00f934SSimon Horman .init_early = sh73a0_init_delay, 83748609533SSimon Horman .nr_irqs = NR_IRQS_LEGACY, 83848609533SSimon Horman .init_machine = sh73a0_add_standard_devices_dt, 83948609533SSimon Horman .dt_compat = sh73a0_boards_compat_dt, 84048609533SSimon Horman MACHINE_END 84148609533SSimon Horman #endif /* CONFIG_USE_OF */ 842