16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 256d9598e2SMagnus Damm #include <linux/platform_device.h> 2648609533SSimon Horman #include <linux/of_platform.h> 276d9598e2SMagnus Damm #include <linux/delay.h> 286d9598e2SMagnus Damm #include <linux/input.h> 296d9598e2SMagnus Damm #include <linux/io.h> 306d9598e2SMagnus Damm #include <linux/serial_sci.h> 31681e1b3eSMagnus Damm #include <linux/sh_dma.h> 326d9598e2SMagnus Damm #include <linux/sh_timer.h> 339a27dee7SHideki EIRAKU #include <linux/platform_data/sh_ipmmu.h> 34341eb546SMagnus Damm #include <linux/platform_data/irq-renesas-intc-irqpin.h> 35681e1b3eSMagnus Damm #include <mach/sh73a0.h> 3650e15c34SMagnus Damm #include <mach/common.h> 376d9598e2SMagnus Damm #include <asm/mach-types.h> 3850e15c34SMagnus Damm #include <asm/mach/map.h> 396d9598e2SMagnus Damm #include <asm/mach/arch.h> 403be26fdbSMagnus Damm #include <asm/mach/time.h> 4174ac0de8SMagnus Damm #include "dma-register.h" 42b6bab126SMagnus Damm #include "irqs.h" 436d9598e2SMagnus Damm 4450e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4550e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4650e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4750e15c34SMagnus Damm */ 4850e15c34SMagnus Damm { 4950e15c34SMagnus Damm .virtual = 0xe6000000, 5050e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5150e15c34SMagnus Damm .length = 256 << 20, 5250e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5350e15c34SMagnus Damm }, 5450e15c34SMagnus Damm }; 5550e15c34SMagnus Damm 5650e15c34SMagnus Damm void __init sh73a0_map_io(void) 5750e15c34SMagnus Damm { 5850e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 5950e15c34SMagnus Damm } 6050e15c34SMagnus Damm 61474f6758SMagnus Damm /* PFC */ 62474f6758SMagnus Damm static struct resource pfc_resources[] __initdata = { 63474f6758SMagnus Damm DEFINE_RES_MEM(0xe6050000, 0x8000), 64474f6758SMagnus Damm DEFINE_RES_MEM(0xe605801c, 0x000c), 65994d66a4SLaurent Pinchart }; 66994d66a4SLaurent Pinchart 67994d66a4SLaurent Pinchart void __init sh73a0_pinmux_init(void) 68994d66a4SLaurent Pinchart { 69474f6758SMagnus Damm platform_device_register_simple("pfc-sh73a0", -1, pfc_resources, 70474f6758SMagnus Damm ARRAY_SIZE(pfc_resources)); 71994d66a4SLaurent Pinchart } 72994d66a4SLaurent Pinchart 73d000fff9SLaurent Pinchart /* SCIF */ 74d000fff9SLaurent Pinchart #define SH73A0_SCIF(scif_type, index, baseaddr, irq) \ 75d000fff9SLaurent Pinchart static struct plat_sci_port scif##index##_platform_data = { \ 76d000fff9SLaurent Pinchart .type = scif_type, \ 77d000fff9SLaurent Pinchart .flags = UPF_BOOT_AUTOCONF, \ 78d000fff9SLaurent Pinchart .scscr = SCSCR_RE | SCSCR_TE, \ 79d000fff9SLaurent Pinchart }; \ 80d000fff9SLaurent Pinchart \ 8131e1ee86SLaurent Pinchart static struct resource scif##index##_resources[] = { \ 8231e1ee86SLaurent Pinchart DEFINE_RES_MEM(baseaddr, 0x100), \ 8331e1ee86SLaurent Pinchart DEFINE_RES_IRQ(irq), \ 8431e1ee86SLaurent Pinchart }; \ 8531e1ee86SLaurent Pinchart \ 86d000fff9SLaurent Pinchart static struct platform_device scif##index##_device = { \ 87d000fff9SLaurent Pinchart .name = "sh-sci", \ 88d000fff9SLaurent Pinchart .id = index, \ 8931e1ee86SLaurent Pinchart .resource = scif##index##_resources, \ 9031e1ee86SLaurent Pinchart .num_resources = ARRAY_SIZE(scif##index##_resources), \ 91d000fff9SLaurent Pinchart .dev = { \ 92d000fff9SLaurent Pinchart .platform_data = &scif##index##_platform_data, \ 93d000fff9SLaurent Pinchart }, \ 94d000fff9SLaurent Pinchart } 956d9598e2SMagnus Damm 96d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(72)); 97d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(73)); 98d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(74)); 99d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(75)); 100d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(78)); 101d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(79)); 102d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156)); 103d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143)); 104d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80)); 1056d9598e2SMagnus Damm 106652256fdSLaurent Pinchart static struct sh_timer_config cmt1_platform_data = { 107652256fdSLaurent Pinchart .channels_mask = 0x3f, 1086d9598e2SMagnus Damm }; 1096d9598e2SMagnus Damm 110652256fdSLaurent Pinchart static struct resource cmt1_resources[] = { 111652256fdSLaurent Pinchart DEFINE_RES_MEM(0xe6138000, 0x200), 112652256fdSLaurent Pinchart DEFINE_RES_IRQ(gic_spi(65)), 1136d9598e2SMagnus Damm }; 1146d9598e2SMagnus Damm 115652256fdSLaurent Pinchart static struct platform_device cmt1_device = { 116652256fdSLaurent Pinchart .name = "sh-cmt-48", 117652256fdSLaurent Pinchart .id = 1, 1186d9598e2SMagnus Damm .dev = { 119652256fdSLaurent Pinchart .platform_data = &cmt1_platform_data, 1206d9598e2SMagnus Damm }, 121652256fdSLaurent Pinchart .resource = cmt1_resources, 122652256fdSLaurent Pinchart .num_resources = ARRAY_SIZE(cmt1_resources), 1236d9598e2SMagnus Damm }; 1246d9598e2SMagnus Damm 1255010f3dbSMagnus Damm /* TMU */ 1263df592bcSLaurent Pinchart static struct sh_timer_config tmu0_platform_data = { 1273df592bcSLaurent Pinchart .channels_mask = 7, 1285010f3dbSMagnus Damm }; 1295010f3dbSMagnus Damm 1303df592bcSLaurent Pinchart static struct resource tmu0_resources[] = { 1313df592bcSLaurent Pinchart DEFINE_RES_MEM(0xfff60000, 0x2c), 1323df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xe80)), 1333df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xea0)), 1343df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xec0)), 1355010f3dbSMagnus Damm }; 1365010f3dbSMagnus Damm 1373df592bcSLaurent Pinchart static struct platform_device tmu0_device = { 1383df592bcSLaurent Pinchart .name = "sh-tmu", 1395010f3dbSMagnus Damm .id = 0, 1405010f3dbSMagnus Damm .dev = { 1413df592bcSLaurent Pinchart .platform_data = &tmu0_platform_data, 1425010f3dbSMagnus Damm }, 1433df592bcSLaurent Pinchart .resource = tmu0_resources, 1443df592bcSLaurent Pinchart .num_resources = ARRAY_SIZE(tmu0_resources), 1455010f3dbSMagnus Damm }; 1465010f3dbSMagnus Damm 147b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 1488e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6820000, 0x426), 149b028f94bSYoshii Takashi [1] = { 150b028f94bSYoshii Takashi .start = gic_spi(167), 151b028f94bSYoshii Takashi .end = gic_spi(170), 152b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 153b028f94bSYoshii Takashi }, 154b028f94bSYoshii Takashi }; 155b028f94bSYoshii Takashi 156b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 1578e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6822000, 0x426), 158b028f94bSYoshii Takashi [1] = { 159b028f94bSYoshii Takashi .start = gic_spi(51), 160b028f94bSYoshii Takashi .end = gic_spi(54), 161b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 162b028f94bSYoshii Takashi }, 163b028f94bSYoshii Takashi }; 164b028f94bSYoshii Takashi 165b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 1668e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6824000, 0x426), 167b028f94bSYoshii Takashi [1] = { 168b028f94bSYoshii Takashi .start = gic_spi(171), 169b028f94bSYoshii Takashi .end = gic_spi(174), 170b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 171b028f94bSYoshii Takashi }, 172b028f94bSYoshii Takashi }; 173b028f94bSYoshii Takashi 174b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 1758e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6826000, 0x426), 176b028f94bSYoshii Takashi [1] = { 177b028f94bSYoshii Takashi .start = gic_spi(183), 178b028f94bSYoshii Takashi .end = gic_spi(186), 179b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 180b028f94bSYoshii Takashi }, 181b028f94bSYoshii Takashi }; 182b028f94bSYoshii Takashi 183b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 1848e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6828000, 0x426), 185b028f94bSYoshii Takashi [1] = { 186b028f94bSYoshii Takashi .start = gic_spi(187), 187b028f94bSYoshii Takashi .end = gic_spi(190), 188b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 189b028f94bSYoshii Takashi }, 190b028f94bSYoshii Takashi }; 191b028f94bSYoshii Takashi 192b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 193b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 194b028f94bSYoshii Takashi .id = 0, 195b028f94bSYoshii Takashi .resource = i2c0_resources, 196b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 197b028f94bSYoshii Takashi }; 198b028f94bSYoshii Takashi 199b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 200b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 201b028f94bSYoshii Takashi .id = 1, 202b028f94bSYoshii Takashi .resource = i2c1_resources, 203b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 204b028f94bSYoshii Takashi }; 205b028f94bSYoshii Takashi 206b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 207b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 208b028f94bSYoshii Takashi .id = 2, 209b028f94bSYoshii Takashi .resource = i2c2_resources, 210b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 211b028f94bSYoshii Takashi }; 212b028f94bSYoshii Takashi 213b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 214b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 215b028f94bSYoshii Takashi .id = 3, 216b028f94bSYoshii Takashi .resource = i2c3_resources, 217b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 218b028f94bSYoshii Takashi }; 219b028f94bSYoshii Takashi 220b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 221b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 222b028f94bSYoshii Takashi .id = 4, 223b028f94bSYoshii Takashi .resource = i2c4_resources, 224b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 225b028f94bSYoshii Takashi }; 226b028f94bSYoshii Takashi 227681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 228681e1b3eSMagnus Damm { 229681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 230681e1b3eSMagnus Damm .addr = 0xe6c40020, 231681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 232681e1b3eSMagnus Damm .mid_rid = 0x21, 233681e1b3eSMagnus Damm }, { 234681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 235681e1b3eSMagnus Damm .addr = 0xe6c40024, 236681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 237681e1b3eSMagnus Damm .mid_rid = 0x22, 238681e1b3eSMagnus Damm }, { 239681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 240681e1b3eSMagnus Damm .addr = 0xe6c50020, 241681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 242681e1b3eSMagnus Damm .mid_rid = 0x25, 243681e1b3eSMagnus Damm }, { 244681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 245681e1b3eSMagnus Damm .addr = 0xe6c50024, 246681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 247681e1b3eSMagnus Damm .mid_rid = 0x26, 248681e1b3eSMagnus Damm }, { 249681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 250681e1b3eSMagnus Damm .addr = 0xe6c60020, 251681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 252681e1b3eSMagnus Damm .mid_rid = 0x29, 253681e1b3eSMagnus Damm }, { 254681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 255681e1b3eSMagnus Damm .addr = 0xe6c60024, 256681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 257681e1b3eSMagnus Damm .mid_rid = 0x2a, 258681e1b3eSMagnus Damm }, { 259681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 260681e1b3eSMagnus Damm .addr = 0xe6c70020, 261681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 262681e1b3eSMagnus Damm .mid_rid = 0x2d, 263681e1b3eSMagnus Damm }, { 264681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 265681e1b3eSMagnus Damm .addr = 0xe6c70024, 266681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 267681e1b3eSMagnus Damm .mid_rid = 0x2e, 268681e1b3eSMagnus Damm }, { 269681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 270681e1b3eSMagnus Damm .addr = 0xe6c80020, 271681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 272681e1b3eSMagnus Damm .mid_rid = 0x39, 273681e1b3eSMagnus Damm }, { 274681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 275681e1b3eSMagnus Damm .addr = 0xe6c80024, 276681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 277681e1b3eSMagnus Damm .mid_rid = 0x3a, 278681e1b3eSMagnus Damm }, { 279681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 280681e1b3eSMagnus Damm .addr = 0xe6cb0020, 281681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 282681e1b3eSMagnus Damm .mid_rid = 0x35, 283681e1b3eSMagnus Damm }, { 284681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 285681e1b3eSMagnus Damm .addr = 0xe6cb0024, 286681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 287681e1b3eSMagnus Damm .mid_rid = 0x36, 288681e1b3eSMagnus Damm }, { 289681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 290681e1b3eSMagnus Damm .addr = 0xe6cc0020, 291681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 292681e1b3eSMagnus Damm .mid_rid = 0x1d, 293681e1b3eSMagnus Damm }, { 294681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 295681e1b3eSMagnus Damm .addr = 0xe6cc0024, 296681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 297681e1b3eSMagnus Damm .mid_rid = 0x1e, 298681e1b3eSMagnus Damm }, { 299681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 300681e1b3eSMagnus Damm .addr = 0xe6cd0020, 301681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 302681e1b3eSMagnus Damm .mid_rid = 0x19, 303681e1b3eSMagnus Damm }, { 304681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 305681e1b3eSMagnus Damm .addr = 0xe6cd0024, 306681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 307681e1b3eSMagnus Damm .mid_rid = 0x1a, 308681e1b3eSMagnus Damm }, { 309681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 310681e1b3eSMagnus Damm .addr = 0xe6c30040, 311681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 312681e1b3eSMagnus Damm .mid_rid = 0x3d, 313681e1b3eSMagnus Damm }, { 314681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 315681e1b3eSMagnus Damm .addr = 0xe6c30060, 316681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 317681e1b3eSMagnus Damm .mid_rid = 0x3e, 318681e1b3eSMagnus Damm }, { 319681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 320681e1b3eSMagnus Damm .addr = 0xee100030, 321681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 322681e1b3eSMagnus Damm .mid_rid = 0xc1, 323681e1b3eSMagnus Damm }, { 324681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 325681e1b3eSMagnus Damm .addr = 0xee100030, 326681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 327681e1b3eSMagnus Damm .mid_rid = 0xc2, 328681e1b3eSMagnus Damm }, { 329681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 330681e1b3eSMagnus Damm .addr = 0xee120030, 331681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 332681e1b3eSMagnus Damm .mid_rid = 0xc9, 333681e1b3eSMagnus Damm }, { 334681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 335681e1b3eSMagnus Damm .addr = 0xee120030, 336681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 337681e1b3eSMagnus Damm .mid_rid = 0xca, 338681e1b3eSMagnus Damm }, { 339681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 340681e1b3eSMagnus Damm .addr = 0xee140030, 341681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 342681e1b3eSMagnus Damm .mid_rid = 0xcd, 343681e1b3eSMagnus Damm }, { 344681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 345681e1b3eSMagnus Damm .addr = 0xee140030, 346681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 347681e1b3eSMagnus Damm .mid_rid = 0xce, 348681e1b3eSMagnus Damm }, { 349681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 350681e1b3eSMagnus Damm .addr = 0xe6bd0034, 351681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 352681e1b3eSMagnus Damm .mid_rid = 0xd1, 353681e1b3eSMagnus Damm }, { 354681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 355681e1b3eSMagnus Damm .addr = 0xe6bd0034, 356681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 357681e1b3eSMagnus Damm .mid_rid = 0xd2, 358681e1b3eSMagnus Damm }, 359681e1b3eSMagnus Damm }; 360681e1b3eSMagnus Damm 361681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 362681e1b3eSMagnus Damm { \ 363681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 364681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 365681e1b3eSMagnus Damm } 366681e1b3eSMagnus Damm 367681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 368681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 369681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 370681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 371681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 372681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 373681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 374681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 375681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 376681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 377681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 378681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 379681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 380681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 381681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 382681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 383681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 384681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 385681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 386681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 387681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 388681e1b3eSMagnus Damm }; 389681e1b3eSMagnus Damm 390681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 391681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 392681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 393681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 394681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 3956088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 3966088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 3976088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 3986088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 3996088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 4006088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 401681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 402681e1b3eSMagnus Damm }; 403681e1b3eSMagnus Damm 404681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 405abbec5f4SSimon Horman DEFINE_RES_MEM(0xfe000020, 0x89e0), 406681e1b3eSMagnus Damm { 40720052462SShimoda, Yoshihiro .name = "error_irq", 408681e1b3eSMagnus Damm .start = gic_spi(129), 409681e1b3eSMagnus Damm .end = gic_spi(129), 410681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 411681e1b3eSMagnus Damm }, 412681e1b3eSMagnus Damm { 413681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 414681e1b3eSMagnus Damm .start = gic_spi(109), 415681e1b3eSMagnus Damm .end = gic_spi(128), 416681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 417681e1b3eSMagnus Damm }, 418681e1b3eSMagnus Damm }; 419681e1b3eSMagnus Damm 420681e1b3eSMagnus Damm static struct platform_device dma0_device = { 421681e1b3eSMagnus Damm .name = "sh-dma-engine", 422681e1b3eSMagnus Damm .id = 0, 423681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 424681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 425681e1b3eSMagnus Damm .dev = { 426681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 427681e1b3eSMagnus Damm }, 428681e1b3eSMagnus Damm }; 429681e1b3eSMagnus Damm 430832290b2SKuninori Morimoto /* MPDMAC */ 431832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 432832290b2SKuninori Morimoto { 433832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 434832290b2SKuninori Morimoto .addr = 0xec230020, 435832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 436832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 437832290b2SKuninori Morimoto }, { 438832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 439832290b2SKuninori Morimoto .addr = 0xec230024, 440832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 441832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 442832290b2SKuninori Morimoto }, { 443832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 444832290b2SKuninori Morimoto .addr = 0xec230060, 445832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 446832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 447832290b2SKuninori Morimoto }, { 448832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 449832290b2SKuninori Morimoto .addr = 0xec230064, 450832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 451832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 452832290b2SKuninori Morimoto }, { 453832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 454832290b2SKuninori Morimoto .addr = 0xec240020, 455832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 456832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 457832290b2SKuninori Morimoto }, { 458832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 459832290b2SKuninori Morimoto .addr = 0xec240024, 460832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 461832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 462832290b2SKuninori Morimoto }, { 463832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 464832290b2SKuninori Morimoto .addr = 0xec240060, 465832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 466832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 467832290b2SKuninori Morimoto }, 468832290b2SKuninori Morimoto }; 469832290b2SKuninori Morimoto 470832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 471832290b2SKuninori Morimoto { \ 472832290b2SKuninori Morimoto .offset = a, \ 473832290b2SKuninori Morimoto .dmars = b, \ 474832290b2SKuninori Morimoto .dmars_bit = c, \ 475832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 476832290b2SKuninori Morimoto } 477832290b2SKuninori Morimoto 478832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 479832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 480832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 481832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 482832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 483832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 484832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 485832290b2SKuninori Morimoto }; 486832290b2SKuninori Morimoto 487832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 488832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 489832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 490832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 491832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 4926088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 4936088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 4946088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 4956088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 4966088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 4976088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 498832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 499832290b2SKuninori Morimoto .chclr_present = 1, 500832290b2SKuninori Morimoto }; 501832290b2SKuninori Morimoto 502832290b2SKuninori Morimoto /* Resource order important! */ 503832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 504832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 505abbec5f4SSimon Horman DEFINE_RES_MEM(0xec618020, 0x270), 506832290b2SKuninori Morimoto /* DMARSx */ 507abbec5f4SSimon Horman DEFINE_RES_MEM(0xec619000, 0xc), 508832290b2SKuninori Morimoto { 509832290b2SKuninori Morimoto .name = "error_irq", 510832290b2SKuninori Morimoto .start = gic_spi(181), 511832290b2SKuninori Morimoto .end = gic_spi(181), 512832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 513832290b2SKuninori Morimoto }, 514832290b2SKuninori Morimoto { 515832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 516832290b2SKuninori Morimoto .start = gic_spi(175), 517832290b2SKuninori Morimoto .end = gic_spi(180), 518832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 519832290b2SKuninori Morimoto }, 520832290b2SKuninori Morimoto }; 521832290b2SKuninori Morimoto 522832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 523832290b2SKuninori Morimoto .name = "sh-dma-engine", 524832290b2SKuninori Morimoto .id = 1, 525832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 526832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 527832290b2SKuninori Morimoto .dev = { 528832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 529832290b2SKuninori Morimoto }, 530832290b2SKuninori Morimoto }; 531832290b2SKuninori Morimoto 532f23f5be0STetsuyuki Kobayashi static struct resource pmu_resources[] = { 533f23f5be0STetsuyuki Kobayashi [0] = { 534f23f5be0STetsuyuki Kobayashi .start = gic_spi(55), 535f23f5be0STetsuyuki Kobayashi .end = gic_spi(55), 536f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 537f23f5be0STetsuyuki Kobayashi }, 538f23f5be0STetsuyuki Kobayashi [1] = { 539f23f5be0STetsuyuki Kobayashi .start = gic_spi(56), 540f23f5be0STetsuyuki Kobayashi .end = gic_spi(56), 541f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 542f23f5be0STetsuyuki Kobayashi }, 543f23f5be0STetsuyuki Kobayashi }; 544f23f5be0STetsuyuki Kobayashi 545f23f5be0STetsuyuki Kobayashi static struct platform_device pmu_device = { 546f23f5be0STetsuyuki Kobayashi .name = "arm-pmu", 547f23f5be0STetsuyuki Kobayashi .id = -1, 548f23f5be0STetsuyuki Kobayashi .num_resources = ARRAY_SIZE(pmu_resources), 549f23f5be0STetsuyuki Kobayashi .resource = pmu_resources, 550f23f5be0STetsuyuki Kobayashi }; 551f23f5be0STetsuyuki Kobayashi 5529a27dee7SHideki EIRAKU /* an IPMMU module for ICB */ 5539a27dee7SHideki EIRAKU static struct resource ipmmu_resources[] = { 5546244cd73SKuninori Morimoto DEFINE_RES_MEM(0xfe951000, 0x100), 5559a27dee7SHideki EIRAKU }; 5569a27dee7SHideki EIRAKU 5579a27dee7SHideki EIRAKU static const char * const ipmmu_dev_names[] = { 5589a27dee7SHideki EIRAKU "sh_mobile_lcdc_fb.0", 5599a27dee7SHideki EIRAKU }; 5609a27dee7SHideki EIRAKU 5619a27dee7SHideki EIRAKU static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { 5629a27dee7SHideki EIRAKU .dev_names = ipmmu_dev_names, 5639a27dee7SHideki EIRAKU .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), 5649a27dee7SHideki EIRAKU }; 5659a27dee7SHideki EIRAKU 5669a27dee7SHideki EIRAKU static struct platform_device ipmmu_device = { 5679a27dee7SHideki EIRAKU .name = "ipmmu", 5689a27dee7SHideki EIRAKU .id = -1, 5699a27dee7SHideki EIRAKU .dev = { 5709a27dee7SHideki EIRAKU .platform_data = &ipmmu_platform_data, 5719a27dee7SHideki EIRAKU }, 5729a27dee7SHideki EIRAKU .resource = ipmmu_resources, 5739a27dee7SHideki EIRAKU .num_resources = ARRAY_SIZE(ipmmu_resources), 5749a27dee7SHideki EIRAKU }; 5759a27dee7SHideki EIRAKU 5761461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin0_platform_data = { 577341eb546SMagnus Damm .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */ 578341eb546SMagnus Damm }; 579341eb546SMagnus Damm 580341eb546SMagnus Damm static struct resource irqpin0_resources[] = { 581341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ 582341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ 583341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ 584341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ 585341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ 586341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(1)), /* IRQ0 */ 587341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(2)), /* IRQ1 */ 588341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(3)), /* IRQ2 */ 589341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(4)), /* IRQ3 */ 590341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(5)), /* IRQ4 */ 591341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(6)), /* IRQ5 */ 592341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(7)), /* IRQ6 */ 593341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(8)), /* IRQ7 */ 594341eb546SMagnus Damm }; 595341eb546SMagnus Damm 596341eb546SMagnus Damm static struct platform_device irqpin0_device = { 597341eb546SMagnus Damm .name = "renesas_intc_irqpin", 598341eb546SMagnus Damm .id = 0, 599341eb546SMagnus Damm .resource = irqpin0_resources, 600341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin0_resources), 601341eb546SMagnus Damm .dev = { 602341eb546SMagnus Damm .platform_data = &irqpin0_platform_data, 603341eb546SMagnus Damm }, 604341eb546SMagnus Damm }; 605341eb546SMagnus Damm 6061461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin1_platform_data = { 607341eb546SMagnus Damm .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */ 608341eb546SMagnus Damm .control_parent = true, /* Disable spurious IRQ10 */ 609341eb546SMagnus Damm }; 610341eb546SMagnus Damm 611341eb546SMagnus Damm static struct resource irqpin1_resources[] = { 612341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ 613341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ 614341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ 615341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */ 616341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */ 617341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(9)), /* IRQ8 */ 618341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(10)), /* IRQ9 */ 619341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(11)), /* IRQ10 */ 620341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(12)), /* IRQ11 */ 621341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(13)), /* IRQ12 */ 622341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(14)), /* IRQ13 */ 623341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(15)), /* IRQ14 */ 624341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(16)), /* IRQ15 */ 625341eb546SMagnus Damm }; 626341eb546SMagnus Damm 627341eb546SMagnus Damm static struct platform_device irqpin1_device = { 628341eb546SMagnus Damm .name = "renesas_intc_irqpin", 629341eb546SMagnus Damm .id = 1, 630341eb546SMagnus Damm .resource = irqpin1_resources, 631341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin1_resources), 632341eb546SMagnus Damm .dev = { 633341eb546SMagnus Damm .platform_data = &irqpin1_platform_data, 634341eb546SMagnus Damm }, 635341eb546SMagnus Damm }; 636341eb546SMagnus Damm 6371461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin2_platform_data = { 638341eb546SMagnus Damm .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */ 639341eb546SMagnus Damm }; 640341eb546SMagnus Damm 641341eb546SMagnus Damm static struct resource irqpin2_resources[] = { 642341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */ 643341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI20A */ 644341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ20A */ 645341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK20A */ 646341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR20A */ 647341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(17)), /* IRQ16 */ 648341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(18)), /* IRQ17 */ 649341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(19)), /* IRQ18 */ 650341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(20)), /* IRQ19 */ 651341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(21)), /* IRQ20 */ 652341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(22)), /* IRQ21 */ 653341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(23)), /* IRQ22 */ 654341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(24)), /* IRQ23 */ 655341eb546SMagnus Damm }; 656341eb546SMagnus Damm 657341eb546SMagnus Damm static struct platform_device irqpin2_device = { 658341eb546SMagnus Damm .name = "renesas_intc_irqpin", 659341eb546SMagnus Damm .id = 2, 660341eb546SMagnus Damm .resource = irqpin2_resources, 661341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin2_resources), 662341eb546SMagnus Damm .dev = { 663341eb546SMagnus Damm .platform_data = &irqpin2_platform_data, 664341eb546SMagnus Damm }, 665341eb546SMagnus Damm }; 666341eb546SMagnus Damm 6671461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin3_platform_data = { 668341eb546SMagnus Damm .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */ 669341eb546SMagnus Damm }; 670341eb546SMagnus Damm 671341eb546SMagnus Damm static struct resource irqpin3_resources[] = { 672341eb546SMagnus Damm DEFINE_RES_MEM(0xe690000c, 4), /* ICR4A */ 673341eb546SMagnus Damm DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */ 674341eb546SMagnus Damm DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */ 675341eb546SMagnus Damm DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */ 676341eb546SMagnus Damm DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */ 677341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(25)), /* IRQ24 */ 678341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(26)), /* IRQ25 */ 679341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(27)), /* IRQ26 */ 680341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(28)), /* IRQ27 */ 681341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(29)), /* IRQ28 */ 682341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(30)), /* IRQ29 */ 683341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(31)), /* IRQ30 */ 684341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(32)), /* IRQ31 */ 685341eb546SMagnus Damm }; 686341eb546SMagnus Damm 687341eb546SMagnus Damm static struct platform_device irqpin3_device = { 688341eb546SMagnus Damm .name = "renesas_intc_irqpin", 689341eb546SMagnus Damm .id = 3, 690341eb546SMagnus Damm .resource = irqpin3_resources, 691341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin3_resources), 692341eb546SMagnus Damm .dev = { 693341eb546SMagnus Damm .platform_data = &irqpin3_platform_data, 694341eb546SMagnus Damm }, 695341eb546SMagnus Damm }; 696341eb546SMagnus Damm 6973b00f934SSimon Horman static struct platform_device *sh73a0_devices_dt[] __initdata = { 6986d9598e2SMagnus Damm &scif0_device, 6996d9598e2SMagnus Damm &scif1_device, 7006d9598e2SMagnus Damm &scif2_device, 7016d9598e2SMagnus Damm &scif3_device, 7026d9598e2SMagnus Damm &scif4_device, 7036d9598e2SMagnus Damm &scif5_device, 7046d9598e2SMagnus Damm &scif6_device, 7056d9598e2SMagnus Damm &scif7_device, 7066d9598e2SMagnus Damm &scif8_device, 707652256fdSLaurent Pinchart &cmt1_device, 70848609533SSimon Horman }; 70948609533SSimon Horman 71048609533SSimon Horman static struct platform_device *sh73a0_early_devices[] __initdata = { 7113df592bcSLaurent Pinchart &tmu0_device, 7129a27dee7SHideki EIRAKU &ipmmu_device, 7136d9598e2SMagnus Damm }; 7146d9598e2SMagnus Damm 715b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 716b028f94bSYoshii Takashi &i2c0_device, 717b028f94bSYoshii Takashi &i2c1_device, 718b028f94bSYoshii Takashi &i2c2_device, 719b028f94bSYoshii Takashi &i2c3_device, 720b028f94bSYoshii Takashi &i2c4_device, 721681e1b3eSMagnus Damm &dma0_device, 722832290b2SKuninori Morimoto &mpdma0_device, 723f23f5be0STetsuyuki Kobayashi &pmu_device, 724341eb546SMagnus Damm &irqpin0_device, 725341eb546SMagnus Damm &irqpin1_device, 726341eb546SMagnus Damm &irqpin2_device, 727341eb546SMagnus Damm &irqpin3_device, 728b028f94bSYoshii Takashi }; 729b028f94bSYoshii Takashi 7300a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 731681e1b3eSMagnus Damm 7326d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 7336d9598e2SMagnus Damm { 734681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 735681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 736681e1b3eSMagnus Damm 7373b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 7383b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 7396d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 7406d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 741b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 742b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 7436d9598e2SMagnus Damm } 7446d9598e2SMagnus Damm 74543cb8cb7SMagnus Damm void __init sh73a0_init_delay(void) 74643cb8cb7SMagnus Damm { 74743cb8cb7SMagnus Damm shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ 74843cb8cb7SMagnus Damm } 74943cb8cb7SMagnus Damm 750d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 751d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 752d6720003SKuninori Morimoto 7536bb27d73SStephen Warren void __init sh73a0_earlytimer_init(void) 7543be26fdbSMagnus Damm { 75543cb8cb7SMagnus Damm sh73a0_init_delay(); 7563be26fdbSMagnus Damm sh73a0_clock_init(); 7573be26fdbSMagnus Damm shmobile_earlytimer_init(); 758d6720003SKuninori Morimoto sh73a0_register_twd(); 7593be26fdbSMagnus Damm } 7603be26fdbSMagnus Damm 7616d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 7626d9598e2SMagnus Damm { 7633b00f934SSimon Horman early_platform_add_devices(sh73a0_devices_dt, 7643b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 7656d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 7666d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 76750e15c34SMagnus Damm 76850e15c34SMagnus Damm /* setup early console here as well */ 76950e15c34SMagnus Damm shmobile_setup_console(); 7706d9598e2SMagnus Damm } 77148609533SSimon Horman 77248609533SSimon Horman #ifdef CONFIG_USE_OF 77348609533SSimon Horman 77448609533SSimon Horman void __init sh73a0_add_standard_devices_dt(void) 77548609533SSimon Horman { 776d2347382SGuennadi Liakhovetski struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, }; 777d2347382SGuennadi Liakhovetski 77848609533SSimon Horman /* clocks are setup late during boot in the case of DT */ 77948609533SSimon Horman sh73a0_clock_init(); 78048609533SSimon Horman 7813b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 7823b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 783ea31597fSMagnus Damm of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 784d2347382SGuennadi Liakhovetski 785d2347382SGuennadi Liakhovetski /* Instantiate cpufreq-cpu0 */ 786d2347382SGuennadi Liakhovetski platform_device_register_full(&devinfo); 78748609533SSimon Horman } 78848609533SSimon Horman 78948609533SSimon Horman static const char *sh73a0_boards_compat_dt[] __initdata = { 79048609533SSimon Horman "renesas,sh73a0", 79148609533SSimon Horman NULL, 79248609533SSimon Horman }; 79348609533SSimon Horman 79448609533SSimon Horman DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") 795f9989507SSimon Horman .smp = smp_ops(sh73a0_smp_ops), 79648609533SSimon Horman .map_io = sh73a0_map_io, 7973b00f934SSimon Horman .init_early = sh73a0_init_delay, 79848609533SSimon Horman .nr_irqs = NR_IRQS_LEGACY, 79948609533SSimon Horman .init_machine = sh73a0_add_standard_devices_dt, 80048609533SSimon Horman .dt_compat = sh73a0_boards_compat_dt, 80148609533SSimon Horman MACHINE_END 80248609533SSimon Horman #endif /* CONFIG_USE_OF */ 803