16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 256d9598e2SMagnus Damm #include <linux/platform_device.h> 266d9598e2SMagnus Damm #include <linux/delay.h> 276d9598e2SMagnus Damm #include <linux/input.h> 286d9598e2SMagnus Damm #include <linux/io.h> 296d9598e2SMagnus Damm #include <linux/serial_sci.h> 30681e1b3eSMagnus Damm #include <linux/sh_dma.h> 316d9598e2SMagnus Damm #include <linux/sh_intc.h> 326d9598e2SMagnus Damm #include <linux/sh_timer.h> 339a27dee7SHideki EIRAKU #include <linux/platform_data/sh_ipmmu.h> 346088b422SKuninori Morimoto #include <mach/dma-register.h> 356d9598e2SMagnus Damm #include <mach/hardware.h> 36250a2723SRob Herring #include <mach/irqs.h> 37681e1b3eSMagnus Damm #include <mach/sh73a0.h> 3850e15c34SMagnus Damm #include <mach/common.h> 396d9598e2SMagnus Damm #include <asm/mach-types.h> 4050e15c34SMagnus Damm #include <asm/mach/map.h> 416d9598e2SMagnus Damm #include <asm/mach/arch.h> 423be26fdbSMagnus Damm #include <asm/mach/time.h> 436d9598e2SMagnus Damm 4450e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4550e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4650e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4750e15c34SMagnus Damm */ 4850e15c34SMagnus Damm { 4950e15c34SMagnus Damm .virtual = 0xe6000000, 5050e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5150e15c34SMagnus Damm .length = 256 << 20, 5250e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5350e15c34SMagnus Damm }, 5450e15c34SMagnus Damm }; 5550e15c34SMagnus Damm 5650e15c34SMagnus Damm void __init sh73a0_map_io(void) 5750e15c34SMagnus Damm { 5850e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 5950e15c34SMagnus Damm } 6050e15c34SMagnus Damm 616d9598e2SMagnus Damm static struct plat_sci_port scif0_platform_data = { 626d9598e2SMagnus Damm .mapbase = 0xe6c40000, 636d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 64f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 65f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 666d9598e2SMagnus Damm .type = PORT_SCIFA, 676d9598e2SMagnus Damm .irqs = { gic_spi(72), gic_spi(72), 686d9598e2SMagnus Damm gic_spi(72), gic_spi(72) }, 696d9598e2SMagnus Damm }; 706d9598e2SMagnus Damm 716d9598e2SMagnus Damm static struct platform_device scif0_device = { 726d9598e2SMagnus Damm .name = "sh-sci", 736d9598e2SMagnus Damm .id = 0, 746d9598e2SMagnus Damm .dev = { 756d9598e2SMagnus Damm .platform_data = &scif0_platform_data, 766d9598e2SMagnus Damm }, 776d9598e2SMagnus Damm }; 786d9598e2SMagnus Damm 796d9598e2SMagnus Damm static struct plat_sci_port scif1_platform_data = { 806d9598e2SMagnus Damm .mapbase = 0xe6c50000, 816d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 82f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 83f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 846d9598e2SMagnus Damm .type = PORT_SCIFA, 856d9598e2SMagnus Damm .irqs = { gic_spi(73), gic_spi(73), 866d9598e2SMagnus Damm gic_spi(73), gic_spi(73) }, 876d9598e2SMagnus Damm }; 886d9598e2SMagnus Damm 896d9598e2SMagnus Damm static struct platform_device scif1_device = { 906d9598e2SMagnus Damm .name = "sh-sci", 916d9598e2SMagnus Damm .id = 1, 926d9598e2SMagnus Damm .dev = { 936d9598e2SMagnus Damm .platform_data = &scif1_platform_data, 946d9598e2SMagnus Damm }, 956d9598e2SMagnus Damm }; 966d9598e2SMagnus Damm 976d9598e2SMagnus Damm static struct plat_sci_port scif2_platform_data = { 986d9598e2SMagnus Damm .mapbase = 0xe6c60000, 996d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 100f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 101f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1026d9598e2SMagnus Damm .type = PORT_SCIFA, 1036d9598e2SMagnus Damm .irqs = { gic_spi(74), gic_spi(74), 1046d9598e2SMagnus Damm gic_spi(74), gic_spi(74) }, 1056d9598e2SMagnus Damm }; 1066d9598e2SMagnus Damm 1076d9598e2SMagnus Damm static struct platform_device scif2_device = { 1086d9598e2SMagnus Damm .name = "sh-sci", 1096d9598e2SMagnus Damm .id = 2, 1106d9598e2SMagnus Damm .dev = { 1116d9598e2SMagnus Damm .platform_data = &scif2_platform_data, 1126d9598e2SMagnus Damm }, 1136d9598e2SMagnus Damm }; 1146d9598e2SMagnus Damm 1156d9598e2SMagnus Damm static struct plat_sci_port scif3_platform_data = { 1166d9598e2SMagnus Damm .mapbase = 0xe6c70000, 1176d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 118f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 119f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1206d9598e2SMagnus Damm .type = PORT_SCIFA, 1216d9598e2SMagnus Damm .irqs = { gic_spi(75), gic_spi(75), 1226d9598e2SMagnus Damm gic_spi(75), gic_spi(75) }, 1236d9598e2SMagnus Damm }; 1246d9598e2SMagnus Damm 1256d9598e2SMagnus Damm static struct platform_device scif3_device = { 1266d9598e2SMagnus Damm .name = "sh-sci", 1276d9598e2SMagnus Damm .id = 3, 1286d9598e2SMagnus Damm .dev = { 1296d9598e2SMagnus Damm .platform_data = &scif3_platform_data, 1306d9598e2SMagnus Damm }, 1316d9598e2SMagnus Damm }; 1326d9598e2SMagnus Damm 1336d9598e2SMagnus Damm static struct plat_sci_port scif4_platform_data = { 1346d9598e2SMagnus Damm .mapbase = 0xe6c80000, 1356d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 136f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 137f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1386d9598e2SMagnus Damm .type = PORT_SCIFA, 1396d9598e2SMagnus Damm .irqs = { gic_spi(78), gic_spi(78), 1406d9598e2SMagnus Damm gic_spi(78), gic_spi(78) }, 1416d9598e2SMagnus Damm }; 1426d9598e2SMagnus Damm 1436d9598e2SMagnus Damm static struct platform_device scif4_device = { 1446d9598e2SMagnus Damm .name = "sh-sci", 1456d9598e2SMagnus Damm .id = 4, 1466d9598e2SMagnus Damm .dev = { 1476d9598e2SMagnus Damm .platform_data = &scif4_platform_data, 1486d9598e2SMagnus Damm }, 1496d9598e2SMagnus Damm }; 1506d9598e2SMagnus Damm 1516d9598e2SMagnus Damm static struct plat_sci_port scif5_platform_data = { 1526d9598e2SMagnus Damm .mapbase = 0xe6cb0000, 1536d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 154f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 155f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1566d9598e2SMagnus Damm .type = PORT_SCIFA, 1576d9598e2SMagnus Damm .irqs = { gic_spi(79), gic_spi(79), 1586d9598e2SMagnus Damm gic_spi(79), gic_spi(79) }, 1596d9598e2SMagnus Damm }; 1606d9598e2SMagnus Damm 1616d9598e2SMagnus Damm static struct platform_device scif5_device = { 1626d9598e2SMagnus Damm .name = "sh-sci", 1636d9598e2SMagnus Damm .id = 5, 1646d9598e2SMagnus Damm .dev = { 1656d9598e2SMagnus Damm .platform_data = &scif5_platform_data, 1666d9598e2SMagnus Damm }, 1676d9598e2SMagnus Damm }; 1686d9598e2SMagnus Damm 1696d9598e2SMagnus Damm static struct plat_sci_port scif6_platform_data = { 1706d9598e2SMagnus Damm .mapbase = 0xe6cc0000, 1716d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 172f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 173f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1746d9598e2SMagnus Damm .type = PORT_SCIFA, 1756d9598e2SMagnus Damm .irqs = { gic_spi(156), gic_spi(156), 1766d9598e2SMagnus Damm gic_spi(156), gic_spi(156) }, 1776d9598e2SMagnus Damm }; 1786d9598e2SMagnus Damm 1796d9598e2SMagnus Damm static struct platform_device scif6_device = { 1806d9598e2SMagnus Damm .name = "sh-sci", 1816d9598e2SMagnus Damm .id = 6, 1826d9598e2SMagnus Damm .dev = { 1836d9598e2SMagnus Damm .platform_data = &scif6_platform_data, 1846d9598e2SMagnus Damm }, 1856d9598e2SMagnus Damm }; 1866d9598e2SMagnus Damm 1876d9598e2SMagnus Damm static struct plat_sci_port scif7_platform_data = { 1886d9598e2SMagnus Damm .mapbase = 0xe6cd0000, 1896d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 190f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 191f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1926d9598e2SMagnus Damm .type = PORT_SCIFA, 1936d9598e2SMagnus Damm .irqs = { gic_spi(143), gic_spi(143), 1946d9598e2SMagnus Damm gic_spi(143), gic_spi(143) }, 1956d9598e2SMagnus Damm }; 1966d9598e2SMagnus Damm 1976d9598e2SMagnus Damm static struct platform_device scif7_device = { 1986d9598e2SMagnus Damm .name = "sh-sci", 1996d9598e2SMagnus Damm .id = 7, 2006d9598e2SMagnus Damm .dev = { 2016d9598e2SMagnus Damm .platform_data = &scif7_platform_data, 2026d9598e2SMagnus Damm }, 2036d9598e2SMagnus Damm }; 2046d9598e2SMagnus Damm 2056d9598e2SMagnus Damm static struct plat_sci_port scif8_platform_data = { 2066d9598e2SMagnus Damm .mapbase = 0xe6c30000, 2076d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 208f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 209f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2106d9598e2SMagnus Damm .type = PORT_SCIFB, 2116d9598e2SMagnus Damm .irqs = { gic_spi(80), gic_spi(80), 2126d9598e2SMagnus Damm gic_spi(80), gic_spi(80) }, 2136d9598e2SMagnus Damm }; 2146d9598e2SMagnus Damm 2156d9598e2SMagnus Damm static struct platform_device scif8_device = { 2166d9598e2SMagnus Damm .name = "sh-sci", 2176d9598e2SMagnus Damm .id = 8, 2186d9598e2SMagnus Damm .dev = { 2196d9598e2SMagnus Damm .platform_data = &scif8_platform_data, 2206d9598e2SMagnus Damm }, 2216d9598e2SMagnus Damm }; 2226d9598e2SMagnus Damm 2236d9598e2SMagnus Damm static struct sh_timer_config cmt10_platform_data = { 2246d9598e2SMagnus Damm .name = "CMT10", 2256d9598e2SMagnus Damm .channel_offset = 0x10, 2266d9598e2SMagnus Damm .timer_bit = 0, 2276d9598e2SMagnus Damm .clockevent_rating = 125, 2286d9598e2SMagnus Damm .clocksource_rating = 125, 2296d9598e2SMagnus Damm }; 2306d9598e2SMagnus Damm 2316d9598e2SMagnus Damm static struct resource cmt10_resources[] = { 2326d9598e2SMagnus Damm [0] = { 2336d9598e2SMagnus Damm .name = "CMT10", 2346d9598e2SMagnus Damm .start = 0xe6138010, 2356d9598e2SMagnus Damm .end = 0xe613801b, 2366d9598e2SMagnus Damm .flags = IORESOURCE_MEM, 2376d9598e2SMagnus Damm }, 2386d9598e2SMagnus Damm [1] = { 2396d9598e2SMagnus Damm .start = gic_spi(65), 2406d9598e2SMagnus Damm .flags = IORESOURCE_IRQ, 2416d9598e2SMagnus Damm }, 2426d9598e2SMagnus Damm }; 2436d9598e2SMagnus Damm 2446d9598e2SMagnus Damm static struct platform_device cmt10_device = { 2456d9598e2SMagnus Damm .name = "sh_cmt", 2466d9598e2SMagnus Damm .id = 10, 2476d9598e2SMagnus Damm .dev = { 2486d9598e2SMagnus Damm .platform_data = &cmt10_platform_data, 2496d9598e2SMagnus Damm }, 2506d9598e2SMagnus Damm .resource = cmt10_resources, 2516d9598e2SMagnus Damm .num_resources = ARRAY_SIZE(cmt10_resources), 2526d9598e2SMagnus Damm }; 2536d9598e2SMagnus Damm 2545010f3dbSMagnus Damm /* TMU */ 2555010f3dbSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 2565010f3dbSMagnus Damm .name = "TMU00", 2575010f3dbSMagnus Damm .channel_offset = 0x4, 2585010f3dbSMagnus Damm .timer_bit = 0, 2595010f3dbSMagnus Damm .clockevent_rating = 200, 2605010f3dbSMagnus Damm }; 2615010f3dbSMagnus Damm 2625010f3dbSMagnus Damm static struct resource tmu00_resources[] = { 2635010f3dbSMagnus Damm [0] = { 2645010f3dbSMagnus Damm .name = "TMU00", 2655010f3dbSMagnus Damm .start = 0xfff60008, 2665010f3dbSMagnus Damm .end = 0xfff60013, 2675010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 2685010f3dbSMagnus Damm }, 2695010f3dbSMagnus Damm [1] = { 2705010f3dbSMagnus Damm .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ 2715010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 2725010f3dbSMagnus Damm }, 2735010f3dbSMagnus Damm }; 2745010f3dbSMagnus Damm 2755010f3dbSMagnus Damm static struct platform_device tmu00_device = { 2765010f3dbSMagnus Damm .name = "sh_tmu", 2775010f3dbSMagnus Damm .id = 0, 2785010f3dbSMagnus Damm .dev = { 2795010f3dbSMagnus Damm .platform_data = &tmu00_platform_data, 2805010f3dbSMagnus Damm }, 2815010f3dbSMagnus Damm .resource = tmu00_resources, 2825010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 2835010f3dbSMagnus Damm }; 2845010f3dbSMagnus Damm 2855010f3dbSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 2865010f3dbSMagnus Damm .name = "TMU01", 2875010f3dbSMagnus Damm .channel_offset = 0x10, 2885010f3dbSMagnus Damm .timer_bit = 1, 2895010f3dbSMagnus Damm .clocksource_rating = 200, 2905010f3dbSMagnus Damm }; 2915010f3dbSMagnus Damm 2925010f3dbSMagnus Damm static struct resource tmu01_resources[] = { 2935010f3dbSMagnus Damm [0] = { 2945010f3dbSMagnus Damm .name = "TMU01", 2955010f3dbSMagnus Damm .start = 0xfff60014, 2965010f3dbSMagnus Damm .end = 0xfff6001f, 2975010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 2985010f3dbSMagnus Damm }, 2995010f3dbSMagnus Damm [1] = { 3005010f3dbSMagnus Damm .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ 3015010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 3025010f3dbSMagnus Damm }, 3035010f3dbSMagnus Damm }; 3045010f3dbSMagnus Damm 3055010f3dbSMagnus Damm static struct platform_device tmu01_device = { 3065010f3dbSMagnus Damm .name = "sh_tmu", 3075010f3dbSMagnus Damm .id = 1, 3085010f3dbSMagnus Damm .dev = { 3095010f3dbSMagnus Damm .platform_data = &tmu01_platform_data, 3105010f3dbSMagnus Damm }, 3115010f3dbSMagnus Damm .resource = tmu01_resources, 3125010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 3135010f3dbSMagnus Damm }; 3145010f3dbSMagnus Damm 315b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 316b028f94bSYoshii Takashi [0] = { 317b028f94bSYoshii Takashi .name = "IIC0", 318b028f94bSYoshii Takashi .start = 0xe6820000, 319b028f94bSYoshii Takashi .end = 0xe6820425 - 1, 320b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 321b028f94bSYoshii Takashi }, 322b028f94bSYoshii Takashi [1] = { 323b028f94bSYoshii Takashi .start = gic_spi(167), 324b028f94bSYoshii Takashi .end = gic_spi(170), 325b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 326b028f94bSYoshii Takashi }, 327b028f94bSYoshii Takashi }; 328b028f94bSYoshii Takashi 329b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 330b028f94bSYoshii Takashi [0] = { 331b028f94bSYoshii Takashi .name = "IIC1", 332b028f94bSYoshii Takashi .start = 0xe6822000, 333b028f94bSYoshii Takashi .end = 0xe6822425 - 1, 334b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 335b028f94bSYoshii Takashi }, 336b028f94bSYoshii Takashi [1] = { 337b028f94bSYoshii Takashi .start = gic_spi(51), 338b028f94bSYoshii Takashi .end = gic_spi(54), 339b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 340b028f94bSYoshii Takashi }, 341b028f94bSYoshii Takashi }; 342b028f94bSYoshii Takashi 343b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 344b028f94bSYoshii Takashi [0] = { 345b028f94bSYoshii Takashi .name = "IIC2", 346b028f94bSYoshii Takashi .start = 0xe6824000, 347b028f94bSYoshii Takashi .end = 0xe6824425 - 1, 348b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 349b028f94bSYoshii Takashi }, 350b028f94bSYoshii Takashi [1] = { 351b028f94bSYoshii Takashi .start = gic_spi(171), 352b028f94bSYoshii Takashi .end = gic_spi(174), 353b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 354b028f94bSYoshii Takashi }, 355b028f94bSYoshii Takashi }; 356b028f94bSYoshii Takashi 357b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 358b028f94bSYoshii Takashi [0] = { 359b028f94bSYoshii Takashi .name = "IIC3", 360b028f94bSYoshii Takashi .start = 0xe6826000, 361b028f94bSYoshii Takashi .end = 0xe6826425 - 1, 362b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 363b028f94bSYoshii Takashi }, 364b028f94bSYoshii Takashi [1] = { 365b028f94bSYoshii Takashi .start = gic_spi(183), 366b028f94bSYoshii Takashi .end = gic_spi(186), 367b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 368b028f94bSYoshii Takashi }, 369b028f94bSYoshii Takashi }; 370b028f94bSYoshii Takashi 371b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 372b028f94bSYoshii Takashi [0] = { 373b028f94bSYoshii Takashi .name = "IIC4", 374b028f94bSYoshii Takashi .start = 0xe6828000, 375b028f94bSYoshii Takashi .end = 0xe6828425 - 1, 376b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 377b028f94bSYoshii Takashi }, 378b028f94bSYoshii Takashi [1] = { 379b028f94bSYoshii Takashi .start = gic_spi(187), 380b028f94bSYoshii Takashi .end = gic_spi(190), 381b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 382b028f94bSYoshii Takashi }, 383b028f94bSYoshii Takashi }; 384b028f94bSYoshii Takashi 385b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 386b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 387b028f94bSYoshii Takashi .id = 0, 388b028f94bSYoshii Takashi .resource = i2c0_resources, 389b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 390b028f94bSYoshii Takashi }; 391b028f94bSYoshii Takashi 392b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 393b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 394b028f94bSYoshii Takashi .id = 1, 395b028f94bSYoshii Takashi .resource = i2c1_resources, 396b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 397b028f94bSYoshii Takashi }; 398b028f94bSYoshii Takashi 399b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 400b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 401b028f94bSYoshii Takashi .id = 2, 402b028f94bSYoshii Takashi .resource = i2c2_resources, 403b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 404b028f94bSYoshii Takashi }; 405b028f94bSYoshii Takashi 406b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 407b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 408b028f94bSYoshii Takashi .id = 3, 409b028f94bSYoshii Takashi .resource = i2c3_resources, 410b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 411b028f94bSYoshii Takashi }; 412b028f94bSYoshii Takashi 413b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 414b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 415b028f94bSYoshii Takashi .id = 4, 416b028f94bSYoshii Takashi .resource = i2c4_resources, 417b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 418b028f94bSYoshii Takashi }; 419b028f94bSYoshii Takashi 420681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 421681e1b3eSMagnus Damm { 422681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 423681e1b3eSMagnus Damm .addr = 0xe6c40020, 424681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 425681e1b3eSMagnus Damm .mid_rid = 0x21, 426681e1b3eSMagnus Damm }, { 427681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 428681e1b3eSMagnus Damm .addr = 0xe6c40024, 429681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 430681e1b3eSMagnus Damm .mid_rid = 0x22, 431681e1b3eSMagnus Damm }, { 432681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 433681e1b3eSMagnus Damm .addr = 0xe6c50020, 434681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 435681e1b3eSMagnus Damm .mid_rid = 0x25, 436681e1b3eSMagnus Damm }, { 437681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 438681e1b3eSMagnus Damm .addr = 0xe6c50024, 439681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 440681e1b3eSMagnus Damm .mid_rid = 0x26, 441681e1b3eSMagnus Damm }, { 442681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 443681e1b3eSMagnus Damm .addr = 0xe6c60020, 444681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 445681e1b3eSMagnus Damm .mid_rid = 0x29, 446681e1b3eSMagnus Damm }, { 447681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 448681e1b3eSMagnus Damm .addr = 0xe6c60024, 449681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 450681e1b3eSMagnus Damm .mid_rid = 0x2a, 451681e1b3eSMagnus Damm }, { 452681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 453681e1b3eSMagnus Damm .addr = 0xe6c70020, 454681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 455681e1b3eSMagnus Damm .mid_rid = 0x2d, 456681e1b3eSMagnus Damm }, { 457681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 458681e1b3eSMagnus Damm .addr = 0xe6c70024, 459681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 460681e1b3eSMagnus Damm .mid_rid = 0x2e, 461681e1b3eSMagnus Damm }, { 462681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 463681e1b3eSMagnus Damm .addr = 0xe6c80020, 464681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 465681e1b3eSMagnus Damm .mid_rid = 0x39, 466681e1b3eSMagnus Damm }, { 467681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 468681e1b3eSMagnus Damm .addr = 0xe6c80024, 469681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 470681e1b3eSMagnus Damm .mid_rid = 0x3a, 471681e1b3eSMagnus Damm }, { 472681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 473681e1b3eSMagnus Damm .addr = 0xe6cb0020, 474681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 475681e1b3eSMagnus Damm .mid_rid = 0x35, 476681e1b3eSMagnus Damm }, { 477681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 478681e1b3eSMagnus Damm .addr = 0xe6cb0024, 479681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 480681e1b3eSMagnus Damm .mid_rid = 0x36, 481681e1b3eSMagnus Damm }, { 482681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 483681e1b3eSMagnus Damm .addr = 0xe6cc0020, 484681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 485681e1b3eSMagnus Damm .mid_rid = 0x1d, 486681e1b3eSMagnus Damm }, { 487681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 488681e1b3eSMagnus Damm .addr = 0xe6cc0024, 489681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 490681e1b3eSMagnus Damm .mid_rid = 0x1e, 491681e1b3eSMagnus Damm }, { 492681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 493681e1b3eSMagnus Damm .addr = 0xe6cd0020, 494681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 495681e1b3eSMagnus Damm .mid_rid = 0x19, 496681e1b3eSMagnus Damm }, { 497681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 498681e1b3eSMagnus Damm .addr = 0xe6cd0024, 499681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 500681e1b3eSMagnus Damm .mid_rid = 0x1a, 501681e1b3eSMagnus Damm }, { 502681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 503681e1b3eSMagnus Damm .addr = 0xe6c30040, 504681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 505681e1b3eSMagnus Damm .mid_rid = 0x3d, 506681e1b3eSMagnus Damm }, { 507681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 508681e1b3eSMagnus Damm .addr = 0xe6c30060, 509681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 510681e1b3eSMagnus Damm .mid_rid = 0x3e, 511681e1b3eSMagnus Damm }, { 512681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 513681e1b3eSMagnus Damm .addr = 0xee100030, 514681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 515681e1b3eSMagnus Damm .mid_rid = 0xc1, 516681e1b3eSMagnus Damm }, { 517681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 518681e1b3eSMagnus Damm .addr = 0xee100030, 519681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 520681e1b3eSMagnus Damm .mid_rid = 0xc2, 521681e1b3eSMagnus Damm }, { 522681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 523681e1b3eSMagnus Damm .addr = 0xee120030, 524681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 525681e1b3eSMagnus Damm .mid_rid = 0xc9, 526681e1b3eSMagnus Damm }, { 527681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 528681e1b3eSMagnus Damm .addr = 0xee120030, 529681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 530681e1b3eSMagnus Damm .mid_rid = 0xca, 531681e1b3eSMagnus Damm }, { 532681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 533681e1b3eSMagnus Damm .addr = 0xee140030, 534681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 535681e1b3eSMagnus Damm .mid_rid = 0xcd, 536681e1b3eSMagnus Damm }, { 537681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 538681e1b3eSMagnus Damm .addr = 0xee140030, 539681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 540681e1b3eSMagnus Damm .mid_rid = 0xce, 541681e1b3eSMagnus Damm }, { 542681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 543681e1b3eSMagnus Damm .addr = 0xe6bd0034, 544681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 545681e1b3eSMagnus Damm .mid_rid = 0xd1, 546681e1b3eSMagnus Damm }, { 547681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 548681e1b3eSMagnus Damm .addr = 0xe6bd0034, 549681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 550681e1b3eSMagnus Damm .mid_rid = 0xd2, 551681e1b3eSMagnus Damm }, 552681e1b3eSMagnus Damm }; 553681e1b3eSMagnus Damm 554681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 555681e1b3eSMagnus Damm { \ 556681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 557681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 558681e1b3eSMagnus Damm } 559681e1b3eSMagnus Damm 560681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 561681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 562681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 563681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 564681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 565681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 566681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 567681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 568681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 569681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 570681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 571681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 572681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 573681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 574681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 575681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 576681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 577681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 578681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 579681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 580681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 581681e1b3eSMagnus Damm }; 582681e1b3eSMagnus Damm 583681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 584681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 585681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 586681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 587681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 5886088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 5896088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 5906088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 5916088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 5926088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 5936088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 594681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 595681e1b3eSMagnus Damm }; 596681e1b3eSMagnus Damm 597681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 598681e1b3eSMagnus Damm { 599681e1b3eSMagnus Damm /* Registers including DMAOR and channels including DMARSx */ 600681e1b3eSMagnus Damm .start = 0xfe000020, 601681e1b3eSMagnus Damm .end = 0xfe008a00 - 1, 602681e1b3eSMagnus Damm .flags = IORESOURCE_MEM, 603681e1b3eSMagnus Damm }, 604681e1b3eSMagnus Damm { 60520052462SShimoda, Yoshihiro .name = "error_irq", 606681e1b3eSMagnus Damm .start = gic_spi(129), 607681e1b3eSMagnus Damm .end = gic_spi(129), 608681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 609681e1b3eSMagnus Damm }, 610681e1b3eSMagnus Damm { 611681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 612681e1b3eSMagnus Damm .start = gic_spi(109), 613681e1b3eSMagnus Damm .end = gic_spi(128), 614681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 615681e1b3eSMagnus Damm }, 616681e1b3eSMagnus Damm }; 617681e1b3eSMagnus Damm 618681e1b3eSMagnus Damm static struct platform_device dma0_device = { 619681e1b3eSMagnus Damm .name = "sh-dma-engine", 620681e1b3eSMagnus Damm .id = 0, 621681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 622681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 623681e1b3eSMagnus Damm .dev = { 624681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 625681e1b3eSMagnus Damm }, 626681e1b3eSMagnus Damm }; 627681e1b3eSMagnus Damm 628832290b2SKuninori Morimoto /* MPDMAC */ 629832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 630832290b2SKuninori Morimoto { 631832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 632832290b2SKuninori Morimoto .addr = 0xec230020, 633832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 634832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 635832290b2SKuninori Morimoto }, { 636832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 637832290b2SKuninori Morimoto .addr = 0xec230024, 638832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 639832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 640832290b2SKuninori Morimoto }, { 641832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 642832290b2SKuninori Morimoto .addr = 0xec230060, 643832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 644832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 645832290b2SKuninori Morimoto }, { 646832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 647832290b2SKuninori Morimoto .addr = 0xec230064, 648832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 649832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 650832290b2SKuninori Morimoto }, { 651832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 652832290b2SKuninori Morimoto .addr = 0xec240020, 653832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 654832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 655832290b2SKuninori Morimoto }, { 656832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 657832290b2SKuninori Morimoto .addr = 0xec240024, 658832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 659832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 660832290b2SKuninori Morimoto }, { 661832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 662832290b2SKuninori Morimoto .addr = 0xec240060, 663832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 664832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 665832290b2SKuninori Morimoto }, 666832290b2SKuninori Morimoto }; 667832290b2SKuninori Morimoto 668832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 669832290b2SKuninori Morimoto { \ 670832290b2SKuninori Morimoto .offset = a, \ 671832290b2SKuninori Morimoto .dmars = b, \ 672832290b2SKuninori Morimoto .dmars_bit = c, \ 673832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 674832290b2SKuninori Morimoto } 675832290b2SKuninori Morimoto 676832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 677832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 678832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 679832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 680832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 681832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 682832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 683832290b2SKuninori Morimoto }; 684832290b2SKuninori Morimoto 685832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 686832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 687832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 688832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 689832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 6906088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 6916088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 6926088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 6936088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 6946088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 6956088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 696832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 697832290b2SKuninori Morimoto .chclr_present = 1, 698832290b2SKuninori Morimoto }; 699832290b2SKuninori Morimoto 700832290b2SKuninori Morimoto /* Resource order important! */ 701832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 702832290b2SKuninori Morimoto { 703832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 704832290b2SKuninori Morimoto .start = 0xec618020, 705832290b2SKuninori Morimoto .end = 0xec61828f, 706832290b2SKuninori Morimoto .flags = IORESOURCE_MEM, 707832290b2SKuninori Morimoto }, 708832290b2SKuninori Morimoto { 709832290b2SKuninori Morimoto /* DMARSx */ 710832290b2SKuninori Morimoto .start = 0xec619000, 711832290b2SKuninori Morimoto .end = 0xec61900b, 712832290b2SKuninori Morimoto .flags = IORESOURCE_MEM, 713832290b2SKuninori Morimoto }, 714832290b2SKuninori Morimoto { 715832290b2SKuninori Morimoto .name = "error_irq", 716832290b2SKuninori Morimoto .start = gic_spi(181), 717832290b2SKuninori Morimoto .end = gic_spi(181), 718832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 719832290b2SKuninori Morimoto }, 720832290b2SKuninori Morimoto { 721832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 722832290b2SKuninori Morimoto .start = gic_spi(175), 723832290b2SKuninori Morimoto .end = gic_spi(180), 724832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 725832290b2SKuninori Morimoto }, 726832290b2SKuninori Morimoto }; 727832290b2SKuninori Morimoto 728832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 729832290b2SKuninori Morimoto .name = "sh-dma-engine", 730832290b2SKuninori Morimoto .id = 1, 731832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 732832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 733832290b2SKuninori Morimoto .dev = { 734832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 735832290b2SKuninori Morimoto }, 736832290b2SKuninori Morimoto }; 737832290b2SKuninori Morimoto 738f23f5be0STetsuyuki Kobayashi static struct resource pmu_resources[] = { 739f23f5be0STetsuyuki Kobayashi [0] = { 740f23f5be0STetsuyuki Kobayashi .start = gic_spi(55), 741f23f5be0STetsuyuki Kobayashi .end = gic_spi(55), 742f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 743f23f5be0STetsuyuki Kobayashi }, 744f23f5be0STetsuyuki Kobayashi [1] = { 745f23f5be0STetsuyuki Kobayashi .start = gic_spi(56), 746f23f5be0STetsuyuki Kobayashi .end = gic_spi(56), 747f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 748f23f5be0STetsuyuki Kobayashi }, 749f23f5be0STetsuyuki Kobayashi }; 750f23f5be0STetsuyuki Kobayashi 751f23f5be0STetsuyuki Kobayashi static struct platform_device pmu_device = { 752f23f5be0STetsuyuki Kobayashi .name = "arm-pmu", 753f23f5be0STetsuyuki Kobayashi .id = -1, 754f23f5be0STetsuyuki Kobayashi .num_resources = ARRAY_SIZE(pmu_resources), 755f23f5be0STetsuyuki Kobayashi .resource = pmu_resources, 756f23f5be0STetsuyuki Kobayashi }; 757f23f5be0STetsuyuki Kobayashi 7589a27dee7SHideki EIRAKU /* an IPMMU module for ICB */ 7599a27dee7SHideki EIRAKU static struct resource ipmmu_resources[] = { 7609a27dee7SHideki EIRAKU [0] = { 7619a27dee7SHideki EIRAKU .name = "IPMMU", 7629a27dee7SHideki EIRAKU .start = 0xfe951000, 7639a27dee7SHideki EIRAKU .end = 0xfe9510ff, 7649a27dee7SHideki EIRAKU .flags = IORESOURCE_MEM, 7659a27dee7SHideki EIRAKU }, 7669a27dee7SHideki EIRAKU }; 7679a27dee7SHideki EIRAKU 7689a27dee7SHideki EIRAKU static const char * const ipmmu_dev_names[] = { 7699a27dee7SHideki EIRAKU "sh_mobile_lcdc_fb.0", 7709a27dee7SHideki EIRAKU }; 7719a27dee7SHideki EIRAKU 7729a27dee7SHideki EIRAKU static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { 7739a27dee7SHideki EIRAKU .dev_names = ipmmu_dev_names, 7749a27dee7SHideki EIRAKU .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), 7759a27dee7SHideki EIRAKU }; 7769a27dee7SHideki EIRAKU 7779a27dee7SHideki EIRAKU static struct platform_device ipmmu_device = { 7789a27dee7SHideki EIRAKU .name = "ipmmu", 7799a27dee7SHideki EIRAKU .id = -1, 7809a27dee7SHideki EIRAKU .dev = { 7819a27dee7SHideki EIRAKU .platform_data = &ipmmu_platform_data, 7829a27dee7SHideki EIRAKU }, 7839a27dee7SHideki EIRAKU .resource = ipmmu_resources, 7849a27dee7SHideki EIRAKU .num_resources = ARRAY_SIZE(ipmmu_resources), 7859a27dee7SHideki EIRAKU }; 7869a27dee7SHideki EIRAKU 7876d9598e2SMagnus Damm static struct platform_device *sh73a0_early_devices[] __initdata = { 7886d9598e2SMagnus Damm &scif0_device, 7896d9598e2SMagnus Damm &scif1_device, 7906d9598e2SMagnus Damm &scif2_device, 7916d9598e2SMagnus Damm &scif3_device, 7926d9598e2SMagnus Damm &scif4_device, 7936d9598e2SMagnus Damm &scif5_device, 7946d9598e2SMagnus Damm &scif6_device, 7956d9598e2SMagnus Damm &scif7_device, 7966d9598e2SMagnus Damm &scif8_device, 7976d9598e2SMagnus Damm &cmt10_device, 7985010f3dbSMagnus Damm &tmu00_device, 7995010f3dbSMagnus Damm &tmu01_device, 8009a27dee7SHideki EIRAKU &ipmmu_device, 8016d9598e2SMagnus Damm }; 8026d9598e2SMagnus Damm 803b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 804b028f94bSYoshii Takashi &i2c0_device, 805b028f94bSYoshii Takashi &i2c1_device, 806b028f94bSYoshii Takashi &i2c2_device, 807b028f94bSYoshii Takashi &i2c3_device, 808b028f94bSYoshii Takashi &i2c4_device, 809681e1b3eSMagnus Damm &dma0_device, 810832290b2SKuninori Morimoto &mpdma0_device, 811f23f5be0STetsuyuki Kobayashi &pmu_device, 812b028f94bSYoshii Takashi }; 813b028f94bSYoshii Takashi 8140a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 815681e1b3eSMagnus Damm 8166d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 8176d9598e2SMagnus Damm { 818681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 819681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 820681e1b3eSMagnus Damm 8216d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 8226d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 823b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 824b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 8256d9598e2SMagnus Damm } 8266d9598e2SMagnus Damm 827d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 828d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 829d6720003SKuninori Morimoto 8303be26fdbSMagnus Damm static void __init sh73a0_earlytimer_init(void) 8313be26fdbSMagnus Damm { 8323be26fdbSMagnus Damm sh73a0_clock_init(); 8333be26fdbSMagnus Damm shmobile_earlytimer_init(); 834d6720003SKuninori Morimoto sh73a0_register_twd(); 8353be26fdbSMagnus Damm } 8363be26fdbSMagnus Damm 8376d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 8386d9598e2SMagnus Damm { 8396d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 8406d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 84150e15c34SMagnus Damm 84250e15c34SMagnus Damm /* setup early console here as well */ 84350e15c34SMagnus Damm shmobile_setup_console(); 8443be26fdbSMagnus Damm 8453be26fdbSMagnus Damm /* override timer setup with soc-specific code */ 8463be26fdbSMagnus Damm shmobile_timer.init = sh73a0_earlytimer_init; 8476d9598e2SMagnus Damm } 848