16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 256d9598e2SMagnus Damm #include <linux/platform_device.h> 2648609533SSimon Horman #include <linux/of_platform.h> 276d9598e2SMagnus Damm #include <linux/delay.h> 286d9598e2SMagnus Damm #include <linux/input.h> 296d9598e2SMagnus Damm #include <linux/io.h> 306d9598e2SMagnus Damm #include <linux/serial_sci.h> 31681e1b3eSMagnus Damm #include <linux/sh_dma.h> 326d9598e2SMagnus Damm #include <linux/sh_intc.h> 336d9598e2SMagnus Damm #include <linux/sh_timer.h> 349a27dee7SHideki EIRAKU #include <linux/platform_data/sh_ipmmu.h> 35341eb546SMagnus Damm #include <linux/platform_data/irq-renesas-intc-irqpin.h> 366088b422SKuninori Morimoto #include <mach/dma-register.h> 37250a2723SRob Herring #include <mach/irqs.h> 38681e1b3eSMagnus Damm #include <mach/sh73a0.h> 3950e15c34SMagnus Damm #include <mach/common.h> 406d9598e2SMagnus Damm #include <asm/mach-types.h> 4150e15c34SMagnus Damm #include <asm/mach/map.h> 426d9598e2SMagnus Damm #include <asm/mach/arch.h> 433be26fdbSMagnus Damm #include <asm/mach/time.h> 446d9598e2SMagnus Damm 4550e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4650e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4750e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4850e15c34SMagnus Damm */ 4950e15c34SMagnus Damm { 5050e15c34SMagnus Damm .virtual = 0xe6000000, 5150e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5250e15c34SMagnus Damm .length = 256 << 20, 5350e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5450e15c34SMagnus Damm }, 5550e15c34SMagnus Damm }; 5650e15c34SMagnus Damm 5750e15c34SMagnus Damm void __init sh73a0_map_io(void) 5850e15c34SMagnus Damm { 5950e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 6050e15c34SMagnus Damm } 6150e15c34SMagnus Damm 62474f6758SMagnus Damm /* PFC */ 63474f6758SMagnus Damm static struct resource pfc_resources[] __initdata = { 64474f6758SMagnus Damm DEFINE_RES_MEM(0xe6050000, 0x8000), 65474f6758SMagnus Damm DEFINE_RES_MEM(0xe605801c, 0x000c), 66994d66a4SLaurent Pinchart }; 67994d66a4SLaurent Pinchart 68994d66a4SLaurent Pinchart void __init sh73a0_pinmux_init(void) 69994d66a4SLaurent Pinchart { 70474f6758SMagnus Damm platform_device_register_simple("pfc-sh73a0", -1, pfc_resources, 71474f6758SMagnus Damm ARRAY_SIZE(pfc_resources)); 72994d66a4SLaurent Pinchart } 73994d66a4SLaurent Pinchart 746d9598e2SMagnus Damm static struct plat_sci_port scif0_platform_data = { 756d9598e2SMagnus Damm .mapbase = 0xe6c40000, 766d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 77f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 78f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 796d9598e2SMagnus Damm .type = PORT_SCIFA, 806d9598e2SMagnus Damm .irqs = { gic_spi(72), gic_spi(72), 816d9598e2SMagnus Damm gic_spi(72), gic_spi(72) }, 826d9598e2SMagnus Damm }; 836d9598e2SMagnus Damm 846d9598e2SMagnus Damm static struct platform_device scif0_device = { 856d9598e2SMagnus Damm .name = "sh-sci", 866d9598e2SMagnus Damm .id = 0, 876d9598e2SMagnus Damm .dev = { 886d9598e2SMagnus Damm .platform_data = &scif0_platform_data, 896d9598e2SMagnus Damm }, 906d9598e2SMagnus Damm }; 916d9598e2SMagnus Damm 926d9598e2SMagnus Damm static struct plat_sci_port scif1_platform_data = { 936d9598e2SMagnus Damm .mapbase = 0xe6c50000, 946d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 95f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 96f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 976d9598e2SMagnus Damm .type = PORT_SCIFA, 986d9598e2SMagnus Damm .irqs = { gic_spi(73), gic_spi(73), 996d9598e2SMagnus Damm gic_spi(73), gic_spi(73) }, 1006d9598e2SMagnus Damm }; 1016d9598e2SMagnus Damm 1026d9598e2SMagnus Damm static struct platform_device scif1_device = { 1036d9598e2SMagnus Damm .name = "sh-sci", 1046d9598e2SMagnus Damm .id = 1, 1056d9598e2SMagnus Damm .dev = { 1066d9598e2SMagnus Damm .platform_data = &scif1_platform_data, 1076d9598e2SMagnus Damm }, 1086d9598e2SMagnus Damm }; 1096d9598e2SMagnus Damm 1106d9598e2SMagnus Damm static struct plat_sci_port scif2_platform_data = { 1116d9598e2SMagnus Damm .mapbase = 0xe6c60000, 1126d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 113f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 114f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1156d9598e2SMagnus Damm .type = PORT_SCIFA, 1166d9598e2SMagnus Damm .irqs = { gic_spi(74), gic_spi(74), 1176d9598e2SMagnus Damm gic_spi(74), gic_spi(74) }, 1186d9598e2SMagnus Damm }; 1196d9598e2SMagnus Damm 1206d9598e2SMagnus Damm static struct platform_device scif2_device = { 1216d9598e2SMagnus Damm .name = "sh-sci", 1226d9598e2SMagnus Damm .id = 2, 1236d9598e2SMagnus Damm .dev = { 1246d9598e2SMagnus Damm .platform_data = &scif2_platform_data, 1256d9598e2SMagnus Damm }, 1266d9598e2SMagnus Damm }; 1276d9598e2SMagnus Damm 1286d9598e2SMagnus Damm static struct plat_sci_port scif3_platform_data = { 1296d9598e2SMagnus Damm .mapbase = 0xe6c70000, 1306d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 131f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 132f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1336d9598e2SMagnus Damm .type = PORT_SCIFA, 1346d9598e2SMagnus Damm .irqs = { gic_spi(75), gic_spi(75), 1356d9598e2SMagnus Damm gic_spi(75), gic_spi(75) }, 1366d9598e2SMagnus Damm }; 1376d9598e2SMagnus Damm 1386d9598e2SMagnus Damm static struct platform_device scif3_device = { 1396d9598e2SMagnus Damm .name = "sh-sci", 1406d9598e2SMagnus Damm .id = 3, 1416d9598e2SMagnus Damm .dev = { 1426d9598e2SMagnus Damm .platform_data = &scif3_platform_data, 1436d9598e2SMagnus Damm }, 1446d9598e2SMagnus Damm }; 1456d9598e2SMagnus Damm 1466d9598e2SMagnus Damm static struct plat_sci_port scif4_platform_data = { 1476d9598e2SMagnus Damm .mapbase = 0xe6c80000, 1486d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 149f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 150f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1516d9598e2SMagnus Damm .type = PORT_SCIFA, 1526d9598e2SMagnus Damm .irqs = { gic_spi(78), gic_spi(78), 1536d9598e2SMagnus Damm gic_spi(78), gic_spi(78) }, 1546d9598e2SMagnus Damm }; 1556d9598e2SMagnus Damm 1566d9598e2SMagnus Damm static struct platform_device scif4_device = { 1576d9598e2SMagnus Damm .name = "sh-sci", 1586d9598e2SMagnus Damm .id = 4, 1596d9598e2SMagnus Damm .dev = { 1606d9598e2SMagnus Damm .platform_data = &scif4_platform_data, 1616d9598e2SMagnus Damm }, 1626d9598e2SMagnus Damm }; 1636d9598e2SMagnus Damm 1646d9598e2SMagnus Damm static struct plat_sci_port scif5_platform_data = { 1656d9598e2SMagnus Damm .mapbase = 0xe6cb0000, 1666d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 167f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 168f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1696d9598e2SMagnus Damm .type = PORT_SCIFA, 1706d9598e2SMagnus Damm .irqs = { gic_spi(79), gic_spi(79), 1716d9598e2SMagnus Damm gic_spi(79), gic_spi(79) }, 1726d9598e2SMagnus Damm }; 1736d9598e2SMagnus Damm 1746d9598e2SMagnus Damm static struct platform_device scif5_device = { 1756d9598e2SMagnus Damm .name = "sh-sci", 1766d9598e2SMagnus Damm .id = 5, 1776d9598e2SMagnus Damm .dev = { 1786d9598e2SMagnus Damm .platform_data = &scif5_platform_data, 1796d9598e2SMagnus Damm }, 1806d9598e2SMagnus Damm }; 1816d9598e2SMagnus Damm 1826d9598e2SMagnus Damm static struct plat_sci_port scif6_platform_data = { 1836d9598e2SMagnus Damm .mapbase = 0xe6cc0000, 1846d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 185f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 186f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1876d9598e2SMagnus Damm .type = PORT_SCIFA, 1886d9598e2SMagnus Damm .irqs = { gic_spi(156), gic_spi(156), 1896d9598e2SMagnus Damm gic_spi(156), gic_spi(156) }, 1906d9598e2SMagnus Damm }; 1916d9598e2SMagnus Damm 1926d9598e2SMagnus Damm static struct platform_device scif6_device = { 1936d9598e2SMagnus Damm .name = "sh-sci", 1946d9598e2SMagnus Damm .id = 6, 1956d9598e2SMagnus Damm .dev = { 1966d9598e2SMagnus Damm .platform_data = &scif6_platform_data, 1976d9598e2SMagnus Damm }, 1986d9598e2SMagnus Damm }; 1996d9598e2SMagnus Damm 2006d9598e2SMagnus Damm static struct plat_sci_port scif7_platform_data = { 2016d9598e2SMagnus Damm .mapbase = 0xe6cd0000, 2026d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 203f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 204f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2056d9598e2SMagnus Damm .type = PORT_SCIFA, 2066d9598e2SMagnus Damm .irqs = { gic_spi(143), gic_spi(143), 2076d9598e2SMagnus Damm gic_spi(143), gic_spi(143) }, 2086d9598e2SMagnus Damm }; 2096d9598e2SMagnus Damm 2106d9598e2SMagnus Damm static struct platform_device scif7_device = { 2116d9598e2SMagnus Damm .name = "sh-sci", 2126d9598e2SMagnus Damm .id = 7, 2136d9598e2SMagnus Damm .dev = { 2146d9598e2SMagnus Damm .platform_data = &scif7_platform_data, 2156d9598e2SMagnus Damm }, 2166d9598e2SMagnus Damm }; 2176d9598e2SMagnus Damm 2186d9598e2SMagnus Damm static struct plat_sci_port scif8_platform_data = { 2196d9598e2SMagnus Damm .mapbase = 0xe6c30000, 2206d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 221f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 222f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2236d9598e2SMagnus Damm .type = PORT_SCIFB, 2246d9598e2SMagnus Damm .irqs = { gic_spi(80), gic_spi(80), 2256d9598e2SMagnus Damm gic_spi(80), gic_spi(80) }, 2266d9598e2SMagnus Damm }; 2276d9598e2SMagnus Damm 2286d9598e2SMagnus Damm static struct platform_device scif8_device = { 2296d9598e2SMagnus Damm .name = "sh-sci", 2306d9598e2SMagnus Damm .id = 8, 2316d9598e2SMagnus Damm .dev = { 2326d9598e2SMagnus Damm .platform_data = &scif8_platform_data, 2336d9598e2SMagnus Damm }, 2346d9598e2SMagnus Damm }; 2356d9598e2SMagnus Damm 2366d9598e2SMagnus Damm static struct sh_timer_config cmt10_platform_data = { 2376d9598e2SMagnus Damm .name = "CMT10", 2386d9598e2SMagnus Damm .channel_offset = 0x10, 2396d9598e2SMagnus Damm .timer_bit = 0, 2405600a848SSimon Horman .clockevent_rating = 80, 2416d9598e2SMagnus Damm .clocksource_rating = 125, 2426d9598e2SMagnus Damm }; 2436d9598e2SMagnus Damm 2446d9598e2SMagnus Damm static struct resource cmt10_resources[] = { 2456d9598e2SMagnus Damm [0] = { 2466d9598e2SMagnus Damm .name = "CMT10", 2476d9598e2SMagnus Damm .start = 0xe6138010, 2486d9598e2SMagnus Damm .end = 0xe613801b, 2496d9598e2SMagnus Damm .flags = IORESOURCE_MEM, 2506d9598e2SMagnus Damm }, 2516d9598e2SMagnus Damm [1] = { 2526d9598e2SMagnus Damm .start = gic_spi(65), 2536d9598e2SMagnus Damm .flags = IORESOURCE_IRQ, 2546d9598e2SMagnus Damm }, 2556d9598e2SMagnus Damm }; 2566d9598e2SMagnus Damm 2576d9598e2SMagnus Damm static struct platform_device cmt10_device = { 2586d9598e2SMagnus Damm .name = "sh_cmt", 2596d9598e2SMagnus Damm .id = 10, 2606d9598e2SMagnus Damm .dev = { 2616d9598e2SMagnus Damm .platform_data = &cmt10_platform_data, 2626d9598e2SMagnus Damm }, 2636d9598e2SMagnus Damm .resource = cmt10_resources, 2646d9598e2SMagnus Damm .num_resources = ARRAY_SIZE(cmt10_resources), 2656d9598e2SMagnus Damm }; 2666d9598e2SMagnus Damm 2675010f3dbSMagnus Damm /* TMU */ 2685010f3dbSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 2695010f3dbSMagnus Damm .name = "TMU00", 2705010f3dbSMagnus Damm .channel_offset = 0x4, 2715010f3dbSMagnus Damm .timer_bit = 0, 2725010f3dbSMagnus Damm .clockevent_rating = 200, 2735010f3dbSMagnus Damm }; 2745010f3dbSMagnus Damm 2755010f3dbSMagnus Damm static struct resource tmu00_resources[] = { 276bd6dfe58SKuninori Morimoto [0] = DEFINE_RES_MEM(0xfff60008, 0xc), 2775010f3dbSMagnus Damm [1] = { 2785010f3dbSMagnus Damm .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ 2795010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 2805010f3dbSMagnus Damm }, 2815010f3dbSMagnus Damm }; 2825010f3dbSMagnus Damm 2835010f3dbSMagnus Damm static struct platform_device tmu00_device = { 2845010f3dbSMagnus Damm .name = "sh_tmu", 2855010f3dbSMagnus Damm .id = 0, 2865010f3dbSMagnus Damm .dev = { 2875010f3dbSMagnus Damm .platform_data = &tmu00_platform_data, 2885010f3dbSMagnus Damm }, 2895010f3dbSMagnus Damm .resource = tmu00_resources, 2905010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 2915010f3dbSMagnus Damm }; 2925010f3dbSMagnus Damm 2935010f3dbSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 2945010f3dbSMagnus Damm .name = "TMU01", 2955010f3dbSMagnus Damm .channel_offset = 0x10, 2965010f3dbSMagnus Damm .timer_bit = 1, 2975010f3dbSMagnus Damm .clocksource_rating = 200, 2985010f3dbSMagnus Damm }; 2995010f3dbSMagnus Damm 3005010f3dbSMagnus Damm static struct resource tmu01_resources[] = { 301bd6dfe58SKuninori Morimoto [0] = DEFINE_RES_MEM(0xfff60014, 0xc), 3025010f3dbSMagnus Damm [1] = { 3035010f3dbSMagnus Damm .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ 3045010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 3055010f3dbSMagnus Damm }, 3065010f3dbSMagnus Damm }; 3075010f3dbSMagnus Damm 3085010f3dbSMagnus Damm static struct platform_device tmu01_device = { 3095010f3dbSMagnus Damm .name = "sh_tmu", 3105010f3dbSMagnus Damm .id = 1, 3115010f3dbSMagnus Damm .dev = { 3125010f3dbSMagnus Damm .platform_data = &tmu01_platform_data, 3135010f3dbSMagnus Damm }, 3145010f3dbSMagnus Damm .resource = tmu01_resources, 3155010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 3165010f3dbSMagnus Damm }; 3175010f3dbSMagnus Damm 318b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 3198e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6820000, 0x426), 320b028f94bSYoshii Takashi [1] = { 321b028f94bSYoshii Takashi .start = gic_spi(167), 322b028f94bSYoshii Takashi .end = gic_spi(170), 323b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 324b028f94bSYoshii Takashi }, 325b028f94bSYoshii Takashi }; 326b028f94bSYoshii Takashi 327b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 3288e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6822000, 0x426), 329b028f94bSYoshii Takashi [1] = { 330b028f94bSYoshii Takashi .start = gic_spi(51), 331b028f94bSYoshii Takashi .end = gic_spi(54), 332b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 333b028f94bSYoshii Takashi }, 334b028f94bSYoshii Takashi }; 335b028f94bSYoshii Takashi 336b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 3378e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6824000, 0x426), 338b028f94bSYoshii Takashi [1] = { 339b028f94bSYoshii Takashi .start = gic_spi(171), 340b028f94bSYoshii Takashi .end = gic_spi(174), 341b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 342b028f94bSYoshii Takashi }, 343b028f94bSYoshii Takashi }; 344b028f94bSYoshii Takashi 345b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 3468e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6826000, 0x426), 347b028f94bSYoshii Takashi [1] = { 348b028f94bSYoshii Takashi .start = gic_spi(183), 349b028f94bSYoshii Takashi .end = gic_spi(186), 350b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 351b028f94bSYoshii Takashi }, 352b028f94bSYoshii Takashi }; 353b028f94bSYoshii Takashi 354b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 3558e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6828000, 0x426), 356b028f94bSYoshii Takashi [1] = { 357b028f94bSYoshii Takashi .start = gic_spi(187), 358b028f94bSYoshii Takashi .end = gic_spi(190), 359b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 360b028f94bSYoshii Takashi }, 361b028f94bSYoshii Takashi }; 362b028f94bSYoshii Takashi 363b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 364b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 365b028f94bSYoshii Takashi .id = 0, 366b028f94bSYoshii Takashi .resource = i2c0_resources, 367b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 368b028f94bSYoshii Takashi }; 369b028f94bSYoshii Takashi 370b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 371b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 372b028f94bSYoshii Takashi .id = 1, 373b028f94bSYoshii Takashi .resource = i2c1_resources, 374b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 375b028f94bSYoshii Takashi }; 376b028f94bSYoshii Takashi 377b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 378b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 379b028f94bSYoshii Takashi .id = 2, 380b028f94bSYoshii Takashi .resource = i2c2_resources, 381b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 382b028f94bSYoshii Takashi }; 383b028f94bSYoshii Takashi 384b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 385b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 386b028f94bSYoshii Takashi .id = 3, 387b028f94bSYoshii Takashi .resource = i2c3_resources, 388b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 389b028f94bSYoshii Takashi }; 390b028f94bSYoshii Takashi 391b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 392b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 393b028f94bSYoshii Takashi .id = 4, 394b028f94bSYoshii Takashi .resource = i2c4_resources, 395b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 396b028f94bSYoshii Takashi }; 397b028f94bSYoshii Takashi 398681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 399681e1b3eSMagnus Damm { 400681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 401681e1b3eSMagnus Damm .addr = 0xe6c40020, 402681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 403681e1b3eSMagnus Damm .mid_rid = 0x21, 404681e1b3eSMagnus Damm }, { 405681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 406681e1b3eSMagnus Damm .addr = 0xe6c40024, 407681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 408681e1b3eSMagnus Damm .mid_rid = 0x22, 409681e1b3eSMagnus Damm }, { 410681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 411681e1b3eSMagnus Damm .addr = 0xe6c50020, 412681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 413681e1b3eSMagnus Damm .mid_rid = 0x25, 414681e1b3eSMagnus Damm }, { 415681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 416681e1b3eSMagnus Damm .addr = 0xe6c50024, 417681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 418681e1b3eSMagnus Damm .mid_rid = 0x26, 419681e1b3eSMagnus Damm }, { 420681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 421681e1b3eSMagnus Damm .addr = 0xe6c60020, 422681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 423681e1b3eSMagnus Damm .mid_rid = 0x29, 424681e1b3eSMagnus Damm }, { 425681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 426681e1b3eSMagnus Damm .addr = 0xe6c60024, 427681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 428681e1b3eSMagnus Damm .mid_rid = 0x2a, 429681e1b3eSMagnus Damm }, { 430681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 431681e1b3eSMagnus Damm .addr = 0xe6c70020, 432681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 433681e1b3eSMagnus Damm .mid_rid = 0x2d, 434681e1b3eSMagnus Damm }, { 435681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 436681e1b3eSMagnus Damm .addr = 0xe6c70024, 437681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 438681e1b3eSMagnus Damm .mid_rid = 0x2e, 439681e1b3eSMagnus Damm }, { 440681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 441681e1b3eSMagnus Damm .addr = 0xe6c80020, 442681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 443681e1b3eSMagnus Damm .mid_rid = 0x39, 444681e1b3eSMagnus Damm }, { 445681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 446681e1b3eSMagnus Damm .addr = 0xe6c80024, 447681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 448681e1b3eSMagnus Damm .mid_rid = 0x3a, 449681e1b3eSMagnus Damm }, { 450681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 451681e1b3eSMagnus Damm .addr = 0xe6cb0020, 452681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 453681e1b3eSMagnus Damm .mid_rid = 0x35, 454681e1b3eSMagnus Damm }, { 455681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 456681e1b3eSMagnus Damm .addr = 0xe6cb0024, 457681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 458681e1b3eSMagnus Damm .mid_rid = 0x36, 459681e1b3eSMagnus Damm }, { 460681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 461681e1b3eSMagnus Damm .addr = 0xe6cc0020, 462681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 463681e1b3eSMagnus Damm .mid_rid = 0x1d, 464681e1b3eSMagnus Damm }, { 465681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 466681e1b3eSMagnus Damm .addr = 0xe6cc0024, 467681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 468681e1b3eSMagnus Damm .mid_rid = 0x1e, 469681e1b3eSMagnus Damm }, { 470681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 471681e1b3eSMagnus Damm .addr = 0xe6cd0020, 472681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 473681e1b3eSMagnus Damm .mid_rid = 0x19, 474681e1b3eSMagnus Damm }, { 475681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 476681e1b3eSMagnus Damm .addr = 0xe6cd0024, 477681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 478681e1b3eSMagnus Damm .mid_rid = 0x1a, 479681e1b3eSMagnus Damm }, { 480681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 481681e1b3eSMagnus Damm .addr = 0xe6c30040, 482681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 483681e1b3eSMagnus Damm .mid_rid = 0x3d, 484681e1b3eSMagnus Damm }, { 485681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 486681e1b3eSMagnus Damm .addr = 0xe6c30060, 487681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 488681e1b3eSMagnus Damm .mid_rid = 0x3e, 489681e1b3eSMagnus Damm }, { 490681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 491681e1b3eSMagnus Damm .addr = 0xee100030, 492681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 493681e1b3eSMagnus Damm .mid_rid = 0xc1, 494681e1b3eSMagnus Damm }, { 495681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 496681e1b3eSMagnus Damm .addr = 0xee100030, 497681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 498681e1b3eSMagnus Damm .mid_rid = 0xc2, 499681e1b3eSMagnus Damm }, { 500681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 501681e1b3eSMagnus Damm .addr = 0xee120030, 502681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 503681e1b3eSMagnus Damm .mid_rid = 0xc9, 504681e1b3eSMagnus Damm }, { 505681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 506681e1b3eSMagnus Damm .addr = 0xee120030, 507681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 508681e1b3eSMagnus Damm .mid_rid = 0xca, 509681e1b3eSMagnus Damm }, { 510681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 511681e1b3eSMagnus Damm .addr = 0xee140030, 512681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 513681e1b3eSMagnus Damm .mid_rid = 0xcd, 514681e1b3eSMagnus Damm }, { 515681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 516681e1b3eSMagnus Damm .addr = 0xee140030, 517681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 518681e1b3eSMagnus Damm .mid_rid = 0xce, 519681e1b3eSMagnus Damm }, { 520681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 521681e1b3eSMagnus Damm .addr = 0xe6bd0034, 522681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 523681e1b3eSMagnus Damm .mid_rid = 0xd1, 524681e1b3eSMagnus Damm }, { 525681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 526681e1b3eSMagnus Damm .addr = 0xe6bd0034, 527681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 528681e1b3eSMagnus Damm .mid_rid = 0xd2, 529681e1b3eSMagnus Damm }, 530681e1b3eSMagnus Damm }; 531681e1b3eSMagnus Damm 532681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 533681e1b3eSMagnus Damm { \ 534681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 535681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 536681e1b3eSMagnus Damm } 537681e1b3eSMagnus Damm 538681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 539681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 540681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 541681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 542681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 543681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 544681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 545681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 546681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 547681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 548681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 549681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 550681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 551681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 552681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 553681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 554681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 555681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 556681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 557681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 558681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 559681e1b3eSMagnus Damm }; 560681e1b3eSMagnus Damm 561681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 562681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 563681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 564681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 565681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 5666088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 5676088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 5686088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 5696088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 5706088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 5716088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 572681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 573681e1b3eSMagnus Damm }; 574681e1b3eSMagnus Damm 575681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 576abbec5f4SSimon Horman DEFINE_RES_MEM(0xfe000020, 0x89e0), 577681e1b3eSMagnus Damm { 57820052462SShimoda, Yoshihiro .name = "error_irq", 579681e1b3eSMagnus Damm .start = gic_spi(129), 580681e1b3eSMagnus Damm .end = gic_spi(129), 581681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 582681e1b3eSMagnus Damm }, 583681e1b3eSMagnus Damm { 584681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 585681e1b3eSMagnus Damm .start = gic_spi(109), 586681e1b3eSMagnus Damm .end = gic_spi(128), 587681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 588681e1b3eSMagnus Damm }, 589681e1b3eSMagnus Damm }; 590681e1b3eSMagnus Damm 591681e1b3eSMagnus Damm static struct platform_device dma0_device = { 592681e1b3eSMagnus Damm .name = "sh-dma-engine", 593681e1b3eSMagnus Damm .id = 0, 594681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 595681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 596681e1b3eSMagnus Damm .dev = { 597681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 598681e1b3eSMagnus Damm }, 599681e1b3eSMagnus Damm }; 600681e1b3eSMagnus Damm 601832290b2SKuninori Morimoto /* MPDMAC */ 602832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 603832290b2SKuninori Morimoto { 604832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 605832290b2SKuninori Morimoto .addr = 0xec230020, 606832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 607832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 608832290b2SKuninori Morimoto }, { 609832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 610832290b2SKuninori Morimoto .addr = 0xec230024, 611832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 612832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 613832290b2SKuninori Morimoto }, { 614832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 615832290b2SKuninori Morimoto .addr = 0xec230060, 616832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 617832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 618832290b2SKuninori Morimoto }, { 619832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 620832290b2SKuninori Morimoto .addr = 0xec230064, 621832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 622832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 623832290b2SKuninori Morimoto }, { 624832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 625832290b2SKuninori Morimoto .addr = 0xec240020, 626832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 627832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 628832290b2SKuninori Morimoto }, { 629832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 630832290b2SKuninori Morimoto .addr = 0xec240024, 631832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 632832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 633832290b2SKuninori Morimoto }, { 634832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 635832290b2SKuninori Morimoto .addr = 0xec240060, 636832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 637832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 638832290b2SKuninori Morimoto }, 639832290b2SKuninori Morimoto }; 640832290b2SKuninori Morimoto 641832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 642832290b2SKuninori Morimoto { \ 643832290b2SKuninori Morimoto .offset = a, \ 644832290b2SKuninori Morimoto .dmars = b, \ 645832290b2SKuninori Morimoto .dmars_bit = c, \ 646832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 647832290b2SKuninori Morimoto } 648832290b2SKuninori Morimoto 649832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 650832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 651832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 652832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 653832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 654832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 655832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 656832290b2SKuninori Morimoto }; 657832290b2SKuninori Morimoto 658832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 659832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 660832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 661832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 662832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 6636088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 6646088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 6656088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 6666088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 6676088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 6686088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 669832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 670832290b2SKuninori Morimoto .chclr_present = 1, 671832290b2SKuninori Morimoto }; 672832290b2SKuninori Morimoto 673832290b2SKuninori Morimoto /* Resource order important! */ 674832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 675832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 676abbec5f4SSimon Horman DEFINE_RES_MEM(0xec618020, 0x270), 677832290b2SKuninori Morimoto /* DMARSx */ 678abbec5f4SSimon Horman DEFINE_RES_MEM(0xec619000, 0xc), 679832290b2SKuninori Morimoto { 680832290b2SKuninori Morimoto .name = "error_irq", 681832290b2SKuninori Morimoto .start = gic_spi(181), 682832290b2SKuninori Morimoto .end = gic_spi(181), 683832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 684832290b2SKuninori Morimoto }, 685832290b2SKuninori Morimoto { 686832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 687832290b2SKuninori Morimoto .start = gic_spi(175), 688832290b2SKuninori Morimoto .end = gic_spi(180), 689832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 690832290b2SKuninori Morimoto }, 691832290b2SKuninori Morimoto }; 692832290b2SKuninori Morimoto 693832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 694832290b2SKuninori Morimoto .name = "sh-dma-engine", 695832290b2SKuninori Morimoto .id = 1, 696832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 697832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 698832290b2SKuninori Morimoto .dev = { 699832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 700832290b2SKuninori Morimoto }, 701832290b2SKuninori Morimoto }; 702832290b2SKuninori Morimoto 703f23f5be0STetsuyuki Kobayashi static struct resource pmu_resources[] = { 704f23f5be0STetsuyuki Kobayashi [0] = { 705f23f5be0STetsuyuki Kobayashi .start = gic_spi(55), 706f23f5be0STetsuyuki Kobayashi .end = gic_spi(55), 707f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 708f23f5be0STetsuyuki Kobayashi }, 709f23f5be0STetsuyuki Kobayashi [1] = { 710f23f5be0STetsuyuki Kobayashi .start = gic_spi(56), 711f23f5be0STetsuyuki Kobayashi .end = gic_spi(56), 712f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 713f23f5be0STetsuyuki Kobayashi }, 714f23f5be0STetsuyuki Kobayashi }; 715f23f5be0STetsuyuki Kobayashi 716f23f5be0STetsuyuki Kobayashi static struct platform_device pmu_device = { 717f23f5be0STetsuyuki Kobayashi .name = "arm-pmu", 718f23f5be0STetsuyuki Kobayashi .id = -1, 719f23f5be0STetsuyuki Kobayashi .num_resources = ARRAY_SIZE(pmu_resources), 720f23f5be0STetsuyuki Kobayashi .resource = pmu_resources, 721f23f5be0STetsuyuki Kobayashi }; 722f23f5be0STetsuyuki Kobayashi 7239a27dee7SHideki EIRAKU /* an IPMMU module for ICB */ 7249a27dee7SHideki EIRAKU static struct resource ipmmu_resources[] = { 7256244cd73SKuninori Morimoto DEFINE_RES_MEM(0xfe951000, 0x100), 7269a27dee7SHideki EIRAKU }; 7279a27dee7SHideki EIRAKU 7289a27dee7SHideki EIRAKU static const char * const ipmmu_dev_names[] = { 7299a27dee7SHideki EIRAKU "sh_mobile_lcdc_fb.0", 7309a27dee7SHideki EIRAKU }; 7319a27dee7SHideki EIRAKU 7329a27dee7SHideki EIRAKU static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { 7339a27dee7SHideki EIRAKU .dev_names = ipmmu_dev_names, 7349a27dee7SHideki EIRAKU .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), 7359a27dee7SHideki EIRAKU }; 7369a27dee7SHideki EIRAKU 7379a27dee7SHideki EIRAKU static struct platform_device ipmmu_device = { 7389a27dee7SHideki EIRAKU .name = "ipmmu", 7399a27dee7SHideki EIRAKU .id = -1, 7409a27dee7SHideki EIRAKU .dev = { 7419a27dee7SHideki EIRAKU .platform_data = &ipmmu_platform_data, 7429a27dee7SHideki EIRAKU }, 7439a27dee7SHideki EIRAKU .resource = ipmmu_resources, 7449a27dee7SHideki EIRAKU .num_resources = ARRAY_SIZE(ipmmu_resources), 7459a27dee7SHideki EIRAKU }; 7469a27dee7SHideki EIRAKU 7471461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin0_platform_data = { 748341eb546SMagnus Damm .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */ 749341eb546SMagnus Damm }; 750341eb546SMagnus Damm 751341eb546SMagnus Damm static struct resource irqpin0_resources[] = { 752341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ 753341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ 754341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ 755341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ 756341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ 757341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(1)), /* IRQ0 */ 758341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(2)), /* IRQ1 */ 759341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(3)), /* IRQ2 */ 760341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(4)), /* IRQ3 */ 761341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(5)), /* IRQ4 */ 762341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(6)), /* IRQ5 */ 763341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(7)), /* IRQ6 */ 764341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(8)), /* IRQ7 */ 765341eb546SMagnus Damm }; 766341eb546SMagnus Damm 767341eb546SMagnus Damm static struct platform_device irqpin0_device = { 768341eb546SMagnus Damm .name = "renesas_intc_irqpin", 769341eb546SMagnus Damm .id = 0, 770341eb546SMagnus Damm .resource = irqpin0_resources, 771341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin0_resources), 772341eb546SMagnus Damm .dev = { 773341eb546SMagnus Damm .platform_data = &irqpin0_platform_data, 774341eb546SMagnus Damm }, 775341eb546SMagnus Damm }; 776341eb546SMagnus Damm 7771461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin1_platform_data = { 778341eb546SMagnus Damm .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */ 779341eb546SMagnus Damm .control_parent = true, /* Disable spurious IRQ10 */ 780341eb546SMagnus Damm }; 781341eb546SMagnus Damm 782341eb546SMagnus Damm static struct resource irqpin1_resources[] = { 783341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ 784341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ 785341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ 786341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */ 787341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */ 788341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(9)), /* IRQ8 */ 789341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(10)), /* IRQ9 */ 790341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(11)), /* IRQ10 */ 791341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(12)), /* IRQ11 */ 792341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(13)), /* IRQ12 */ 793341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(14)), /* IRQ13 */ 794341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(15)), /* IRQ14 */ 795341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(16)), /* IRQ15 */ 796341eb546SMagnus Damm }; 797341eb546SMagnus Damm 798341eb546SMagnus Damm static struct platform_device irqpin1_device = { 799341eb546SMagnus Damm .name = "renesas_intc_irqpin", 800341eb546SMagnus Damm .id = 1, 801341eb546SMagnus Damm .resource = irqpin1_resources, 802341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin1_resources), 803341eb546SMagnus Damm .dev = { 804341eb546SMagnus Damm .platform_data = &irqpin1_platform_data, 805341eb546SMagnus Damm }, 806341eb546SMagnus Damm }; 807341eb546SMagnus Damm 8081461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin2_platform_data = { 809341eb546SMagnus Damm .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */ 810341eb546SMagnus Damm }; 811341eb546SMagnus Damm 812341eb546SMagnus Damm static struct resource irqpin2_resources[] = { 813341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */ 814341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI20A */ 815341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ20A */ 816341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK20A */ 817341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR20A */ 818341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(17)), /* IRQ16 */ 819341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(18)), /* IRQ17 */ 820341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(19)), /* IRQ18 */ 821341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(20)), /* IRQ19 */ 822341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(21)), /* IRQ20 */ 823341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(22)), /* IRQ21 */ 824341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(23)), /* IRQ22 */ 825341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(24)), /* IRQ23 */ 826341eb546SMagnus Damm }; 827341eb546SMagnus Damm 828341eb546SMagnus Damm static struct platform_device irqpin2_device = { 829341eb546SMagnus Damm .name = "renesas_intc_irqpin", 830341eb546SMagnus Damm .id = 2, 831341eb546SMagnus Damm .resource = irqpin2_resources, 832341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin2_resources), 833341eb546SMagnus Damm .dev = { 834341eb546SMagnus Damm .platform_data = &irqpin2_platform_data, 835341eb546SMagnus Damm }, 836341eb546SMagnus Damm }; 837341eb546SMagnus Damm 8381461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin3_platform_data = { 839341eb546SMagnus Damm .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */ 840341eb546SMagnus Damm }; 841341eb546SMagnus Damm 842341eb546SMagnus Damm static struct resource irqpin3_resources[] = { 843341eb546SMagnus Damm DEFINE_RES_MEM(0xe690000c, 4), /* ICR4A */ 844341eb546SMagnus Damm DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */ 845341eb546SMagnus Damm DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */ 846341eb546SMagnus Damm DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */ 847341eb546SMagnus Damm DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */ 848341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(25)), /* IRQ24 */ 849341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(26)), /* IRQ25 */ 850341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(27)), /* IRQ26 */ 851341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(28)), /* IRQ27 */ 852341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(29)), /* IRQ28 */ 853341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(30)), /* IRQ29 */ 854341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(31)), /* IRQ30 */ 855341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(32)), /* IRQ31 */ 856341eb546SMagnus Damm }; 857341eb546SMagnus Damm 858341eb546SMagnus Damm static struct platform_device irqpin3_device = { 859341eb546SMagnus Damm .name = "renesas_intc_irqpin", 860341eb546SMagnus Damm .id = 3, 861341eb546SMagnus Damm .resource = irqpin3_resources, 862341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin3_resources), 863341eb546SMagnus Damm .dev = { 864341eb546SMagnus Damm .platform_data = &irqpin3_platform_data, 865341eb546SMagnus Damm }, 866341eb546SMagnus Damm }; 867341eb546SMagnus Damm 8683b00f934SSimon Horman static struct platform_device *sh73a0_devices_dt[] __initdata = { 8696d9598e2SMagnus Damm &scif0_device, 8706d9598e2SMagnus Damm &scif1_device, 8716d9598e2SMagnus Damm &scif2_device, 8726d9598e2SMagnus Damm &scif3_device, 8736d9598e2SMagnus Damm &scif4_device, 8746d9598e2SMagnus Damm &scif5_device, 8756d9598e2SMagnus Damm &scif6_device, 8766d9598e2SMagnus Damm &scif7_device, 8776d9598e2SMagnus Damm &scif8_device, 8786d9598e2SMagnus Damm &cmt10_device, 87948609533SSimon Horman }; 88048609533SSimon Horman 88148609533SSimon Horman static struct platform_device *sh73a0_early_devices[] __initdata = { 8825010f3dbSMagnus Damm &tmu00_device, 8835010f3dbSMagnus Damm &tmu01_device, 8849a27dee7SHideki EIRAKU &ipmmu_device, 8856d9598e2SMagnus Damm }; 8866d9598e2SMagnus Damm 887b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 888b028f94bSYoshii Takashi &i2c0_device, 889b028f94bSYoshii Takashi &i2c1_device, 890b028f94bSYoshii Takashi &i2c2_device, 891b028f94bSYoshii Takashi &i2c3_device, 892b028f94bSYoshii Takashi &i2c4_device, 893681e1b3eSMagnus Damm &dma0_device, 894832290b2SKuninori Morimoto &mpdma0_device, 895f23f5be0STetsuyuki Kobayashi &pmu_device, 896341eb546SMagnus Damm &irqpin0_device, 897341eb546SMagnus Damm &irqpin1_device, 898341eb546SMagnus Damm &irqpin2_device, 899341eb546SMagnus Damm &irqpin3_device, 900b028f94bSYoshii Takashi }; 901b028f94bSYoshii Takashi 9020a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 903681e1b3eSMagnus Damm 9046d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 9056d9598e2SMagnus Damm { 906681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 907681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 908681e1b3eSMagnus Damm 9093b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 9103b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 9116d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 9126d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 913b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 914b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 9156d9598e2SMagnus Damm } 9166d9598e2SMagnus Damm 91743cb8cb7SMagnus Damm void __init sh73a0_init_delay(void) 91843cb8cb7SMagnus Damm { 91943cb8cb7SMagnus Damm shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ 92043cb8cb7SMagnus Damm } 92143cb8cb7SMagnus Damm 922d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 923d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 924d6720003SKuninori Morimoto 9256bb27d73SStephen Warren void __init sh73a0_earlytimer_init(void) 9263be26fdbSMagnus Damm { 92743cb8cb7SMagnus Damm sh73a0_init_delay(); 9283be26fdbSMagnus Damm sh73a0_clock_init(); 9293be26fdbSMagnus Damm shmobile_earlytimer_init(); 930d6720003SKuninori Morimoto sh73a0_register_twd(); 9313be26fdbSMagnus Damm } 9323be26fdbSMagnus Damm 9336d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 9346d9598e2SMagnus Damm { 9353b00f934SSimon Horman early_platform_add_devices(sh73a0_devices_dt, 9363b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 9376d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 9386d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 93950e15c34SMagnus Damm 94050e15c34SMagnus Damm /* setup early console here as well */ 94150e15c34SMagnus Damm shmobile_setup_console(); 9426d9598e2SMagnus Damm } 94348609533SSimon Horman 94448609533SSimon Horman #ifdef CONFIG_USE_OF 94548609533SSimon Horman 94648609533SSimon Horman void __init sh73a0_add_standard_devices_dt(void) 94748609533SSimon Horman { 948d2347382SGuennadi Liakhovetski struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, }; 949d2347382SGuennadi Liakhovetski 95048609533SSimon Horman /* clocks are setup late during boot in the case of DT */ 95148609533SSimon Horman sh73a0_clock_init(); 95248609533SSimon Horman 9533b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 9543b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 955ea31597fSMagnus Damm of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 956d2347382SGuennadi Liakhovetski 957d2347382SGuennadi Liakhovetski /* Instantiate cpufreq-cpu0 */ 958d2347382SGuennadi Liakhovetski platform_device_register_full(&devinfo); 95948609533SSimon Horman } 96048609533SSimon Horman 96148609533SSimon Horman static const char *sh73a0_boards_compat_dt[] __initdata = { 96248609533SSimon Horman "renesas,sh73a0", 96348609533SSimon Horman NULL, 96448609533SSimon Horman }; 96548609533SSimon Horman 96648609533SSimon Horman DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") 967f9989507SSimon Horman .smp = smp_ops(sh73a0_smp_ops), 96848609533SSimon Horman .map_io = sh73a0_map_io, 9693b00f934SSimon Horman .init_early = sh73a0_init_delay, 97048609533SSimon Horman .nr_irqs = NR_IRQS_LEGACY, 97148609533SSimon Horman .init_machine = sh73a0_add_standard_devices_dt, 97248609533SSimon Horman .dt_compat = sh73a0_boards_compat_dt, 97348609533SSimon Horman MACHINE_END 97448609533SSimon Horman #endif /* CONFIG_USE_OF */ 975