16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 256d9598e2SMagnus Damm #include <linux/platform_device.h> 2648609533SSimon Horman #include <linux/of_platform.h> 276d9598e2SMagnus Damm #include <linux/delay.h> 286d9598e2SMagnus Damm #include <linux/input.h> 296d9598e2SMagnus Damm #include <linux/io.h> 306d9598e2SMagnus Damm #include <linux/serial_sci.h> 31681e1b3eSMagnus Damm #include <linux/sh_dma.h> 326d9598e2SMagnus Damm #include <linux/sh_intc.h> 336d9598e2SMagnus Damm #include <linux/sh_timer.h> 349a27dee7SHideki EIRAKU #include <linux/platform_data/sh_ipmmu.h> 35341eb546SMagnus Damm #include <linux/platform_data/irq-renesas-intc-irqpin.h> 366088b422SKuninori Morimoto #include <mach/dma-register.h> 37250a2723SRob Herring #include <mach/irqs.h> 38681e1b3eSMagnus Damm #include <mach/sh73a0.h> 3950e15c34SMagnus Damm #include <mach/common.h> 406d9598e2SMagnus Damm #include <asm/mach-types.h> 4150e15c34SMagnus Damm #include <asm/mach/map.h> 426d9598e2SMagnus Damm #include <asm/mach/arch.h> 433be26fdbSMagnus Damm #include <asm/mach/time.h> 446d9598e2SMagnus Damm 4550e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4650e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4750e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4850e15c34SMagnus Damm */ 4950e15c34SMagnus Damm { 5050e15c34SMagnus Damm .virtual = 0xe6000000, 5150e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5250e15c34SMagnus Damm .length = 256 << 20, 5350e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5450e15c34SMagnus Damm }, 5550e15c34SMagnus Damm }; 5650e15c34SMagnus Damm 5750e15c34SMagnus Damm void __init sh73a0_map_io(void) 5850e15c34SMagnus Damm { 5950e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 6050e15c34SMagnus Damm } 6150e15c34SMagnus Damm 62474f6758SMagnus Damm /* PFC */ 63474f6758SMagnus Damm static struct resource pfc_resources[] __initdata = { 64474f6758SMagnus Damm DEFINE_RES_MEM(0xe6050000, 0x8000), 65474f6758SMagnus Damm DEFINE_RES_MEM(0xe605801c, 0x000c), 66994d66a4SLaurent Pinchart }; 67994d66a4SLaurent Pinchart 68994d66a4SLaurent Pinchart void __init sh73a0_pinmux_init(void) 69994d66a4SLaurent Pinchart { 70474f6758SMagnus Damm platform_device_register_simple("pfc-sh73a0", -1, pfc_resources, 71474f6758SMagnus Damm ARRAY_SIZE(pfc_resources)); 72994d66a4SLaurent Pinchart } 73994d66a4SLaurent Pinchart 74d000fff9SLaurent Pinchart /* SCIF */ 75d000fff9SLaurent Pinchart #define SH73A0_SCIF(scif_type, index, baseaddr, irq) \ 76d000fff9SLaurent Pinchart static struct plat_sci_port scif##index##_platform_data = { \ 77d000fff9SLaurent Pinchart .type = scif_type, \ 78d000fff9SLaurent Pinchart .flags = UPF_BOOT_AUTOCONF, \ 79d000fff9SLaurent Pinchart .scscr = SCSCR_RE | SCSCR_TE, \ 80d000fff9SLaurent Pinchart }; \ 81d000fff9SLaurent Pinchart \ 8231e1ee86SLaurent Pinchart static struct resource scif##index##_resources[] = { \ 8331e1ee86SLaurent Pinchart DEFINE_RES_MEM(baseaddr, 0x100), \ 8431e1ee86SLaurent Pinchart DEFINE_RES_IRQ(irq), \ 8531e1ee86SLaurent Pinchart }; \ 8631e1ee86SLaurent Pinchart \ 87d000fff9SLaurent Pinchart static struct platform_device scif##index##_device = { \ 88d000fff9SLaurent Pinchart .name = "sh-sci", \ 89d000fff9SLaurent Pinchart .id = index, \ 9031e1ee86SLaurent Pinchart .resource = scif##index##_resources, \ 9131e1ee86SLaurent Pinchart .num_resources = ARRAY_SIZE(scif##index##_resources), \ 92d000fff9SLaurent Pinchart .dev = { \ 93d000fff9SLaurent Pinchart .platform_data = &scif##index##_platform_data, \ 94d000fff9SLaurent Pinchart }, \ 95d000fff9SLaurent Pinchart } 966d9598e2SMagnus Damm 97d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(72)); 98d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(73)); 99d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(74)); 100d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(75)); 101d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(78)); 102d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(79)); 103d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156)); 104d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143)); 105d000fff9SLaurent Pinchart SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80)); 1066d9598e2SMagnus Damm 107652256fdSLaurent Pinchart static struct sh_timer_config cmt1_platform_data = { 108652256fdSLaurent Pinchart .channels_mask = 0x3f, 1096d9598e2SMagnus Damm }; 1106d9598e2SMagnus Damm 111652256fdSLaurent Pinchart static struct resource cmt1_resources[] = { 112652256fdSLaurent Pinchart DEFINE_RES_MEM(0xe6138000, 0x200), 113652256fdSLaurent Pinchart DEFINE_RES_IRQ(gic_spi(65)), 1146d9598e2SMagnus Damm }; 1156d9598e2SMagnus Damm 116652256fdSLaurent Pinchart static struct platform_device cmt1_device = { 117652256fdSLaurent Pinchart .name = "sh-cmt-48", 118652256fdSLaurent Pinchart .id = 1, 1196d9598e2SMagnus Damm .dev = { 120652256fdSLaurent Pinchart .platform_data = &cmt1_platform_data, 1216d9598e2SMagnus Damm }, 122652256fdSLaurent Pinchart .resource = cmt1_resources, 123652256fdSLaurent Pinchart .num_resources = ARRAY_SIZE(cmt1_resources), 1246d9598e2SMagnus Damm }; 1256d9598e2SMagnus Damm 1265010f3dbSMagnus Damm /* TMU */ 1273df592bcSLaurent Pinchart static struct sh_timer_config tmu0_platform_data = { 1283df592bcSLaurent Pinchart .channels_mask = 7, 1295010f3dbSMagnus Damm }; 1305010f3dbSMagnus Damm 1313df592bcSLaurent Pinchart static struct resource tmu0_resources[] = { 1323df592bcSLaurent Pinchart DEFINE_RES_MEM(0xfff60000, 0x2c), 1333df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xe80)), 1343df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xea0)), 1353df592bcSLaurent Pinchart DEFINE_RES_IRQ(intcs_evt2irq(0xec0)), 1365010f3dbSMagnus Damm }; 1375010f3dbSMagnus Damm 1383df592bcSLaurent Pinchart static struct platform_device tmu0_device = { 1393df592bcSLaurent Pinchart .name = "sh-tmu", 1405010f3dbSMagnus Damm .id = 0, 1415010f3dbSMagnus Damm .dev = { 1423df592bcSLaurent Pinchart .platform_data = &tmu0_platform_data, 1435010f3dbSMagnus Damm }, 1443df592bcSLaurent Pinchart .resource = tmu0_resources, 1453df592bcSLaurent Pinchart .num_resources = ARRAY_SIZE(tmu0_resources), 1465010f3dbSMagnus Damm }; 1475010f3dbSMagnus Damm 148b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 1498e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6820000, 0x426), 150b028f94bSYoshii Takashi [1] = { 151b028f94bSYoshii Takashi .start = gic_spi(167), 152b028f94bSYoshii Takashi .end = gic_spi(170), 153b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 154b028f94bSYoshii Takashi }, 155b028f94bSYoshii Takashi }; 156b028f94bSYoshii Takashi 157b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 1588e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6822000, 0x426), 159b028f94bSYoshii Takashi [1] = { 160b028f94bSYoshii Takashi .start = gic_spi(51), 161b028f94bSYoshii Takashi .end = gic_spi(54), 162b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 163b028f94bSYoshii Takashi }, 164b028f94bSYoshii Takashi }; 165b028f94bSYoshii Takashi 166b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 1678e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6824000, 0x426), 168b028f94bSYoshii Takashi [1] = { 169b028f94bSYoshii Takashi .start = gic_spi(171), 170b028f94bSYoshii Takashi .end = gic_spi(174), 171b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 172b028f94bSYoshii Takashi }, 173b028f94bSYoshii Takashi }; 174b028f94bSYoshii Takashi 175b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 1768e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6826000, 0x426), 177b028f94bSYoshii Takashi [1] = { 178b028f94bSYoshii Takashi .start = gic_spi(183), 179b028f94bSYoshii Takashi .end = gic_spi(186), 180b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 181b028f94bSYoshii Takashi }, 182b028f94bSYoshii Takashi }; 183b028f94bSYoshii Takashi 184b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 1858e85524bSKuninori Morimoto [0] = DEFINE_RES_MEM(0xe6828000, 0x426), 186b028f94bSYoshii Takashi [1] = { 187b028f94bSYoshii Takashi .start = gic_spi(187), 188b028f94bSYoshii Takashi .end = gic_spi(190), 189b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 190b028f94bSYoshii Takashi }, 191b028f94bSYoshii Takashi }; 192b028f94bSYoshii Takashi 193b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 194b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 195b028f94bSYoshii Takashi .id = 0, 196b028f94bSYoshii Takashi .resource = i2c0_resources, 197b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 198b028f94bSYoshii Takashi }; 199b028f94bSYoshii Takashi 200b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 201b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 202b028f94bSYoshii Takashi .id = 1, 203b028f94bSYoshii Takashi .resource = i2c1_resources, 204b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 205b028f94bSYoshii Takashi }; 206b028f94bSYoshii Takashi 207b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 208b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 209b028f94bSYoshii Takashi .id = 2, 210b028f94bSYoshii Takashi .resource = i2c2_resources, 211b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 212b028f94bSYoshii Takashi }; 213b028f94bSYoshii Takashi 214b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 215b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 216b028f94bSYoshii Takashi .id = 3, 217b028f94bSYoshii Takashi .resource = i2c3_resources, 218b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 219b028f94bSYoshii Takashi }; 220b028f94bSYoshii Takashi 221b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 222b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 223b028f94bSYoshii Takashi .id = 4, 224b028f94bSYoshii Takashi .resource = i2c4_resources, 225b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 226b028f94bSYoshii Takashi }; 227b028f94bSYoshii Takashi 228681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 229681e1b3eSMagnus Damm { 230681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 231681e1b3eSMagnus Damm .addr = 0xe6c40020, 232681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 233681e1b3eSMagnus Damm .mid_rid = 0x21, 234681e1b3eSMagnus Damm }, { 235681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 236681e1b3eSMagnus Damm .addr = 0xe6c40024, 237681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 238681e1b3eSMagnus Damm .mid_rid = 0x22, 239681e1b3eSMagnus Damm }, { 240681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 241681e1b3eSMagnus Damm .addr = 0xe6c50020, 242681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 243681e1b3eSMagnus Damm .mid_rid = 0x25, 244681e1b3eSMagnus Damm }, { 245681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 246681e1b3eSMagnus Damm .addr = 0xe6c50024, 247681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 248681e1b3eSMagnus Damm .mid_rid = 0x26, 249681e1b3eSMagnus Damm }, { 250681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 251681e1b3eSMagnus Damm .addr = 0xe6c60020, 252681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 253681e1b3eSMagnus Damm .mid_rid = 0x29, 254681e1b3eSMagnus Damm }, { 255681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 256681e1b3eSMagnus Damm .addr = 0xe6c60024, 257681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 258681e1b3eSMagnus Damm .mid_rid = 0x2a, 259681e1b3eSMagnus Damm }, { 260681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 261681e1b3eSMagnus Damm .addr = 0xe6c70020, 262681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 263681e1b3eSMagnus Damm .mid_rid = 0x2d, 264681e1b3eSMagnus Damm }, { 265681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 266681e1b3eSMagnus Damm .addr = 0xe6c70024, 267681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 268681e1b3eSMagnus Damm .mid_rid = 0x2e, 269681e1b3eSMagnus Damm }, { 270681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 271681e1b3eSMagnus Damm .addr = 0xe6c80020, 272681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 273681e1b3eSMagnus Damm .mid_rid = 0x39, 274681e1b3eSMagnus Damm }, { 275681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 276681e1b3eSMagnus Damm .addr = 0xe6c80024, 277681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 278681e1b3eSMagnus Damm .mid_rid = 0x3a, 279681e1b3eSMagnus Damm }, { 280681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 281681e1b3eSMagnus Damm .addr = 0xe6cb0020, 282681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 283681e1b3eSMagnus Damm .mid_rid = 0x35, 284681e1b3eSMagnus Damm }, { 285681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 286681e1b3eSMagnus Damm .addr = 0xe6cb0024, 287681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 288681e1b3eSMagnus Damm .mid_rid = 0x36, 289681e1b3eSMagnus Damm }, { 290681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 291681e1b3eSMagnus Damm .addr = 0xe6cc0020, 292681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 293681e1b3eSMagnus Damm .mid_rid = 0x1d, 294681e1b3eSMagnus Damm }, { 295681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 296681e1b3eSMagnus Damm .addr = 0xe6cc0024, 297681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 298681e1b3eSMagnus Damm .mid_rid = 0x1e, 299681e1b3eSMagnus Damm }, { 300681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 301681e1b3eSMagnus Damm .addr = 0xe6cd0020, 302681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 303681e1b3eSMagnus Damm .mid_rid = 0x19, 304681e1b3eSMagnus Damm }, { 305681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 306681e1b3eSMagnus Damm .addr = 0xe6cd0024, 307681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 308681e1b3eSMagnus Damm .mid_rid = 0x1a, 309681e1b3eSMagnus Damm }, { 310681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 311681e1b3eSMagnus Damm .addr = 0xe6c30040, 312681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 313681e1b3eSMagnus Damm .mid_rid = 0x3d, 314681e1b3eSMagnus Damm }, { 315681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 316681e1b3eSMagnus Damm .addr = 0xe6c30060, 317681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 318681e1b3eSMagnus Damm .mid_rid = 0x3e, 319681e1b3eSMagnus Damm }, { 320681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 321681e1b3eSMagnus Damm .addr = 0xee100030, 322681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 323681e1b3eSMagnus Damm .mid_rid = 0xc1, 324681e1b3eSMagnus Damm }, { 325681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 326681e1b3eSMagnus Damm .addr = 0xee100030, 327681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 328681e1b3eSMagnus Damm .mid_rid = 0xc2, 329681e1b3eSMagnus Damm }, { 330681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 331681e1b3eSMagnus Damm .addr = 0xee120030, 332681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 333681e1b3eSMagnus Damm .mid_rid = 0xc9, 334681e1b3eSMagnus Damm }, { 335681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 336681e1b3eSMagnus Damm .addr = 0xee120030, 337681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 338681e1b3eSMagnus Damm .mid_rid = 0xca, 339681e1b3eSMagnus Damm }, { 340681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 341681e1b3eSMagnus Damm .addr = 0xee140030, 342681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 343681e1b3eSMagnus Damm .mid_rid = 0xcd, 344681e1b3eSMagnus Damm }, { 345681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 346681e1b3eSMagnus Damm .addr = 0xee140030, 347681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 348681e1b3eSMagnus Damm .mid_rid = 0xce, 349681e1b3eSMagnus Damm }, { 350681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 351681e1b3eSMagnus Damm .addr = 0xe6bd0034, 352681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 353681e1b3eSMagnus Damm .mid_rid = 0xd1, 354681e1b3eSMagnus Damm }, { 355681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 356681e1b3eSMagnus Damm .addr = 0xe6bd0034, 357681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 358681e1b3eSMagnus Damm .mid_rid = 0xd2, 359681e1b3eSMagnus Damm }, 360681e1b3eSMagnus Damm }; 361681e1b3eSMagnus Damm 362681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 363681e1b3eSMagnus Damm { \ 364681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 365681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 366681e1b3eSMagnus Damm } 367681e1b3eSMagnus Damm 368681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 369681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 370681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 371681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 372681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 373681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 374681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 375681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 376681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 377681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 378681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 379681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 380681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 381681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 382681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 383681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 384681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 385681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 386681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 387681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 388681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 389681e1b3eSMagnus Damm }; 390681e1b3eSMagnus Damm 391681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 392681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 393681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 394681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 395681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 3966088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 3976088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 3986088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 3996088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 4006088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 4016088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 402681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 403681e1b3eSMagnus Damm }; 404681e1b3eSMagnus Damm 405681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 406abbec5f4SSimon Horman DEFINE_RES_MEM(0xfe000020, 0x89e0), 407681e1b3eSMagnus Damm { 40820052462SShimoda, Yoshihiro .name = "error_irq", 409681e1b3eSMagnus Damm .start = gic_spi(129), 410681e1b3eSMagnus Damm .end = gic_spi(129), 411681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 412681e1b3eSMagnus Damm }, 413681e1b3eSMagnus Damm { 414681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 415681e1b3eSMagnus Damm .start = gic_spi(109), 416681e1b3eSMagnus Damm .end = gic_spi(128), 417681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 418681e1b3eSMagnus Damm }, 419681e1b3eSMagnus Damm }; 420681e1b3eSMagnus Damm 421681e1b3eSMagnus Damm static struct platform_device dma0_device = { 422681e1b3eSMagnus Damm .name = "sh-dma-engine", 423681e1b3eSMagnus Damm .id = 0, 424681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 425681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 426681e1b3eSMagnus Damm .dev = { 427681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 428681e1b3eSMagnus Damm }, 429681e1b3eSMagnus Damm }; 430681e1b3eSMagnus Damm 431832290b2SKuninori Morimoto /* MPDMAC */ 432832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 433832290b2SKuninori Morimoto { 434832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 435832290b2SKuninori Morimoto .addr = 0xec230020, 436832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 437832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 438832290b2SKuninori Morimoto }, { 439832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 440832290b2SKuninori Morimoto .addr = 0xec230024, 441832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 442832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 443832290b2SKuninori Morimoto }, { 444832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 445832290b2SKuninori Morimoto .addr = 0xec230060, 446832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 447832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 448832290b2SKuninori Morimoto }, { 449832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 450832290b2SKuninori Morimoto .addr = 0xec230064, 451832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 452832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 453832290b2SKuninori Morimoto }, { 454832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 455832290b2SKuninori Morimoto .addr = 0xec240020, 456832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 457832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 458832290b2SKuninori Morimoto }, { 459832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 460832290b2SKuninori Morimoto .addr = 0xec240024, 461832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 462832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 463832290b2SKuninori Morimoto }, { 464832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 465832290b2SKuninori Morimoto .addr = 0xec240060, 466832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 467832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 468832290b2SKuninori Morimoto }, 469832290b2SKuninori Morimoto }; 470832290b2SKuninori Morimoto 471832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 472832290b2SKuninori Morimoto { \ 473832290b2SKuninori Morimoto .offset = a, \ 474832290b2SKuninori Morimoto .dmars = b, \ 475832290b2SKuninori Morimoto .dmars_bit = c, \ 476832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 477832290b2SKuninori Morimoto } 478832290b2SKuninori Morimoto 479832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 480832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 481832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 482832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 483832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 484832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 485832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 486832290b2SKuninori Morimoto }; 487832290b2SKuninori Morimoto 488832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 489832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 490832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 491832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 492832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 4936088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 4946088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 4956088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 4966088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 4976088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 4986088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 499832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 500832290b2SKuninori Morimoto .chclr_present = 1, 501832290b2SKuninori Morimoto }; 502832290b2SKuninori Morimoto 503832290b2SKuninori Morimoto /* Resource order important! */ 504832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 505832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 506abbec5f4SSimon Horman DEFINE_RES_MEM(0xec618020, 0x270), 507832290b2SKuninori Morimoto /* DMARSx */ 508abbec5f4SSimon Horman DEFINE_RES_MEM(0xec619000, 0xc), 509832290b2SKuninori Morimoto { 510832290b2SKuninori Morimoto .name = "error_irq", 511832290b2SKuninori Morimoto .start = gic_spi(181), 512832290b2SKuninori Morimoto .end = gic_spi(181), 513832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 514832290b2SKuninori Morimoto }, 515832290b2SKuninori Morimoto { 516832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 517832290b2SKuninori Morimoto .start = gic_spi(175), 518832290b2SKuninori Morimoto .end = gic_spi(180), 519832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 520832290b2SKuninori Morimoto }, 521832290b2SKuninori Morimoto }; 522832290b2SKuninori Morimoto 523832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 524832290b2SKuninori Morimoto .name = "sh-dma-engine", 525832290b2SKuninori Morimoto .id = 1, 526832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 527832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 528832290b2SKuninori Morimoto .dev = { 529832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 530832290b2SKuninori Morimoto }, 531832290b2SKuninori Morimoto }; 532832290b2SKuninori Morimoto 533f23f5be0STetsuyuki Kobayashi static struct resource pmu_resources[] = { 534f23f5be0STetsuyuki Kobayashi [0] = { 535f23f5be0STetsuyuki Kobayashi .start = gic_spi(55), 536f23f5be0STetsuyuki Kobayashi .end = gic_spi(55), 537f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 538f23f5be0STetsuyuki Kobayashi }, 539f23f5be0STetsuyuki Kobayashi [1] = { 540f23f5be0STetsuyuki Kobayashi .start = gic_spi(56), 541f23f5be0STetsuyuki Kobayashi .end = gic_spi(56), 542f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 543f23f5be0STetsuyuki Kobayashi }, 544f23f5be0STetsuyuki Kobayashi }; 545f23f5be0STetsuyuki Kobayashi 546f23f5be0STetsuyuki Kobayashi static struct platform_device pmu_device = { 547f23f5be0STetsuyuki Kobayashi .name = "arm-pmu", 548f23f5be0STetsuyuki Kobayashi .id = -1, 549f23f5be0STetsuyuki Kobayashi .num_resources = ARRAY_SIZE(pmu_resources), 550f23f5be0STetsuyuki Kobayashi .resource = pmu_resources, 551f23f5be0STetsuyuki Kobayashi }; 552f23f5be0STetsuyuki Kobayashi 5539a27dee7SHideki EIRAKU /* an IPMMU module for ICB */ 5549a27dee7SHideki EIRAKU static struct resource ipmmu_resources[] = { 5556244cd73SKuninori Morimoto DEFINE_RES_MEM(0xfe951000, 0x100), 5569a27dee7SHideki EIRAKU }; 5579a27dee7SHideki EIRAKU 5589a27dee7SHideki EIRAKU static const char * const ipmmu_dev_names[] = { 5599a27dee7SHideki EIRAKU "sh_mobile_lcdc_fb.0", 5609a27dee7SHideki EIRAKU }; 5619a27dee7SHideki EIRAKU 5629a27dee7SHideki EIRAKU static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { 5639a27dee7SHideki EIRAKU .dev_names = ipmmu_dev_names, 5649a27dee7SHideki EIRAKU .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), 5659a27dee7SHideki EIRAKU }; 5669a27dee7SHideki EIRAKU 5679a27dee7SHideki EIRAKU static struct platform_device ipmmu_device = { 5689a27dee7SHideki EIRAKU .name = "ipmmu", 5699a27dee7SHideki EIRAKU .id = -1, 5709a27dee7SHideki EIRAKU .dev = { 5719a27dee7SHideki EIRAKU .platform_data = &ipmmu_platform_data, 5729a27dee7SHideki EIRAKU }, 5739a27dee7SHideki EIRAKU .resource = ipmmu_resources, 5749a27dee7SHideki EIRAKU .num_resources = ARRAY_SIZE(ipmmu_resources), 5759a27dee7SHideki EIRAKU }; 5769a27dee7SHideki EIRAKU 5771461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin0_platform_data = { 578341eb546SMagnus Damm .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */ 579341eb546SMagnus Damm }; 580341eb546SMagnus Damm 581341eb546SMagnus Damm static struct resource irqpin0_resources[] = { 582341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ 583341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ 584341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ 585341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ 586341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ 587341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(1)), /* IRQ0 */ 588341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(2)), /* IRQ1 */ 589341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(3)), /* IRQ2 */ 590341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(4)), /* IRQ3 */ 591341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(5)), /* IRQ4 */ 592341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(6)), /* IRQ5 */ 593341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(7)), /* IRQ6 */ 594341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(8)), /* IRQ7 */ 595341eb546SMagnus Damm }; 596341eb546SMagnus Damm 597341eb546SMagnus Damm static struct platform_device irqpin0_device = { 598341eb546SMagnus Damm .name = "renesas_intc_irqpin", 599341eb546SMagnus Damm .id = 0, 600341eb546SMagnus Damm .resource = irqpin0_resources, 601341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin0_resources), 602341eb546SMagnus Damm .dev = { 603341eb546SMagnus Damm .platform_data = &irqpin0_platform_data, 604341eb546SMagnus Damm }, 605341eb546SMagnus Damm }; 606341eb546SMagnus Damm 6071461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin1_platform_data = { 608341eb546SMagnus Damm .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */ 609341eb546SMagnus Damm .control_parent = true, /* Disable spurious IRQ10 */ 610341eb546SMagnus Damm }; 611341eb546SMagnus Damm 612341eb546SMagnus Damm static struct resource irqpin1_resources[] = { 613341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ 614341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ 615341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ 616341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */ 617341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */ 618341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(9)), /* IRQ8 */ 619341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(10)), /* IRQ9 */ 620341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(11)), /* IRQ10 */ 621341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(12)), /* IRQ11 */ 622341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(13)), /* IRQ12 */ 623341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(14)), /* IRQ13 */ 624341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(15)), /* IRQ14 */ 625341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(16)), /* IRQ15 */ 626341eb546SMagnus Damm }; 627341eb546SMagnus Damm 628341eb546SMagnus Damm static struct platform_device irqpin1_device = { 629341eb546SMagnus Damm .name = "renesas_intc_irqpin", 630341eb546SMagnus Damm .id = 1, 631341eb546SMagnus Damm .resource = irqpin1_resources, 632341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin1_resources), 633341eb546SMagnus Damm .dev = { 634341eb546SMagnus Damm .platform_data = &irqpin1_platform_data, 635341eb546SMagnus Damm }, 636341eb546SMagnus Damm }; 637341eb546SMagnus Damm 6381461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin2_platform_data = { 639341eb546SMagnus Damm .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */ 640341eb546SMagnus Damm }; 641341eb546SMagnus Damm 642341eb546SMagnus Damm static struct resource irqpin2_resources[] = { 643341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */ 644341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI20A */ 645341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ20A */ 646341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK20A */ 647341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR20A */ 648341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(17)), /* IRQ16 */ 649341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(18)), /* IRQ17 */ 650341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(19)), /* IRQ18 */ 651341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(20)), /* IRQ19 */ 652341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(21)), /* IRQ20 */ 653341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(22)), /* IRQ21 */ 654341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(23)), /* IRQ22 */ 655341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(24)), /* IRQ23 */ 656341eb546SMagnus Damm }; 657341eb546SMagnus Damm 658341eb546SMagnus Damm static struct platform_device irqpin2_device = { 659341eb546SMagnus Damm .name = "renesas_intc_irqpin", 660341eb546SMagnus Damm .id = 2, 661341eb546SMagnus Damm .resource = irqpin2_resources, 662341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin2_resources), 663341eb546SMagnus Damm .dev = { 664341eb546SMagnus Damm .platform_data = &irqpin2_platform_data, 665341eb546SMagnus Damm }, 666341eb546SMagnus Damm }; 667341eb546SMagnus Damm 6681461f8b6SMagnus Damm static struct renesas_intc_irqpin_config irqpin3_platform_data = { 669341eb546SMagnus Damm .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */ 670341eb546SMagnus Damm }; 671341eb546SMagnus Damm 672341eb546SMagnus Damm static struct resource irqpin3_resources[] = { 673341eb546SMagnus Damm DEFINE_RES_MEM(0xe690000c, 4), /* ICR4A */ 674341eb546SMagnus Damm DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */ 675341eb546SMagnus Damm DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */ 676341eb546SMagnus Damm DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */ 677341eb546SMagnus Damm DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */ 678341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(25)), /* IRQ24 */ 679341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(26)), /* IRQ25 */ 680341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(27)), /* IRQ26 */ 681341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(28)), /* IRQ27 */ 682341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(29)), /* IRQ28 */ 683341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(30)), /* IRQ29 */ 684341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(31)), /* IRQ30 */ 685341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(32)), /* IRQ31 */ 686341eb546SMagnus Damm }; 687341eb546SMagnus Damm 688341eb546SMagnus Damm static struct platform_device irqpin3_device = { 689341eb546SMagnus Damm .name = "renesas_intc_irqpin", 690341eb546SMagnus Damm .id = 3, 691341eb546SMagnus Damm .resource = irqpin3_resources, 692341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin3_resources), 693341eb546SMagnus Damm .dev = { 694341eb546SMagnus Damm .platform_data = &irqpin3_platform_data, 695341eb546SMagnus Damm }, 696341eb546SMagnus Damm }; 697341eb546SMagnus Damm 6983b00f934SSimon Horman static struct platform_device *sh73a0_devices_dt[] __initdata = { 6996d9598e2SMagnus Damm &scif0_device, 7006d9598e2SMagnus Damm &scif1_device, 7016d9598e2SMagnus Damm &scif2_device, 7026d9598e2SMagnus Damm &scif3_device, 7036d9598e2SMagnus Damm &scif4_device, 7046d9598e2SMagnus Damm &scif5_device, 7056d9598e2SMagnus Damm &scif6_device, 7066d9598e2SMagnus Damm &scif7_device, 7076d9598e2SMagnus Damm &scif8_device, 708652256fdSLaurent Pinchart &cmt1_device, 70948609533SSimon Horman }; 71048609533SSimon Horman 71148609533SSimon Horman static struct platform_device *sh73a0_early_devices[] __initdata = { 7123df592bcSLaurent Pinchart &tmu0_device, 7139a27dee7SHideki EIRAKU &ipmmu_device, 7146d9598e2SMagnus Damm }; 7156d9598e2SMagnus Damm 716b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 717b028f94bSYoshii Takashi &i2c0_device, 718b028f94bSYoshii Takashi &i2c1_device, 719b028f94bSYoshii Takashi &i2c2_device, 720b028f94bSYoshii Takashi &i2c3_device, 721b028f94bSYoshii Takashi &i2c4_device, 722681e1b3eSMagnus Damm &dma0_device, 723832290b2SKuninori Morimoto &mpdma0_device, 724f23f5be0STetsuyuki Kobayashi &pmu_device, 725341eb546SMagnus Damm &irqpin0_device, 726341eb546SMagnus Damm &irqpin1_device, 727341eb546SMagnus Damm &irqpin2_device, 728341eb546SMagnus Damm &irqpin3_device, 729b028f94bSYoshii Takashi }; 730b028f94bSYoshii Takashi 7310a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 732681e1b3eSMagnus Damm 7336d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 7346d9598e2SMagnus Damm { 735681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 736681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 737681e1b3eSMagnus Damm 7383b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 7393b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 7406d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 7416d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 742b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 743b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 7446d9598e2SMagnus Damm } 7456d9598e2SMagnus Damm 74643cb8cb7SMagnus Damm void __init sh73a0_init_delay(void) 74743cb8cb7SMagnus Damm { 74843cb8cb7SMagnus Damm shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ 74943cb8cb7SMagnus Damm } 75043cb8cb7SMagnus Damm 751d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 752d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 753d6720003SKuninori Morimoto 7546bb27d73SStephen Warren void __init sh73a0_earlytimer_init(void) 7553be26fdbSMagnus Damm { 75643cb8cb7SMagnus Damm sh73a0_init_delay(); 7573be26fdbSMagnus Damm sh73a0_clock_init(); 7583be26fdbSMagnus Damm shmobile_earlytimer_init(); 759d6720003SKuninori Morimoto sh73a0_register_twd(); 7603be26fdbSMagnus Damm } 7613be26fdbSMagnus Damm 7626d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 7636d9598e2SMagnus Damm { 7643b00f934SSimon Horman early_platform_add_devices(sh73a0_devices_dt, 7653b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 7666d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 7676d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 76850e15c34SMagnus Damm 76950e15c34SMagnus Damm /* setup early console here as well */ 77050e15c34SMagnus Damm shmobile_setup_console(); 7716d9598e2SMagnus Damm } 77248609533SSimon Horman 77348609533SSimon Horman #ifdef CONFIG_USE_OF 77448609533SSimon Horman 77548609533SSimon Horman void __init sh73a0_add_standard_devices_dt(void) 77648609533SSimon Horman { 777d2347382SGuennadi Liakhovetski struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, }; 778d2347382SGuennadi Liakhovetski 77948609533SSimon Horman /* clocks are setup late during boot in the case of DT */ 78048609533SSimon Horman sh73a0_clock_init(); 78148609533SSimon Horman 7823b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 7833b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 784ea31597fSMagnus Damm of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 785d2347382SGuennadi Liakhovetski 786d2347382SGuennadi Liakhovetski /* Instantiate cpufreq-cpu0 */ 787d2347382SGuennadi Liakhovetski platform_device_register_full(&devinfo); 78848609533SSimon Horman } 78948609533SSimon Horman 79048609533SSimon Horman static const char *sh73a0_boards_compat_dt[] __initdata = { 79148609533SSimon Horman "renesas,sh73a0", 79248609533SSimon Horman NULL, 79348609533SSimon Horman }; 79448609533SSimon Horman 79548609533SSimon Horman DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") 796f9989507SSimon Horman .smp = smp_ops(sh73a0_smp_ops), 79748609533SSimon Horman .map_io = sh73a0_map_io, 7983b00f934SSimon Horman .init_early = sh73a0_init_delay, 79948609533SSimon Horman .nr_irqs = NR_IRQS_LEGACY, 80048609533SSimon Horman .init_machine = sh73a0_add_standard_devices_dt, 80148609533SSimon Horman .dt_compat = sh73a0_boards_compat_dt, 80248609533SSimon Horman MACHINE_END 80348609533SSimon Horman #endif /* CONFIG_USE_OF */ 804