16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 254eca134fSSimon Horman #include <linux/irqchip.h> 266d9598e2SMagnus Damm #include <linux/platform_device.h> 2748609533SSimon Horman #include <linux/of_platform.h> 286d9598e2SMagnus Damm #include <linux/delay.h> 296d9598e2SMagnus Damm #include <linux/input.h> 306d9598e2SMagnus Damm #include <linux/io.h> 316d9598e2SMagnus Damm #include <linux/serial_sci.h> 32681e1b3eSMagnus Damm #include <linux/sh_dma.h> 336d9598e2SMagnus Damm #include <linux/sh_intc.h> 346d9598e2SMagnus Damm #include <linux/sh_timer.h> 359a27dee7SHideki EIRAKU #include <linux/platform_data/sh_ipmmu.h> 366088b422SKuninori Morimoto #include <mach/dma-register.h> 376d9598e2SMagnus Damm #include <mach/hardware.h> 38250a2723SRob Herring #include <mach/irqs.h> 39681e1b3eSMagnus Damm #include <mach/sh73a0.h> 4050e15c34SMagnus Damm #include <mach/common.h> 416d9598e2SMagnus Damm #include <asm/mach-types.h> 4250e15c34SMagnus Damm #include <asm/mach/map.h> 436d9598e2SMagnus Damm #include <asm/mach/arch.h> 443be26fdbSMagnus Damm #include <asm/mach/time.h> 456d9598e2SMagnus Damm 4650e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4750e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4850e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4950e15c34SMagnus Damm */ 5050e15c34SMagnus Damm { 5150e15c34SMagnus Damm .virtual = 0xe6000000, 5250e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5350e15c34SMagnus Damm .length = 256 << 20, 5450e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5550e15c34SMagnus Damm }, 5650e15c34SMagnus Damm }; 5750e15c34SMagnus Damm 5850e15c34SMagnus Damm void __init sh73a0_map_io(void) 5950e15c34SMagnus Damm { 6050e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 6150e15c34SMagnus Damm } 6250e15c34SMagnus Damm 63994d66a4SLaurent Pinchart static struct resource sh73a0_pfc_resources[] = { 64994d66a4SLaurent Pinchart [0] = { 65994d66a4SLaurent Pinchart .start = 0xe6050000, 66994d66a4SLaurent Pinchart .end = 0xe6057fff, 67994d66a4SLaurent Pinchart .flags = IORESOURCE_MEM, 68994d66a4SLaurent Pinchart }, 69994d66a4SLaurent Pinchart [1] = { 70994d66a4SLaurent Pinchart .start = 0xe605801c, 71994d66a4SLaurent Pinchart .end = 0xe6058027, 72994d66a4SLaurent Pinchart .flags = IORESOURCE_MEM, 73994d66a4SLaurent Pinchart } 74994d66a4SLaurent Pinchart }; 75994d66a4SLaurent Pinchart 76994d66a4SLaurent Pinchart static struct platform_device sh73a0_pfc_device = { 77994d66a4SLaurent Pinchart .name = "pfc-sh73a0", 78994d66a4SLaurent Pinchart .id = -1, 79994d66a4SLaurent Pinchart .resource = sh73a0_pfc_resources, 80994d66a4SLaurent Pinchart .num_resources = ARRAY_SIZE(sh73a0_pfc_resources), 81994d66a4SLaurent Pinchart }; 82994d66a4SLaurent Pinchart 83994d66a4SLaurent Pinchart void __init sh73a0_pinmux_init(void) 84994d66a4SLaurent Pinchart { 85994d66a4SLaurent Pinchart platform_device_register(&sh73a0_pfc_device); 86994d66a4SLaurent Pinchart } 87994d66a4SLaurent Pinchart 886d9598e2SMagnus Damm static struct plat_sci_port scif0_platform_data = { 896d9598e2SMagnus Damm .mapbase = 0xe6c40000, 906d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 91f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 92f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 936d9598e2SMagnus Damm .type = PORT_SCIFA, 946d9598e2SMagnus Damm .irqs = { gic_spi(72), gic_spi(72), 956d9598e2SMagnus Damm gic_spi(72), gic_spi(72) }, 966d9598e2SMagnus Damm }; 976d9598e2SMagnus Damm 986d9598e2SMagnus Damm static struct platform_device scif0_device = { 996d9598e2SMagnus Damm .name = "sh-sci", 1006d9598e2SMagnus Damm .id = 0, 1016d9598e2SMagnus Damm .dev = { 1026d9598e2SMagnus Damm .platform_data = &scif0_platform_data, 1036d9598e2SMagnus Damm }, 1046d9598e2SMagnus Damm }; 1056d9598e2SMagnus Damm 1066d9598e2SMagnus Damm static struct plat_sci_port scif1_platform_data = { 1076d9598e2SMagnus Damm .mapbase = 0xe6c50000, 1086d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 109f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 110f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1116d9598e2SMagnus Damm .type = PORT_SCIFA, 1126d9598e2SMagnus Damm .irqs = { gic_spi(73), gic_spi(73), 1136d9598e2SMagnus Damm gic_spi(73), gic_spi(73) }, 1146d9598e2SMagnus Damm }; 1156d9598e2SMagnus Damm 1166d9598e2SMagnus Damm static struct platform_device scif1_device = { 1176d9598e2SMagnus Damm .name = "sh-sci", 1186d9598e2SMagnus Damm .id = 1, 1196d9598e2SMagnus Damm .dev = { 1206d9598e2SMagnus Damm .platform_data = &scif1_platform_data, 1216d9598e2SMagnus Damm }, 1226d9598e2SMagnus Damm }; 1236d9598e2SMagnus Damm 1246d9598e2SMagnus Damm static struct plat_sci_port scif2_platform_data = { 1256d9598e2SMagnus Damm .mapbase = 0xe6c60000, 1266d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 127f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 128f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1296d9598e2SMagnus Damm .type = PORT_SCIFA, 1306d9598e2SMagnus Damm .irqs = { gic_spi(74), gic_spi(74), 1316d9598e2SMagnus Damm gic_spi(74), gic_spi(74) }, 1326d9598e2SMagnus Damm }; 1336d9598e2SMagnus Damm 1346d9598e2SMagnus Damm static struct platform_device scif2_device = { 1356d9598e2SMagnus Damm .name = "sh-sci", 1366d9598e2SMagnus Damm .id = 2, 1376d9598e2SMagnus Damm .dev = { 1386d9598e2SMagnus Damm .platform_data = &scif2_platform_data, 1396d9598e2SMagnus Damm }, 1406d9598e2SMagnus Damm }; 1416d9598e2SMagnus Damm 1426d9598e2SMagnus Damm static struct plat_sci_port scif3_platform_data = { 1436d9598e2SMagnus Damm .mapbase = 0xe6c70000, 1446d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 145f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 146f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1476d9598e2SMagnus Damm .type = PORT_SCIFA, 1486d9598e2SMagnus Damm .irqs = { gic_spi(75), gic_spi(75), 1496d9598e2SMagnus Damm gic_spi(75), gic_spi(75) }, 1506d9598e2SMagnus Damm }; 1516d9598e2SMagnus Damm 1526d9598e2SMagnus Damm static struct platform_device scif3_device = { 1536d9598e2SMagnus Damm .name = "sh-sci", 1546d9598e2SMagnus Damm .id = 3, 1556d9598e2SMagnus Damm .dev = { 1566d9598e2SMagnus Damm .platform_data = &scif3_platform_data, 1576d9598e2SMagnus Damm }, 1586d9598e2SMagnus Damm }; 1596d9598e2SMagnus Damm 1606d9598e2SMagnus Damm static struct plat_sci_port scif4_platform_data = { 1616d9598e2SMagnus Damm .mapbase = 0xe6c80000, 1626d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 163f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 164f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1656d9598e2SMagnus Damm .type = PORT_SCIFA, 1666d9598e2SMagnus Damm .irqs = { gic_spi(78), gic_spi(78), 1676d9598e2SMagnus Damm gic_spi(78), gic_spi(78) }, 1686d9598e2SMagnus Damm }; 1696d9598e2SMagnus Damm 1706d9598e2SMagnus Damm static struct platform_device scif4_device = { 1716d9598e2SMagnus Damm .name = "sh-sci", 1726d9598e2SMagnus Damm .id = 4, 1736d9598e2SMagnus Damm .dev = { 1746d9598e2SMagnus Damm .platform_data = &scif4_platform_data, 1756d9598e2SMagnus Damm }, 1766d9598e2SMagnus Damm }; 1776d9598e2SMagnus Damm 1786d9598e2SMagnus Damm static struct plat_sci_port scif5_platform_data = { 1796d9598e2SMagnus Damm .mapbase = 0xe6cb0000, 1806d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 181f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 182f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1836d9598e2SMagnus Damm .type = PORT_SCIFA, 1846d9598e2SMagnus Damm .irqs = { gic_spi(79), gic_spi(79), 1856d9598e2SMagnus Damm gic_spi(79), gic_spi(79) }, 1866d9598e2SMagnus Damm }; 1876d9598e2SMagnus Damm 1886d9598e2SMagnus Damm static struct platform_device scif5_device = { 1896d9598e2SMagnus Damm .name = "sh-sci", 1906d9598e2SMagnus Damm .id = 5, 1916d9598e2SMagnus Damm .dev = { 1926d9598e2SMagnus Damm .platform_data = &scif5_platform_data, 1936d9598e2SMagnus Damm }, 1946d9598e2SMagnus Damm }; 1956d9598e2SMagnus Damm 1966d9598e2SMagnus Damm static struct plat_sci_port scif6_platform_data = { 1976d9598e2SMagnus Damm .mapbase = 0xe6cc0000, 1986d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 199f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 200f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2016d9598e2SMagnus Damm .type = PORT_SCIFA, 2026d9598e2SMagnus Damm .irqs = { gic_spi(156), gic_spi(156), 2036d9598e2SMagnus Damm gic_spi(156), gic_spi(156) }, 2046d9598e2SMagnus Damm }; 2056d9598e2SMagnus Damm 2066d9598e2SMagnus Damm static struct platform_device scif6_device = { 2076d9598e2SMagnus Damm .name = "sh-sci", 2086d9598e2SMagnus Damm .id = 6, 2096d9598e2SMagnus Damm .dev = { 2106d9598e2SMagnus Damm .platform_data = &scif6_platform_data, 2116d9598e2SMagnus Damm }, 2126d9598e2SMagnus Damm }; 2136d9598e2SMagnus Damm 2146d9598e2SMagnus Damm static struct plat_sci_port scif7_platform_data = { 2156d9598e2SMagnus Damm .mapbase = 0xe6cd0000, 2166d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 217f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 218f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2196d9598e2SMagnus Damm .type = PORT_SCIFA, 2206d9598e2SMagnus Damm .irqs = { gic_spi(143), gic_spi(143), 2216d9598e2SMagnus Damm gic_spi(143), gic_spi(143) }, 2226d9598e2SMagnus Damm }; 2236d9598e2SMagnus Damm 2246d9598e2SMagnus Damm static struct platform_device scif7_device = { 2256d9598e2SMagnus Damm .name = "sh-sci", 2266d9598e2SMagnus Damm .id = 7, 2276d9598e2SMagnus Damm .dev = { 2286d9598e2SMagnus Damm .platform_data = &scif7_platform_data, 2296d9598e2SMagnus Damm }, 2306d9598e2SMagnus Damm }; 2316d9598e2SMagnus Damm 2326d9598e2SMagnus Damm static struct plat_sci_port scif8_platform_data = { 2336d9598e2SMagnus Damm .mapbase = 0xe6c30000, 2346d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 235f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 236f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2376d9598e2SMagnus Damm .type = PORT_SCIFB, 2386d9598e2SMagnus Damm .irqs = { gic_spi(80), gic_spi(80), 2396d9598e2SMagnus Damm gic_spi(80), gic_spi(80) }, 2406d9598e2SMagnus Damm }; 2416d9598e2SMagnus Damm 2426d9598e2SMagnus Damm static struct platform_device scif8_device = { 2436d9598e2SMagnus Damm .name = "sh-sci", 2446d9598e2SMagnus Damm .id = 8, 2456d9598e2SMagnus Damm .dev = { 2466d9598e2SMagnus Damm .platform_data = &scif8_platform_data, 2476d9598e2SMagnus Damm }, 2486d9598e2SMagnus Damm }; 2496d9598e2SMagnus Damm 2506d9598e2SMagnus Damm static struct sh_timer_config cmt10_platform_data = { 2516d9598e2SMagnus Damm .name = "CMT10", 2526d9598e2SMagnus Damm .channel_offset = 0x10, 2536d9598e2SMagnus Damm .timer_bit = 0, 2546d9598e2SMagnus Damm .clockevent_rating = 125, 2556d9598e2SMagnus Damm .clocksource_rating = 125, 2566d9598e2SMagnus Damm }; 2576d9598e2SMagnus Damm 2586d9598e2SMagnus Damm static struct resource cmt10_resources[] = { 2596d9598e2SMagnus Damm [0] = { 2606d9598e2SMagnus Damm .name = "CMT10", 2616d9598e2SMagnus Damm .start = 0xe6138010, 2626d9598e2SMagnus Damm .end = 0xe613801b, 2636d9598e2SMagnus Damm .flags = IORESOURCE_MEM, 2646d9598e2SMagnus Damm }, 2656d9598e2SMagnus Damm [1] = { 2666d9598e2SMagnus Damm .start = gic_spi(65), 2676d9598e2SMagnus Damm .flags = IORESOURCE_IRQ, 2686d9598e2SMagnus Damm }, 2696d9598e2SMagnus Damm }; 2706d9598e2SMagnus Damm 2716d9598e2SMagnus Damm static struct platform_device cmt10_device = { 2726d9598e2SMagnus Damm .name = "sh_cmt", 2736d9598e2SMagnus Damm .id = 10, 2746d9598e2SMagnus Damm .dev = { 2756d9598e2SMagnus Damm .platform_data = &cmt10_platform_data, 2766d9598e2SMagnus Damm }, 2776d9598e2SMagnus Damm .resource = cmt10_resources, 2786d9598e2SMagnus Damm .num_resources = ARRAY_SIZE(cmt10_resources), 2796d9598e2SMagnus Damm }; 2806d9598e2SMagnus Damm 2815010f3dbSMagnus Damm /* TMU */ 2825010f3dbSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 2835010f3dbSMagnus Damm .name = "TMU00", 2845010f3dbSMagnus Damm .channel_offset = 0x4, 2855010f3dbSMagnus Damm .timer_bit = 0, 2865010f3dbSMagnus Damm .clockevent_rating = 200, 2875010f3dbSMagnus Damm }; 2885010f3dbSMagnus Damm 2895010f3dbSMagnus Damm static struct resource tmu00_resources[] = { 2905010f3dbSMagnus Damm [0] = { 2915010f3dbSMagnus Damm .name = "TMU00", 2925010f3dbSMagnus Damm .start = 0xfff60008, 2935010f3dbSMagnus Damm .end = 0xfff60013, 2945010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 2955010f3dbSMagnus Damm }, 2965010f3dbSMagnus Damm [1] = { 2975010f3dbSMagnus Damm .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ 2985010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 2995010f3dbSMagnus Damm }, 3005010f3dbSMagnus Damm }; 3015010f3dbSMagnus Damm 3025010f3dbSMagnus Damm static struct platform_device tmu00_device = { 3035010f3dbSMagnus Damm .name = "sh_tmu", 3045010f3dbSMagnus Damm .id = 0, 3055010f3dbSMagnus Damm .dev = { 3065010f3dbSMagnus Damm .platform_data = &tmu00_platform_data, 3075010f3dbSMagnus Damm }, 3085010f3dbSMagnus Damm .resource = tmu00_resources, 3095010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 3105010f3dbSMagnus Damm }; 3115010f3dbSMagnus Damm 3125010f3dbSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 3135010f3dbSMagnus Damm .name = "TMU01", 3145010f3dbSMagnus Damm .channel_offset = 0x10, 3155010f3dbSMagnus Damm .timer_bit = 1, 3165010f3dbSMagnus Damm .clocksource_rating = 200, 3175010f3dbSMagnus Damm }; 3185010f3dbSMagnus Damm 3195010f3dbSMagnus Damm static struct resource tmu01_resources[] = { 3205010f3dbSMagnus Damm [0] = { 3215010f3dbSMagnus Damm .name = "TMU01", 3225010f3dbSMagnus Damm .start = 0xfff60014, 3235010f3dbSMagnus Damm .end = 0xfff6001f, 3245010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 3255010f3dbSMagnus Damm }, 3265010f3dbSMagnus Damm [1] = { 3275010f3dbSMagnus Damm .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ 3285010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 3295010f3dbSMagnus Damm }, 3305010f3dbSMagnus Damm }; 3315010f3dbSMagnus Damm 3325010f3dbSMagnus Damm static struct platform_device tmu01_device = { 3335010f3dbSMagnus Damm .name = "sh_tmu", 3345010f3dbSMagnus Damm .id = 1, 3355010f3dbSMagnus Damm .dev = { 3365010f3dbSMagnus Damm .platform_data = &tmu01_platform_data, 3375010f3dbSMagnus Damm }, 3385010f3dbSMagnus Damm .resource = tmu01_resources, 3395010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 3405010f3dbSMagnus Damm }; 3415010f3dbSMagnus Damm 342b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 343b028f94bSYoshii Takashi [0] = { 344b028f94bSYoshii Takashi .name = "IIC0", 345b028f94bSYoshii Takashi .start = 0xe6820000, 346b028f94bSYoshii Takashi .end = 0xe6820425 - 1, 347b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 348b028f94bSYoshii Takashi }, 349b028f94bSYoshii Takashi [1] = { 350b028f94bSYoshii Takashi .start = gic_spi(167), 351b028f94bSYoshii Takashi .end = gic_spi(170), 352b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 353b028f94bSYoshii Takashi }, 354b028f94bSYoshii Takashi }; 355b028f94bSYoshii Takashi 356b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 357b028f94bSYoshii Takashi [0] = { 358b028f94bSYoshii Takashi .name = "IIC1", 359b028f94bSYoshii Takashi .start = 0xe6822000, 360b028f94bSYoshii Takashi .end = 0xe6822425 - 1, 361b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 362b028f94bSYoshii Takashi }, 363b028f94bSYoshii Takashi [1] = { 364b028f94bSYoshii Takashi .start = gic_spi(51), 365b028f94bSYoshii Takashi .end = gic_spi(54), 366b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 367b028f94bSYoshii Takashi }, 368b028f94bSYoshii Takashi }; 369b028f94bSYoshii Takashi 370b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 371b028f94bSYoshii Takashi [0] = { 372b028f94bSYoshii Takashi .name = "IIC2", 373b028f94bSYoshii Takashi .start = 0xe6824000, 374b028f94bSYoshii Takashi .end = 0xe6824425 - 1, 375b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 376b028f94bSYoshii Takashi }, 377b028f94bSYoshii Takashi [1] = { 378b028f94bSYoshii Takashi .start = gic_spi(171), 379b028f94bSYoshii Takashi .end = gic_spi(174), 380b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 381b028f94bSYoshii Takashi }, 382b028f94bSYoshii Takashi }; 383b028f94bSYoshii Takashi 384b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 385b028f94bSYoshii Takashi [0] = { 386b028f94bSYoshii Takashi .name = "IIC3", 387b028f94bSYoshii Takashi .start = 0xe6826000, 388b028f94bSYoshii Takashi .end = 0xe6826425 - 1, 389b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 390b028f94bSYoshii Takashi }, 391b028f94bSYoshii Takashi [1] = { 392b028f94bSYoshii Takashi .start = gic_spi(183), 393b028f94bSYoshii Takashi .end = gic_spi(186), 394b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 395b028f94bSYoshii Takashi }, 396b028f94bSYoshii Takashi }; 397b028f94bSYoshii Takashi 398b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 399b028f94bSYoshii Takashi [0] = { 400b028f94bSYoshii Takashi .name = "IIC4", 401b028f94bSYoshii Takashi .start = 0xe6828000, 402b028f94bSYoshii Takashi .end = 0xe6828425 - 1, 403b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 404b028f94bSYoshii Takashi }, 405b028f94bSYoshii Takashi [1] = { 406b028f94bSYoshii Takashi .start = gic_spi(187), 407b028f94bSYoshii Takashi .end = gic_spi(190), 408b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 409b028f94bSYoshii Takashi }, 410b028f94bSYoshii Takashi }; 411b028f94bSYoshii Takashi 412b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 413b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 414b028f94bSYoshii Takashi .id = 0, 415b028f94bSYoshii Takashi .resource = i2c0_resources, 416b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 417b028f94bSYoshii Takashi }; 418b028f94bSYoshii Takashi 419b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 420b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 421b028f94bSYoshii Takashi .id = 1, 422b028f94bSYoshii Takashi .resource = i2c1_resources, 423b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 424b028f94bSYoshii Takashi }; 425b028f94bSYoshii Takashi 426b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 427b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 428b028f94bSYoshii Takashi .id = 2, 429b028f94bSYoshii Takashi .resource = i2c2_resources, 430b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 431b028f94bSYoshii Takashi }; 432b028f94bSYoshii Takashi 433b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 434b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 435b028f94bSYoshii Takashi .id = 3, 436b028f94bSYoshii Takashi .resource = i2c3_resources, 437b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 438b028f94bSYoshii Takashi }; 439b028f94bSYoshii Takashi 440b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 441b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 442b028f94bSYoshii Takashi .id = 4, 443b028f94bSYoshii Takashi .resource = i2c4_resources, 444b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 445b028f94bSYoshii Takashi }; 446b028f94bSYoshii Takashi 447681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 448681e1b3eSMagnus Damm { 449681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 450681e1b3eSMagnus Damm .addr = 0xe6c40020, 451681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 452681e1b3eSMagnus Damm .mid_rid = 0x21, 453681e1b3eSMagnus Damm }, { 454681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 455681e1b3eSMagnus Damm .addr = 0xe6c40024, 456681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 457681e1b3eSMagnus Damm .mid_rid = 0x22, 458681e1b3eSMagnus Damm }, { 459681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 460681e1b3eSMagnus Damm .addr = 0xe6c50020, 461681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 462681e1b3eSMagnus Damm .mid_rid = 0x25, 463681e1b3eSMagnus Damm }, { 464681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 465681e1b3eSMagnus Damm .addr = 0xe6c50024, 466681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 467681e1b3eSMagnus Damm .mid_rid = 0x26, 468681e1b3eSMagnus Damm }, { 469681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 470681e1b3eSMagnus Damm .addr = 0xe6c60020, 471681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 472681e1b3eSMagnus Damm .mid_rid = 0x29, 473681e1b3eSMagnus Damm }, { 474681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 475681e1b3eSMagnus Damm .addr = 0xe6c60024, 476681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 477681e1b3eSMagnus Damm .mid_rid = 0x2a, 478681e1b3eSMagnus Damm }, { 479681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 480681e1b3eSMagnus Damm .addr = 0xe6c70020, 481681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 482681e1b3eSMagnus Damm .mid_rid = 0x2d, 483681e1b3eSMagnus Damm }, { 484681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 485681e1b3eSMagnus Damm .addr = 0xe6c70024, 486681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 487681e1b3eSMagnus Damm .mid_rid = 0x2e, 488681e1b3eSMagnus Damm }, { 489681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 490681e1b3eSMagnus Damm .addr = 0xe6c80020, 491681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 492681e1b3eSMagnus Damm .mid_rid = 0x39, 493681e1b3eSMagnus Damm }, { 494681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 495681e1b3eSMagnus Damm .addr = 0xe6c80024, 496681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 497681e1b3eSMagnus Damm .mid_rid = 0x3a, 498681e1b3eSMagnus Damm }, { 499681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 500681e1b3eSMagnus Damm .addr = 0xe6cb0020, 501681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 502681e1b3eSMagnus Damm .mid_rid = 0x35, 503681e1b3eSMagnus Damm }, { 504681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 505681e1b3eSMagnus Damm .addr = 0xe6cb0024, 506681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 507681e1b3eSMagnus Damm .mid_rid = 0x36, 508681e1b3eSMagnus Damm }, { 509681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 510681e1b3eSMagnus Damm .addr = 0xe6cc0020, 511681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 512681e1b3eSMagnus Damm .mid_rid = 0x1d, 513681e1b3eSMagnus Damm }, { 514681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 515681e1b3eSMagnus Damm .addr = 0xe6cc0024, 516681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 517681e1b3eSMagnus Damm .mid_rid = 0x1e, 518681e1b3eSMagnus Damm }, { 519681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 520681e1b3eSMagnus Damm .addr = 0xe6cd0020, 521681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 522681e1b3eSMagnus Damm .mid_rid = 0x19, 523681e1b3eSMagnus Damm }, { 524681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 525681e1b3eSMagnus Damm .addr = 0xe6cd0024, 526681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 527681e1b3eSMagnus Damm .mid_rid = 0x1a, 528681e1b3eSMagnus Damm }, { 529681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 530681e1b3eSMagnus Damm .addr = 0xe6c30040, 531681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 532681e1b3eSMagnus Damm .mid_rid = 0x3d, 533681e1b3eSMagnus Damm }, { 534681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 535681e1b3eSMagnus Damm .addr = 0xe6c30060, 536681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 537681e1b3eSMagnus Damm .mid_rid = 0x3e, 538681e1b3eSMagnus Damm }, { 539681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 540681e1b3eSMagnus Damm .addr = 0xee100030, 541681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 542681e1b3eSMagnus Damm .mid_rid = 0xc1, 543681e1b3eSMagnus Damm }, { 544681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 545681e1b3eSMagnus Damm .addr = 0xee100030, 546681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 547681e1b3eSMagnus Damm .mid_rid = 0xc2, 548681e1b3eSMagnus Damm }, { 549681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 550681e1b3eSMagnus Damm .addr = 0xee120030, 551681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 552681e1b3eSMagnus Damm .mid_rid = 0xc9, 553681e1b3eSMagnus Damm }, { 554681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 555681e1b3eSMagnus Damm .addr = 0xee120030, 556681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 557681e1b3eSMagnus Damm .mid_rid = 0xca, 558681e1b3eSMagnus Damm }, { 559681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 560681e1b3eSMagnus Damm .addr = 0xee140030, 561681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 562681e1b3eSMagnus Damm .mid_rid = 0xcd, 563681e1b3eSMagnus Damm }, { 564681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 565681e1b3eSMagnus Damm .addr = 0xee140030, 566681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 567681e1b3eSMagnus Damm .mid_rid = 0xce, 568681e1b3eSMagnus Damm }, { 569681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 570681e1b3eSMagnus Damm .addr = 0xe6bd0034, 571681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 572681e1b3eSMagnus Damm .mid_rid = 0xd1, 573681e1b3eSMagnus Damm }, { 574681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 575681e1b3eSMagnus Damm .addr = 0xe6bd0034, 576681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 577681e1b3eSMagnus Damm .mid_rid = 0xd2, 578681e1b3eSMagnus Damm }, 579681e1b3eSMagnus Damm }; 580681e1b3eSMagnus Damm 581681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 582681e1b3eSMagnus Damm { \ 583681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 584681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 585681e1b3eSMagnus Damm } 586681e1b3eSMagnus Damm 587681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 588681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 589681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 590681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 591681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 592681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 593681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 594681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 595681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 596681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 597681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 598681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 599681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 600681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 601681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 602681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 603681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 604681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 605681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 606681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 607681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 608681e1b3eSMagnus Damm }; 609681e1b3eSMagnus Damm 610681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 611681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 612681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 613681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 614681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 6156088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 6166088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 6176088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 6186088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 6196088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 6206088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 621681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 622681e1b3eSMagnus Damm }; 623681e1b3eSMagnus Damm 624681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 625681e1b3eSMagnus Damm { 626681e1b3eSMagnus Damm /* Registers including DMAOR and channels including DMARSx */ 627681e1b3eSMagnus Damm .start = 0xfe000020, 628681e1b3eSMagnus Damm .end = 0xfe008a00 - 1, 629681e1b3eSMagnus Damm .flags = IORESOURCE_MEM, 630681e1b3eSMagnus Damm }, 631681e1b3eSMagnus Damm { 63220052462SShimoda, Yoshihiro .name = "error_irq", 633681e1b3eSMagnus Damm .start = gic_spi(129), 634681e1b3eSMagnus Damm .end = gic_spi(129), 635681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 636681e1b3eSMagnus Damm }, 637681e1b3eSMagnus Damm { 638681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 639681e1b3eSMagnus Damm .start = gic_spi(109), 640681e1b3eSMagnus Damm .end = gic_spi(128), 641681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 642681e1b3eSMagnus Damm }, 643681e1b3eSMagnus Damm }; 644681e1b3eSMagnus Damm 645681e1b3eSMagnus Damm static struct platform_device dma0_device = { 646681e1b3eSMagnus Damm .name = "sh-dma-engine", 647681e1b3eSMagnus Damm .id = 0, 648681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 649681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 650681e1b3eSMagnus Damm .dev = { 651681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 652681e1b3eSMagnus Damm }, 653681e1b3eSMagnus Damm }; 654681e1b3eSMagnus Damm 655832290b2SKuninori Morimoto /* MPDMAC */ 656832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 657832290b2SKuninori Morimoto { 658832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 659832290b2SKuninori Morimoto .addr = 0xec230020, 660832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 661832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 662832290b2SKuninori Morimoto }, { 663832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 664832290b2SKuninori Morimoto .addr = 0xec230024, 665832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 666832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 667832290b2SKuninori Morimoto }, { 668832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 669832290b2SKuninori Morimoto .addr = 0xec230060, 670832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 671832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 672832290b2SKuninori Morimoto }, { 673832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 674832290b2SKuninori Morimoto .addr = 0xec230064, 675832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 676832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 677832290b2SKuninori Morimoto }, { 678832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 679832290b2SKuninori Morimoto .addr = 0xec240020, 680832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 681832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 682832290b2SKuninori Morimoto }, { 683832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 684832290b2SKuninori Morimoto .addr = 0xec240024, 685832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 686832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 687832290b2SKuninori Morimoto }, { 688832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 689832290b2SKuninori Morimoto .addr = 0xec240060, 690832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 691832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 692832290b2SKuninori Morimoto }, 693832290b2SKuninori Morimoto }; 694832290b2SKuninori Morimoto 695832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 696832290b2SKuninori Morimoto { \ 697832290b2SKuninori Morimoto .offset = a, \ 698832290b2SKuninori Morimoto .dmars = b, \ 699832290b2SKuninori Morimoto .dmars_bit = c, \ 700832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 701832290b2SKuninori Morimoto } 702832290b2SKuninori Morimoto 703832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 704832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 705832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 706832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 707832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 708832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 709832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 710832290b2SKuninori Morimoto }; 711832290b2SKuninori Morimoto 712832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 713832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 714832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 715832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 716832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 7176088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 7186088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 7196088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 7206088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 7216088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 7226088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 723832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 724832290b2SKuninori Morimoto .chclr_present = 1, 725832290b2SKuninori Morimoto }; 726832290b2SKuninori Morimoto 727832290b2SKuninori Morimoto /* Resource order important! */ 728832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 729832290b2SKuninori Morimoto { 730832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 731832290b2SKuninori Morimoto .start = 0xec618020, 732832290b2SKuninori Morimoto .end = 0xec61828f, 733832290b2SKuninori Morimoto .flags = IORESOURCE_MEM, 734832290b2SKuninori Morimoto }, 735832290b2SKuninori Morimoto { 736832290b2SKuninori Morimoto /* DMARSx */ 737832290b2SKuninori Morimoto .start = 0xec619000, 738832290b2SKuninori Morimoto .end = 0xec61900b, 739832290b2SKuninori Morimoto .flags = IORESOURCE_MEM, 740832290b2SKuninori Morimoto }, 741832290b2SKuninori Morimoto { 742832290b2SKuninori Morimoto .name = "error_irq", 743832290b2SKuninori Morimoto .start = gic_spi(181), 744832290b2SKuninori Morimoto .end = gic_spi(181), 745832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 746832290b2SKuninori Morimoto }, 747832290b2SKuninori Morimoto { 748832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 749832290b2SKuninori Morimoto .start = gic_spi(175), 750832290b2SKuninori Morimoto .end = gic_spi(180), 751832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 752832290b2SKuninori Morimoto }, 753832290b2SKuninori Morimoto }; 754832290b2SKuninori Morimoto 755832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 756832290b2SKuninori Morimoto .name = "sh-dma-engine", 757832290b2SKuninori Morimoto .id = 1, 758832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 759832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 760832290b2SKuninori Morimoto .dev = { 761832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 762832290b2SKuninori Morimoto }, 763832290b2SKuninori Morimoto }; 764832290b2SKuninori Morimoto 765f23f5be0STetsuyuki Kobayashi static struct resource pmu_resources[] = { 766f23f5be0STetsuyuki Kobayashi [0] = { 767f23f5be0STetsuyuki Kobayashi .start = gic_spi(55), 768f23f5be0STetsuyuki Kobayashi .end = gic_spi(55), 769f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 770f23f5be0STetsuyuki Kobayashi }, 771f23f5be0STetsuyuki Kobayashi [1] = { 772f23f5be0STetsuyuki Kobayashi .start = gic_spi(56), 773f23f5be0STetsuyuki Kobayashi .end = gic_spi(56), 774f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 775f23f5be0STetsuyuki Kobayashi }, 776f23f5be0STetsuyuki Kobayashi }; 777f23f5be0STetsuyuki Kobayashi 778f23f5be0STetsuyuki Kobayashi static struct platform_device pmu_device = { 779f23f5be0STetsuyuki Kobayashi .name = "arm-pmu", 780f23f5be0STetsuyuki Kobayashi .id = -1, 781f23f5be0STetsuyuki Kobayashi .num_resources = ARRAY_SIZE(pmu_resources), 782f23f5be0STetsuyuki Kobayashi .resource = pmu_resources, 783f23f5be0STetsuyuki Kobayashi }; 784f23f5be0STetsuyuki Kobayashi 7859a27dee7SHideki EIRAKU /* an IPMMU module for ICB */ 7869a27dee7SHideki EIRAKU static struct resource ipmmu_resources[] = { 7879a27dee7SHideki EIRAKU [0] = { 7889a27dee7SHideki EIRAKU .name = "IPMMU", 7899a27dee7SHideki EIRAKU .start = 0xfe951000, 7909a27dee7SHideki EIRAKU .end = 0xfe9510ff, 7919a27dee7SHideki EIRAKU .flags = IORESOURCE_MEM, 7929a27dee7SHideki EIRAKU }, 7939a27dee7SHideki EIRAKU }; 7949a27dee7SHideki EIRAKU 7959a27dee7SHideki EIRAKU static const char * const ipmmu_dev_names[] = { 7969a27dee7SHideki EIRAKU "sh_mobile_lcdc_fb.0", 7979a27dee7SHideki EIRAKU }; 7989a27dee7SHideki EIRAKU 7999a27dee7SHideki EIRAKU static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { 8009a27dee7SHideki EIRAKU .dev_names = ipmmu_dev_names, 8019a27dee7SHideki EIRAKU .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), 8029a27dee7SHideki EIRAKU }; 8039a27dee7SHideki EIRAKU 8049a27dee7SHideki EIRAKU static struct platform_device ipmmu_device = { 8059a27dee7SHideki EIRAKU .name = "ipmmu", 8069a27dee7SHideki EIRAKU .id = -1, 8079a27dee7SHideki EIRAKU .dev = { 8089a27dee7SHideki EIRAKU .platform_data = &ipmmu_platform_data, 8099a27dee7SHideki EIRAKU }, 8109a27dee7SHideki EIRAKU .resource = ipmmu_resources, 8119a27dee7SHideki EIRAKU .num_resources = ARRAY_SIZE(ipmmu_resources), 8129a27dee7SHideki EIRAKU }; 8139a27dee7SHideki EIRAKU 8143b00f934SSimon Horman static struct platform_device *sh73a0_devices_dt[] __initdata = { 8156d9598e2SMagnus Damm &scif0_device, 8166d9598e2SMagnus Damm &scif1_device, 8176d9598e2SMagnus Damm &scif2_device, 8186d9598e2SMagnus Damm &scif3_device, 8196d9598e2SMagnus Damm &scif4_device, 8206d9598e2SMagnus Damm &scif5_device, 8216d9598e2SMagnus Damm &scif6_device, 8226d9598e2SMagnus Damm &scif7_device, 8236d9598e2SMagnus Damm &scif8_device, 8246d9598e2SMagnus Damm &cmt10_device, 82548609533SSimon Horman }; 82648609533SSimon Horman 82748609533SSimon Horman static struct platform_device *sh73a0_early_devices[] __initdata = { 8285010f3dbSMagnus Damm &tmu00_device, 8295010f3dbSMagnus Damm &tmu01_device, 8309a27dee7SHideki EIRAKU &ipmmu_device, 8316d9598e2SMagnus Damm }; 8326d9598e2SMagnus Damm 833b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 834b028f94bSYoshii Takashi &i2c0_device, 835b028f94bSYoshii Takashi &i2c1_device, 836b028f94bSYoshii Takashi &i2c2_device, 837b028f94bSYoshii Takashi &i2c3_device, 838b028f94bSYoshii Takashi &i2c4_device, 839681e1b3eSMagnus Damm &dma0_device, 840832290b2SKuninori Morimoto &mpdma0_device, 841f23f5be0STetsuyuki Kobayashi &pmu_device, 842b028f94bSYoshii Takashi }; 843b028f94bSYoshii Takashi 8440a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 845681e1b3eSMagnus Damm 8466d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 8476d9598e2SMagnus Damm { 848681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 849681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 850681e1b3eSMagnus Damm 8513b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 8523b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 8536d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 8546d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 855b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 856b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 8576d9598e2SMagnus Damm } 8586d9598e2SMagnus Damm 859d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 860d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 861d6720003SKuninori Morimoto 8626bb27d73SStephen Warren void __init sh73a0_earlytimer_init(void) 8633be26fdbSMagnus Damm { 8643be26fdbSMagnus Damm sh73a0_clock_init(); 8653be26fdbSMagnus Damm shmobile_earlytimer_init(); 866d6720003SKuninori Morimoto sh73a0_register_twd(); 8673be26fdbSMagnus Damm } 8683be26fdbSMagnus Damm 8696d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 8706d9598e2SMagnus Damm { 8713b00f934SSimon Horman early_platform_add_devices(sh73a0_devices_dt, 8723b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 8736d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 8746d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 87550e15c34SMagnus Damm 87650e15c34SMagnus Damm /* setup early console here as well */ 87750e15c34SMagnus Damm shmobile_setup_console(); 8786d9598e2SMagnus Damm } 87948609533SSimon Horman 88048609533SSimon Horman #ifdef CONFIG_USE_OF 88148609533SSimon Horman 8823b00f934SSimon Horman void __init sh73a0_init_delay(void) 88348609533SSimon Horman { 88448609533SSimon Horman shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ 88548609533SSimon Horman } 88648609533SSimon Horman 88748609533SSimon Horman static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = { 88848609533SSimon Horman {}, 88948609533SSimon Horman }; 89048609533SSimon Horman 89148609533SSimon Horman void __init sh73a0_add_standard_devices_dt(void) 89248609533SSimon Horman { 89348609533SSimon Horman /* clocks are setup late during boot in the case of DT */ 89448609533SSimon Horman sh73a0_clock_init(); 89548609533SSimon Horman 8963b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 8973b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 89848609533SSimon Horman of_platform_populate(NULL, of_default_bus_match_table, 89948609533SSimon Horman sh73a0_auxdata_lookup, NULL); 90048609533SSimon Horman } 90148609533SSimon Horman 90248609533SSimon Horman static const char *sh73a0_boards_compat_dt[] __initdata = { 90348609533SSimon Horman "renesas,sh73a0", 90448609533SSimon Horman NULL, 90548609533SSimon Horman }; 90648609533SSimon Horman 90748609533SSimon Horman DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") 908f9989507SSimon Horman .smp = smp_ops(sh73a0_smp_ops), 90948609533SSimon Horman .map_io = sh73a0_map_io, 9103b00f934SSimon Horman .init_early = sh73a0_init_delay, 91148609533SSimon Horman .nr_irqs = NR_IRQS_LEGACY, 9124eca134fSSimon Horman .init_irq = irqchip_init, 91348609533SSimon Horman .init_machine = sh73a0_add_standard_devices_dt, 91448609533SSimon Horman .init_time = shmobile_timer_init, 91548609533SSimon Horman .dt_compat = sh73a0_boards_compat_dt, 91648609533SSimon Horman MACHINE_END 91748609533SSimon Horman #endif /* CONFIG_USE_OF */ 918