16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 254eca134fSSimon Horman #include <linux/irqchip.h> 266d9598e2SMagnus Damm #include <linux/platform_device.h> 2748609533SSimon Horman #include <linux/of_platform.h> 286d9598e2SMagnus Damm #include <linux/delay.h> 296d9598e2SMagnus Damm #include <linux/input.h> 306d9598e2SMagnus Damm #include <linux/io.h> 316d9598e2SMagnus Damm #include <linux/serial_sci.h> 32681e1b3eSMagnus Damm #include <linux/sh_dma.h> 336d9598e2SMagnus Damm #include <linux/sh_intc.h> 346d9598e2SMagnus Damm #include <linux/sh_timer.h> 359a27dee7SHideki EIRAKU #include <linux/platform_data/sh_ipmmu.h> 36341eb546SMagnus Damm #include <linux/platform_data/irq-renesas-intc-irqpin.h> 376088b422SKuninori Morimoto #include <mach/dma-register.h> 386d9598e2SMagnus Damm #include <mach/hardware.h> 39250a2723SRob Herring #include <mach/irqs.h> 40681e1b3eSMagnus Damm #include <mach/sh73a0.h> 4150e15c34SMagnus Damm #include <mach/common.h> 426d9598e2SMagnus Damm #include <asm/mach-types.h> 4350e15c34SMagnus Damm #include <asm/mach/map.h> 446d9598e2SMagnus Damm #include <asm/mach/arch.h> 453be26fdbSMagnus Damm #include <asm/mach/time.h> 466d9598e2SMagnus Damm 4750e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4850e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4950e15c34SMagnus Damm * used by CPGA, INTC and PFC. 5050e15c34SMagnus Damm */ 5150e15c34SMagnus Damm { 5250e15c34SMagnus Damm .virtual = 0xe6000000, 5350e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5450e15c34SMagnus Damm .length = 256 << 20, 5550e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5650e15c34SMagnus Damm }, 5750e15c34SMagnus Damm }; 5850e15c34SMagnus Damm 5950e15c34SMagnus Damm void __init sh73a0_map_io(void) 6050e15c34SMagnus Damm { 6150e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 6250e15c34SMagnus Damm } 6350e15c34SMagnus Damm 64994d66a4SLaurent Pinchart static struct resource sh73a0_pfc_resources[] = { 65994d66a4SLaurent Pinchart [0] = { 66994d66a4SLaurent Pinchart .start = 0xe6050000, 67994d66a4SLaurent Pinchart .end = 0xe6057fff, 68994d66a4SLaurent Pinchart .flags = IORESOURCE_MEM, 69994d66a4SLaurent Pinchart }, 70994d66a4SLaurent Pinchart [1] = { 71994d66a4SLaurent Pinchart .start = 0xe605801c, 72994d66a4SLaurent Pinchart .end = 0xe6058027, 73994d66a4SLaurent Pinchart .flags = IORESOURCE_MEM, 74994d66a4SLaurent Pinchart } 75994d66a4SLaurent Pinchart }; 76994d66a4SLaurent Pinchart 77994d66a4SLaurent Pinchart static struct platform_device sh73a0_pfc_device = { 78994d66a4SLaurent Pinchart .name = "pfc-sh73a0", 79994d66a4SLaurent Pinchart .id = -1, 80994d66a4SLaurent Pinchart .resource = sh73a0_pfc_resources, 81994d66a4SLaurent Pinchart .num_resources = ARRAY_SIZE(sh73a0_pfc_resources), 82994d66a4SLaurent Pinchart }; 83994d66a4SLaurent Pinchart 84994d66a4SLaurent Pinchart void __init sh73a0_pinmux_init(void) 85994d66a4SLaurent Pinchart { 86994d66a4SLaurent Pinchart platform_device_register(&sh73a0_pfc_device); 87994d66a4SLaurent Pinchart } 88994d66a4SLaurent Pinchart 896d9598e2SMagnus Damm static struct plat_sci_port scif0_platform_data = { 906d9598e2SMagnus Damm .mapbase = 0xe6c40000, 916d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 92f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 93f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 946d9598e2SMagnus Damm .type = PORT_SCIFA, 956d9598e2SMagnus Damm .irqs = { gic_spi(72), gic_spi(72), 966d9598e2SMagnus Damm gic_spi(72), gic_spi(72) }, 976d9598e2SMagnus Damm }; 986d9598e2SMagnus Damm 996d9598e2SMagnus Damm static struct platform_device scif0_device = { 1006d9598e2SMagnus Damm .name = "sh-sci", 1016d9598e2SMagnus Damm .id = 0, 1026d9598e2SMagnus Damm .dev = { 1036d9598e2SMagnus Damm .platform_data = &scif0_platform_data, 1046d9598e2SMagnus Damm }, 1056d9598e2SMagnus Damm }; 1066d9598e2SMagnus Damm 1076d9598e2SMagnus Damm static struct plat_sci_port scif1_platform_data = { 1086d9598e2SMagnus Damm .mapbase = 0xe6c50000, 1096d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 110f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 111f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1126d9598e2SMagnus Damm .type = PORT_SCIFA, 1136d9598e2SMagnus Damm .irqs = { gic_spi(73), gic_spi(73), 1146d9598e2SMagnus Damm gic_spi(73), gic_spi(73) }, 1156d9598e2SMagnus Damm }; 1166d9598e2SMagnus Damm 1176d9598e2SMagnus Damm static struct platform_device scif1_device = { 1186d9598e2SMagnus Damm .name = "sh-sci", 1196d9598e2SMagnus Damm .id = 1, 1206d9598e2SMagnus Damm .dev = { 1216d9598e2SMagnus Damm .platform_data = &scif1_platform_data, 1226d9598e2SMagnus Damm }, 1236d9598e2SMagnus Damm }; 1246d9598e2SMagnus Damm 1256d9598e2SMagnus Damm static struct plat_sci_port scif2_platform_data = { 1266d9598e2SMagnus Damm .mapbase = 0xe6c60000, 1276d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 128f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 129f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1306d9598e2SMagnus Damm .type = PORT_SCIFA, 1316d9598e2SMagnus Damm .irqs = { gic_spi(74), gic_spi(74), 1326d9598e2SMagnus Damm gic_spi(74), gic_spi(74) }, 1336d9598e2SMagnus Damm }; 1346d9598e2SMagnus Damm 1356d9598e2SMagnus Damm static struct platform_device scif2_device = { 1366d9598e2SMagnus Damm .name = "sh-sci", 1376d9598e2SMagnus Damm .id = 2, 1386d9598e2SMagnus Damm .dev = { 1396d9598e2SMagnus Damm .platform_data = &scif2_platform_data, 1406d9598e2SMagnus Damm }, 1416d9598e2SMagnus Damm }; 1426d9598e2SMagnus Damm 1436d9598e2SMagnus Damm static struct plat_sci_port scif3_platform_data = { 1446d9598e2SMagnus Damm .mapbase = 0xe6c70000, 1456d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 146f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 147f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1486d9598e2SMagnus Damm .type = PORT_SCIFA, 1496d9598e2SMagnus Damm .irqs = { gic_spi(75), gic_spi(75), 1506d9598e2SMagnus Damm gic_spi(75), gic_spi(75) }, 1516d9598e2SMagnus Damm }; 1526d9598e2SMagnus Damm 1536d9598e2SMagnus Damm static struct platform_device scif3_device = { 1546d9598e2SMagnus Damm .name = "sh-sci", 1556d9598e2SMagnus Damm .id = 3, 1566d9598e2SMagnus Damm .dev = { 1576d9598e2SMagnus Damm .platform_data = &scif3_platform_data, 1586d9598e2SMagnus Damm }, 1596d9598e2SMagnus Damm }; 1606d9598e2SMagnus Damm 1616d9598e2SMagnus Damm static struct plat_sci_port scif4_platform_data = { 1626d9598e2SMagnus Damm .mapbase = 0xe6c80000, 1636d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 164f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 165f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1666d9598e2SMagnus Damm .type = PORT_SCIFA, 1676d9598e2SMagnus Damm .irqs = { gic_spi(78), gic_spi(78), 1686d9598e2SMagnus Damm gic_spi(78), gic_spi(78) }, 1696d9598e2SMagnus Damm }; 1706d9598e2SMagnus Damm 1716d9598e2SMagnus Damm static struct platform_device scif4_device = { 1726d9598e2SMagnus Damm .name = "sh-sci", 1736d9598e2SMagnus Damm .id = 4, 1746d9598e2SMagnus Damm .dev = { 1756d9598e2SMagnus Damm .platform_data = &scif4_platform_data, 1766d9598e2SMagnus Damm }, 1776d9598e2SMagnus Damm }; 1786d9598e2SMagnus Damm 1796d9598e2SMagnus Damm static struct plat_sci_port scif5_platform_data = { 1806d9598e2SMagnus Damm .mapbase = 0xe6cb0000, 1816d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 182f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 183f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1846d9598e2SMagnus Damm .type = PORT_SCIFA, 1856d9598e2SMagnus Damm .irqs = { gic_spi(79), gic_spi(79), 1866d9598e2SMagnus Damm gic_spi(79), gic_spi(79) }, 1876d9598e2SMagnus Damm }; 1886d9598e2SMagnus Damm 1896d9598e2SMagnus Damm static struct platform_device scif5_device = { 1906d9598e2SMagnus Damm .name = "sh-sci", 1916d9598e2SMagnus Damm .id = 5, 1926d9598e2SMagnus Damm .dev = { 1936d9598e2SMagnus Damm .platform_data = &scif5_platform_data, 1946d9598e2SMagnus Damm }, 1956d9598e2SMagnus Damm }; 1966d9598e2SMagnus Damm 1976d9598e2SMagnus Damm static struct plat_sci_port scif6_platform_data = { 1986d9598e2SMagnus Damm .mapbase = 0xe6cc0000, 1996d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 200f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 201f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2026d9598e2SMagnus Damm .type = PORT_SCIFA, 2036d9598e2SMagnus Damm .irqs = { gic_spi(156), gic_spi(156), 2046d9598e2SMagnus Damm gic_spi(156), gic_spi(156) }, 2056d9598e2SMagnus Damm }; 2066d9598e2SMagnus Damm 2076d9598e2SMagnus Damm static struct platform_device scif6_device = { 2086d9598e2SMagnus Damm .name = "sh-sci", 2096d9598e2SMagnus Damm .id = 6, 2106d9598e2SMagnus Damm .dev = { 2116d9598e2SMagnus Damm .platform_data = &scif6_platform_data, 2126d9598e2SMagnus Damm }, 2136d9598e2SMagnus Damm }; 2146d9598e2SMagnus Damm 2156d9598e2SMagnus Damm static struct plat_sci_port scif7_platform_data = { 2166d9598e2SMagnus Damm .mapbase = 0xe6cd0000, 2176d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 218f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 219f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2206d9598e2SMagnus Damm .type = PORT_SCIFA, 2216d9598e2SMagnus Damm .irqs = { gic_spi(143), gic_spi(143), 2226d9598e2SMagnus Damm gic_spi(143), gic_spi(143) }, 2236d9598e2SMagnus Damm }; 2246d9598e2SMagnus Damm 2256d9598e2SMagnus Damm static struct platform_device scif7_device = { 2266d9598e2SMagnus Damm .name = "sh-sci", 2276d9598e2SMagnus Damm .id = 7, 2286d9598e2SMagnus Damm .dev = { 2296d9598e2SMagnus Damm .platform_data = &scif7_platform_data, 2306d9598e2SMagnus Damm }, 2316d9598e2SMagnus Damm }; 2326d9598e2SMagnus Damm 2336d9598e2SMagnus Damm static struct plat_sci_port scif8_platform_data = { 2346d9598e2SMagnus Damm .mapbase = 0xe6c30000, 2356d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 236f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 237f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2386d9598e2SMagnus Damm .type = PORT_SCIFB, 2396d9598e2SMagnus Damm .irqs = { gic_spi(80), gic_spi(80), 2406d9598e2SMagnus Damm gic_spi(80), gic_spi(80) }, 2416d9598e2SMagnus Damm }; 2426d9598e2SMagnus Damm 2436d9598e2SMagnus Damm static struct platform_device scif8_device = { 2446d9598e2SMagnus Damm .name = "sh-sci", 2456d9598e2SMagnus Damm .id = 8, 2466d9598e2SMagnus Damm .dev = { 2476d9598e2SMagnus Damm .platform_data = &scif8_platform_data, 2486d9598e2SMagnus Damm }, 2496d9598e2SMagnus Damm }; 2506d9598e2SMagnus Damm 2516d9598e2SMagnus Damm static struct sh_timer_config cmt10_platform_data = { 2526d9598e2SMagnus Damm .name = "CMT10", 2536d9598e2SMagnus Damm .channel_offset = 0x10, 2546d9598e2SMagnus Damm .timer_bit = 0, 2556d9598e2SMagnus Damm .clockevent_rating = 125, 2566d9598e2SMagnus Damm .clocksource_rating = 125, 2576d9598e2SMagnus Damm }; 2586d9598e2SMagnus Damm 2596d9598e2SMagnus Damm static struct resource cmt10_resources[] = { 2606d9598e2SMagnus Damm [0] = { 2616d9598e2SMagnus Damm .name = "CMT10", 2626d9598e2SMagnus Damm .start = 0xe6138010, 2636d9598e2SMagnus Damm .end = 0xe613801b, 2646d9598e2SMagnus Damm .flags = IORESOURCE_MEM, 2656d9598e2SMagnus Damm }, 2666d9598e2SMagnus Damm [1] = { 2676d9598e2SMagnus Damm .start = gic_spi(65), 2686d9598e2SMagnus Damm .flags = IORESOURCE_IRQ, 2696d9598e2SMagnus Damm }, 2706d9598e2SMagnus Damm }; 2716d9598e2SMagnus Damm 2726d9598e2SMagnus Damm static struct platform_device cmt10_device = { 2736d9598e2SMagnus Damm .name = "sh_cmt", 2746d9598e2SMagnus Damm .id = 10, 2756d9598e2SMagnus Damm .dev = { 2766d9598e2SMagnus Damm .platform_data = &cmt10_platform_data, 2776d9598e2SMagnus Damm }, 2786d9598e2SMagnus Damm .resource = cmt10_resources, 2796d9598e2SMagnus Damm .num_resources = ARRAY_SIZE(cmt10_resources), 2806d9598e2SMagnus Damm }; 2816d9598e2SMagnus Damm 2825010f3dbSMagnus Damm /* TMU */ 2835010f3dbSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 2845010f3dbSMagnus Damm .name = "TMU00", 2855010f3dbSMagnus Damm .channel_offset = 0x4, 2865010f3dbSMagnus Damm .timer_bit = 0, 2875010f3dbSMagnus Damm .clockevent_rating = 200, 2885010f3dbSMagnus Damm }; 2895010f3dbSMagnus Damm 2905010f3dbSMagnus Damm static struct resource tmu00_resources[] = { 2915010f3dbSMagnus Damm [0] = { 2925010f3dbSMagnus Damm .name = "TMU00", 2935010f3dbSMagnus Damm .start = 0xfff60008, 2945010f3dbSMagnus Damm .end = 0xfff60013, 2955010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 2965010f3dbSMagnus Damm }, 2975010f3dbSMagnus Damm [1] = { 2985010f3dbSMagnus Damm .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ 2995010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 3005010f3dbSMagnus Damm }, 3015010f3dbSMagnus Damm }; 3025010f3dbSMagnus Damm 3035010f3dbSMagnus Damm static struct platform_device tmu00_device = { 3045010f3dbSMagnus Damm .name = "sh_tmu", 3055010f3dbSMagnus Damm .id = 0, 3065010f3dbSMagnus Damm .dev = { 3075010f3dbSMagnus Damm .platform_data = &tmu00_platform_data, 3085010f3dbSMagnus Damm }, 3095010f3dbSMagnus Damm .resource = tmu00_resources, 3105010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 3115010f3dbSMagnus Damm }; 3125010f3dbSMagnus Damm 3135010f3dbSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 3145010f3dbSMagnus Damm .name = "TMU01", 3155010f3dbSMagnus Damm .channel_offset = 0x10, 3165010f3dbSMagnus Damm .timer_bit = 1, 3175010f3dbSMagnus Damm .clocksource_rating = 200, 3185010f3dbSMagnus Damm }; 3195010f3dbSMagnus Damm 3205010f3dbSMagnus Damm static struct resource tmu01_resources[] = { 3215010f3dbSMagnus Damm [0] = { 3225010f3dbSMagnus Damm .name = "TMU01", 3235010f3dbSMagnus Damm .start = 0xfff60014, 3245010f3dbSMagnus Damm .end = 0xfff6001f, 3255010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 3265010f3dbSMagnus Damm }, 3275010f3dbSMagnus Damm [1] = { 3285010f3dbSMagnus Damm .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ 3295010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 3305010f3dbSMagnus Damm }, 3315010f3dbSMagnus Damm }; 3325010f3dbSMagnus Damm 3335010f3dbSMagnus Damm static struct platform_device tmu01_device = { 3345010f3dbSMagnus Damm .name = "sh_tmu", 3355010f3dbSMagnus Damm .id = 1, 3365010f3dbSMagnus Damm .dev = { 3375010f3dbSMagnus Damm .platform_data = &tmu01_platform_data, 3385010f3dbSMagnus Damm }, 3395010f3dbSMagnus Damm .resource = tmu01_resources, 3405010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 3415010f3dbSMagnus Damm }; 3425010f3dbSMagnus Damm 343b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 344b028f94bSYoshii Takashi [0] = { 345b028f94bSYoshii Takashi .name = "IIC0", 346b028f94bSYoshii Takashi .start = 0xe6820000, 347b028f94bSYoshii Takashi .end = 0xe6820425 - 1, 348b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 349b028f94bSYoshii Takashi }, 350b028f94bSYoshii Takashi [1] = { 351b028f94bSYoshii Takashi .start = gic_spi(167), 352b028f94bSYoshii Takashi .end = gic_spi(170), 353b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 354b028f94bSYoshii Takashi }, 355b028f94bSYoshii Takashi }; 356b028f94bSYoshii Takashi 357b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 358b028f94bSYoshii Takashi [0] = { 359b028f94bSYoshii Takashi .name = "IIC1", 360b028f94bSYoshii Takashi .start = 0xe6822000, 361b028f94bSYoshii Takashi .end = 0xe6822425 - 1, 362b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 363b028f94bSYoshii Takashi }, 364b028f94bSYoshii Takashi [1] = { 365b028f94bSYoshii Takashi .start = gic_spi(51), 366b028f94bSYoshii Takashi .end = gic_spi(54), 367b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 368b028f94bSYoshii Takashi }, 369b028f94bSYoshii Takashi }; 370b028f94bSYoshii Takashi 371b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 372b028f94bSYoshii Takashi [0] = { 373b028f94bSYoshii Takashi .name = "IIC2", 374b028f94bSYoshii Takashi .start = 0xe6824000, 375b028f94bSYoshii Takashi .end = 0xe6824425 - 1, 376b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 377b028f94bSYoshii Takashi }, 378b028f94bSYoshii Takashi [1] = { 379b028f94bSYoshii Takashi .start = gic_spi(171), 380b028f94bSYoshii Takashi .end = gic_spi(174), 381b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 382b028f94bSYoshii Takashi }, 383b028f94bSYoshii Takashi }; 384b028f94bSYoshii Takashi 385b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 386b028f94bSYoshii Takashi [0] = { 387b028f94bSYoshii Takashi .name = "IIC3", 388b028f94bSYoshii Takashi .start = 0xe6826000, 389b028f94bSYoshii Takashi .end = 0xe6826425 - 1, 390b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 391b028f94bSYoshii Takashi }, 392b028f94bSYoshii Takashi [1] = { 393b028f94bSYoshii Takashi .start = gic_spi(183), 394b028f94bSYoshii Takashi .end = gic_spi(186), 395b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 396b028f94bSYoshii Takashi }, 397b028f94bSYoshii Takashi }; 398b028f94bSYoshii Takashi 399b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 400b028f94bSYoshii Takashi [0] = { 401b028f94bSYoshii Takashi .name = "IIC4", 402b028f94bSYoshii Takashi .start = 0xe6828000, 403b028f94bSYoshii Takashi .end = 0xe6828425 - 1, 404b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 405b028f94bSYoshii Takashi }, 406b028f94bSYoshii Takashi [1] = { 407b028f94bSYoshii Takashi .start = gic_spi(187), 408b028f94bSYoshii Takashi .end = gic_spi(190), 409b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 410b028f94bSYoshii Takashi }, 411b028f94bSYoshii Takashi }; 412b028f94bSYoshii Takashi 413b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 414b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 415b028f94bSYoshii Takashi .id = 0, 416b028f94bSYoshii Takashi .resource = i2c0_resources, 417b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 418b028f94bSYoshii Takashi }; 419b028f94bSYoshii Takashi 420b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 421b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 422b028f94bSYoshii Takashi .id = 1, 423b028f94bSYoshii Takashi .resource = i2c1_resources, 424b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 425b028f94bSYoshii Takashi }; 426b028f94bSYoshii Takashi 427b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 428b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 429b028f94bSYoshii Takashi .id = 2, 430b028f94bSYoshii Takashi .resource = i2c2_resources, 431b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 432b028f94bSYoshii Takashi }; 433b028f94bSYoshii Takashi 434b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 435b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 436b028f94bSYoshii Takashi .id = 3, 437b028f94bSYoshii Takashi .resource = i2c3_resources, 438b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 439b028f94bSYoshii Takashi }; 440b028f94bSYoshii Takashi 441b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 442b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 443b028f94bSYoshii Takashi .id = 4, 444b028f94bSYoshii Takashi .resource = i2c4_resources, 445b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 446b028f94bSYoshii Takashi }; 447b028f94bSYoshii Takashi 448681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 449681e1b3eSMagnus Damm { 450681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 451681e1b3eSMagnus Damm .addr = 0xe6c40020, 452681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 453681e1b3eSMagnus Damm .mid_rid = 0x21, 454681e1b3eSMagnus Damm }, { 455681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 456681e1b3eSMagnus Damm .addr = 0xe6c40024, 457681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 458681e1b3eSMagnus Damm .mid_rid = 0x22, 459681e1b3eSMagnus Damm }, { 460681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 461681e1b3eSMagnus Damm .addr = 0xe6c50020, 462681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 463681e1b3eSMagnus Damm .mid_rid = 0x25, 464681e1b3eSMagnus Damm }, { 465681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 466681e1b3eSMagnus Damm .addr = 0xe6c50024, 467681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 468681e1b3eSMagnus Damm .mid_rid = 0x26, 469681e1b3eSMagnus Damm }, { 470681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 471681e1b3eSMagnus Damm .addr = 0xe6c60020, 472681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 473681e1b3eSMagnus Damm .mid_rid = 0x29, 474681e1b3eSMagnus Damm }, { 475681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 476681e1b3eSMagnus Damm .addr = 0xe6c60024, 477681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 478681e1b3eSMagnus Damm .mid_rid = 0x2a, 479681e1b3eSMagnus Damm }, { 480681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 481681e1b3eSMagnus Damm .addr = 0xe6c70020, 482681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 483681e1b3eSMagnus Damm .mid_rid = 0x2d, 484681e1b3eSMagnus Damm }, { 485681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 486681e1b3eSMagnus Damm .addr = 0xe6c70024, 487681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 488681e1b3eSMagnus Damm .mid_rid = 0x2e, 489681e1b3eSMagnus Damm }, { 490681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 491681e1b3eSMagnus Damm .addr = 0xe6c80020, 492681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 493681e1b3eSMagnus Damm .mid_rid = 0x39, 494681e1b3eSMagnus Damm }, { 495681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 496681e1b3eSMagnus Damm .addr = 0xe6c80024, 497681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 498681e1b3eSMagnus Damm .mid_rid = 0x3a, 499681e1b3eSMagnus Damm }, { 500681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 501681e1b3eSMagnus Damm .addr = 0xe6cb0020, 502681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 503681e1b3eSMagnus Damm .mid_rid = 0x35, 504681e1b3eSMagnus Damm }, { 505681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 506681e1b3eSMagnus Damm .addr = 0xe6cb0024, 507681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 508681e1b3eSMagnus Damm .mid_rid = 0x36, 509681e1b3eSMagnus Damm }, { 510681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 511681e1b3eSMagnus Damm .addr = 0xe6cc0020, 512681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 513681e1b3eSMagnus Damm .mid_rid = 0x1d, 514681e1b3eSMagnus Damm }, { 515681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 516681e1b3eSMagnus Damm .addr = 0xe6cc0024, 517681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 518681e1b3eSMagnus Damm .mid_rid = 0x1e, 519681e1b3eSMagnus Damm }, { 520681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 521681e1b3eSMagnus Damm .addr = 0xe6cd0020, 522681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 523681e1b3eSMagnus Damm .mid_rid = 0x19, 524681e1b3eSMagnus Damm }, { 525681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 526681e1b3eSMagnus Damm .addr = 0xe6cd0024, 527681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 528681e1b3eSMagnus Damm .mid_rid = 0x1a, 529681e1b3eSMagnus Damm }, { 530681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 531681e1b3eSMagnus Damm .addr = 0xe6c30040, 532681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 533681e1b3eSMagnus Damm .mid_rid = 0x3d, 534681e1b3eSMagnus Damm }, { 535681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 536681e1b3eSMagnus Damm .addr = 0xe6c30060, 537681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 538681e1b3eSMagnus Damm .mid_rid = 0x3e, 539681e1b3eSMagnus Damm }, { 540681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 541681e1b3eSMagnus Damm .addr = 0xee100030, 542681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 543681e1b3eSMagnus Damm .mid_rid = 0xc1, 544681e1b3eSMagnus Damm }, { 545681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 546681e1b3eSMagnus Damm .addr = 0xee100030, 547681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 548681e1b3eSMagnus Damm .mid_rid = 0xc2, 549681e1b3eSMagnus Damm }, { 550681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 551681e1b3eSMagnus Damm .addr = 0xee120030, 552681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 553681e1b3eSMagnus Damm .mid_rid = 0xc9, 554681e1b3eSMagnus Damm }, { 555681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 556681e1b3eSMagnus Damm .addr = 0xee120030, 557681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 558681e1b3eSMagnus Damm .mid_rid = 0xca, 559681e1b3eSMagnus Damm }, { 560681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 561681e1b3eSMagnus Damm .addr = 0xee140030, 562681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 563681e1b3eSMagnus Damm .mid_rid = 0xcd, 564681e1b3eSMagnus Damm }, { 565681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 566681e1b3eSMagnus Damm .addr = 0xee140030, 567681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 568681e1b3eSMagnus Damm .mid_rid = 0xce, 569681e1b3eSMagnus Damm }, { 570681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 571681e1b3eSMagnus Damm .addr = 0xe6bd0034, 572681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 573681e1b3eSMagnus Damm .mid_rid = 0xd1, 574681e1b3eSMagnus Damm }, { 575681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 576681e1b3eSMagnus Damm .addr = 0xe6bd0034, 577681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 578681e1b3eSMagnus Damm .mid_rid = 0xd2, 579681e1b3eSMagnus Damm }, 580681e1b3eSMagnus Damm }; 581681e1b3eSMagnus Damm 582681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 583681e1b3eSMagnus Damm { \ 584681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 585681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 586681e1b3eSMagnus Damm } 587681e1b3eSMagnus Damm 588681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 589681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 590681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 591681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 592681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 593681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 594681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 595681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 596681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 597681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 598681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 599681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 600681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 601681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 602681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 603681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 604681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 605681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 606681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 607681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 608681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 609681e1b3eSMagnus Damm }; 610681e1b3eSMagnus Damm 611681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 612681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 613681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 614681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 615681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 6166088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 6176088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 6186088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 6196088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 6206088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 6216088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 622681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 623681e1b3eSMagnus Damm }; 624681e1b3eSMagnus Damm 625681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 626681e1b3eSMagnus Damm { 627681e1b3eSMagnus Damm /* Registers including DMAOR and channels including DMARSx */ 628681e1b3eSMagnus Damm .start = 0xfe000020, 629681e1b3eSMagnus Damm .end = 0xfe008a00 - 1, 630681e1b3eSMagnus Damm .flags = IORESOURCE_MEM, 631681e1b3eSMagnus Damm }, 632681e1b3eSMagnus Damm { 63320052462SShimoda, Yoshihiro .name = "error_irq", 634681e1b3eSMagnus Damm .start = gic_spi(129), 635681e1b3eSMagnus Damm .end = gic_spi(129), 636681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 637681e1b3eSMagnus Damm }, 638681e1b3eSMagnus Damm { 639681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 640681e1b3eSMagnus Damm .start = gic_spi(109), 641681e1b3eSMagnus Damm .end = gic_spi(128), 642681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 643681e1b3eSMagnus Damm }, 644681e1b3eSMagnus Damm }; 645681e1b3eSMagnus Damm 646681e1b3eSMagnus Damm static struct platform_device dma0_device = { 647681e1b3eSMagnus Damm .name = "sh-dma-engine", 648681e1b3eSMagnus Damm .id = 0, 649681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 650681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 651681e1b3eSMagnus Damm .dev = { 652681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 653681e1b3eSMagnus Damm }, 654681e1b3eSMagnus Damm }; 655681e1b3eSMagnus Damm 656832290b2SKuninori Morimoto /* MPDMAC */ 657832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 658832290b2SKuninori Morimoto { 659832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 660832290b2SKuninori Morimoto .addr = 0xec230020, 661832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 662832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 663832290b2SKuninori Morimoto }, { 664832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 665832290b2SKuninori Morimoto .addr = 0xec230024, 666832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 667832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 668832290b2SKuninori Morimoto }, { 669832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 670832290b2SKuninori Morimoto .addr = 0xec230060, 671832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 672832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 673832290b2SKuninori Morimoto }, { 674832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 675832290b2SKuninori Morimoto .addr = 0xec230064, 676832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 677832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 678832290b2SKuninori Morimoto }, { 679832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 680832290b2SKuninori Morimoto .addr = 0xec240020, 681832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 682832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 683832290b2SKuninori Morimoto }, { 684832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 685832290b2SKuninori Morimoto .addr = 0xec240024, 686832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 687832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 688832290b2SKuninori Morimoto }, { 689832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 690832290b2SKuninori Morimoto .addr = 0xec240060, 691832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 692832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 693832290b2SKuninori Morimoto }, 694832290b2SKuninori Morimoto }; 695832290b2SKuninori Morimoto 696832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 697832290b2SKuninori Morimoto { \ 698832290b2SKuninori Morimoto .offset = a, \ 699832290b2SKuninori Morimoto .dmars = b, \ 700832290b2SKuninori Morimoto .dmars_bit = c, \ 701832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 702832290b2SKuninori Morimoto } 703832290b2SKuninori Morimoto 704832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 705832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 706832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 707832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 708832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 709832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 710832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 711832290b2SKuninori Morimoto }; 712832290b2SKuninori Morimoto 713832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 714832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 715832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 716832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 717832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 7186088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 7196088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 7206088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 7216088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 7226088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 7236088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 724832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 725832290b2SKuninori Morimoto .chclr_present = 1, 726832290b2SKuninori Morimoto }; 727832290b2SKuninori Morimoto 728832290b2SKuninori Morimoto /* Resource order important! */ 729832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 730832290b2SKuninori Morimoto { 731832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 732832290b2SKuninori Morimoto .start = 0xec618020, 733832290b2SKuninori Morimoto .end = 0xec61828f, 734832290b2SKuninori Morimoto .flags = IORESOURCE_MEM, 735832290b2SKuninori Morimoto }, 736832290b2SKuninori Morimoto { 737832290b2SKuninori Morimoto /* DMARSx */ 738832290b2SKuninori Morimoto .start = 0xec619000, 739832290b2SKuninori Morimoto .end = 0xec61900b, 740832290b2SKuninori Morimoto .flags = IORESOURCE_MEM, 741832290b2SKuninori Morimoto }, 742832290b2SKuninori Morimoto { 743832290b2SKuninori Morimoto .name = "error_irq", 744832290b2SKuninori Morimoto .start = gic_spi(181), 745832290b2SKuninori Morimoto .end = gic_spi(181), 746832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 747832290b2SKuninori Morimoto }, 748832290b2SKuninori Morimoto { 749832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 750832290b2SKuninori Morimoto .start = gic_spi(175), 751832290b2SKuninori Morimoto .end = gic_spi(180), 752832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 753832290b2SKuninori Morimoto }, 754832290b2SKuninori Morimoto }; 755832290b2SKuninori Morimoto 756832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 757832290b2SKuninori Morimoto .name = "sh-dma-engine", 758832290b2SKuninori Morimoto .id = 1, 759832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 760832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 761832290b2SKuninori Morimoto .dev = { 762832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 763832290b2SKuninori Morimoto }, 764832290b2SKuninori Morimoto }; 765832290b2SKuninori Morimoto 766f23f5be0STetsuyuki Kobayashi static struct resource pmu_resources[] = { 767f23f5be0STetsuyuki Kobayashi [0] = { 768f23f5be0STetsuyuki Kobayashi .start = gic_spi(55), 769f23f5be0STetsuyuki Kobayashi .end = gic_spi(55), 770f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 771f23f5be0STetsuyuki Kobayashi }, 772f23f5be0STetsuyuki Kobayashi [1] = { 773f23f5be0STetsuyuki Kobayashi .start = gic_spi(56), 774f23f5be0STetsuyuki Kobayashi .end = gic_spi(56), 775f23f5be0STetsuyuki Kobayashi .flags = IORESOURCE_IRQ, 776f23f5be0STetsuyuki Kobayashi }, 777f23f5be0STetsuyuki Kobayashi }; 778f23f5be0STetsuyuki Kobayashi 779f23f5be0STetsuyuki Kobayashi static struct platform_device pmu_device = { 780f23f5be0STetsuyuki Kobayashi .name = "arm-pmu", 781f23f5be0STetsuyuki Kobayashi .id = -1, 782f23f5be0STetsuyuki Kobayashi .num_resources = ARRAY_SIZE(pmu_resources), 783f23f5be0STetsuyuki Kobayashi .resource = pmu_resources, 784f23f5be0STetsuyuki Kobayashi }; 785f23f5be0STetsuyuki Kobayashi 7869a27dee7SHideki EIRAKU /* an IPMMU module for ICB */ 7879a27dee7SHideki EIRAKU static struct resource ipmmu_resources[] = { 7889a27dee7SHideki EIRAKU [0] = { 7899a27dee7SHideki EIRAKU .name = "IPMMU", 7909a27dee7SHideki EIRAKU .start = 0xfe951000, 7919a27dee7SHideki EIRAKU .end = 0xfe9510ff, 7929a27dee7SHideki EIRAKU .flags = IORESOURCE_MEM, 7939a27dee7SHideki EIRAKU }, 7949a27dee7SHideki EIRAKU }; 7959a27dee7SHideki EIRAKU 7969a27dee7SHideki EIRAKU static const char * const ipmmu_dev_names[] = { 7979a27dee7SHideki EIRAKU "sh_mobile_lcdc_fb.0", 7989a27dee7SHideki EIRAKU }; 7999a27dee7SHideki EIRAKU 8009a27dee7SHideki EIRAKU static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { 8019a27dee7SHideki EIRAKU .dev_names = ipmmu_dev_names, 8029a27dee7SHideki EIRAKU .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), 8039a27dee7SHideki EIRAKU }; 8049a27dee7SHideki EIRAKU 8059a27dee7SHideki EIRAKU static struct platform_device ipmmu_device = { 8069a27dee7SHideki EIRAKU .name = "ipmmu", 8079a27dee7SHideki EIRAKU .id = -1, 8089a27dee7SHideki EIRAKU .dev = { 8099a27dee7SHideki EIRAKU .platform_data = &ipmmu_platform_data, 8109a27dee7SHideki EIRAKU }, 8119a27dee7SHideki EIRAKU .resource = ipmmu_resources, 8129a27dee7SHideki EIRAKU .num_resources = ARRAY_SIZE(ipmmu_resources), 8139a27dee7SHideki EIRAKU }; 8149a27dee7SHideki EIRAKU 815341eb546SMagnus Damm struct renesas_intc_irqpin_config irqpin0_platform_data = { 816341eb546SMagnus Damm .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */ 817341eb546SMagnus Damm }; 818341eb546SMagnus Damm 819341eb546SMagnus Damm static struct resource irqpin0_resources[] = { 820341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ 821341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ 822341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ 823341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ 824341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ 825341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(1)), /* IRQ0 */ 826341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(2)), /* IRQ1 */ 827341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(3)), /* IRQ2 */ 828341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(4)), /* IRQ3 */ 829341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(5)), /* IRQ4 */ 830341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(6)), /* IRQ5 */ 831341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(7)), /* IRQ6 */ 832341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(8)), /* IRQ7 */ 833341eb546SMagnus Damm }; 834341eb546SMagnus Damm 835341eb546SMagnus Damm static struct platform_device irqpin0_device = { 836341eb546SMagnus Damm .name = "renesas_intc_irqpin", 837341eb546SMagnus Damm .id = 0, 838341eb546SMagnus Damm .resource = irqpin0_resources, 839341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin0_resources), 840341eb546SMagnus Damm .dev = { 841341eb546SMagnus Damm .platform_data = &irqpin0_platform_data, 842341eb546SMagnus Damm }, 843341eb546SMagnus Damm }; 844341eb546SMagnus Damm 845341eb546SMagnus Damm struct renesas_intc_irqpin_config irqpin1_platform_data = { 846341eb546SMagnus Damm .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */ 847341eb546SMagnus Damm .control_parent = true, /* Disable spurious IRQ10 */ 848341eb546SMagnus Damm }; 849341eb546SMagnus Damm 850341eb546SMagnus Damm static struct resource irqpin1_resources[] = { 851341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ 852341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ 853341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ 854341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */ 855341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */ 856341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(9)), /* IRQ8 */ 857341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(10)), /* IRQ9 */ 858341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(11)), /* IRQ10 */ 859341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(12)), /* IRQ11 */ 860341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(13)), /* IRQ12 */ 861341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(14)), /* IRQ13 */ 862341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(15)), /* IRQ14 */ 863341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(16)), /* IRQ15 */ 864341eb546SMagnus Damm }; 865341eb546SMagnus Damm 866341eb546SMagnus Damm static struct platform_device irqpin1_device = { 867341eb546SMagnus Damm .name = "renesas_intc_irqpin", 868341eb546SMagnus Damm .id = 1, 869341eb546SMagnus Damm .resource = irqpin1_resources, 870341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin1_resources), 871341eb546SMagnus Damm .dev = { 872341eb546SMagnus Damm .platform_data = &irqpin1_platform_data, 873341eb546SMagnus Damm }, 874341eb546SMagnus Damm }; 875341eb546SMagnus Damm 876341eb546SMagnus Damm struct renesas_intc_irqpin_config irqpin2_platform_data = { 877341eb546SMagnus Damm .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */ 878341eb546SMagnus Damm }; 879341eb546SMagnus Damm 880341eb546SMagnus Damm static struct resource irqpin2_resources[] = { 881341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */ 882341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI20A */ 883341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ20A */ 884341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK20A */ 885341eb546SMagnus Damm DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR20A */ 886341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(17)), /* IRQ16 */ 887341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(18)), /* IRQ17 */ 888341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(19)), /* IRQ18 */ 889341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(20)), /* IRQ19 */ 890341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(21)), /* IRQ20 */ 891341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(22)), /* IRQ21 */ 892341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(23)), /* IRQ22 */ 893341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(24)), /* IRQ23 */ 894341eb546SMagnus Damm }; 895341eb546SMagnus Damm 896341eb546SMagnus Damm static struct platform_device irqpin2_device = { 897341eb546SMagnus Damm .name = "renesas_intc_irqpin", 898341eb546SMagnus Damm .id = 2, 899341eb546SMagnus Damm .resource = irqpin2_resources, 900341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin2_resources), 901341eb546SMagnus Damm .dev = { 902341eb546SMagnus Damm .platform_data = &irqpin2_platform_data, 903341eb546SMagnus Damm }, 904341eb546SMagnus Damm }; 905341eb546SMagnus Damm 906341eb546SMagnus Damm struct renesas_intc_irqpin_config irqpin3_platform_data = { 907341eb546SMagnus Damm .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */ 908341eb546SMagnus Damm }; 909341eb546SMagnus Damm 910341eb546SMagnus Damm static struct resource irqpin3_resources[] = { 911341eb546SMagnus Damm DEFINE_RES_MEM(0xe690000c, 4), /* ICR4A */ 912341eb546SMagnus Damm DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */ 913341eb546SMagnus Damm DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */ 914341eb546SMagnus Damm DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */ 915341eb546SMagnus Damm DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */ 916341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(25)), /* IRQ24 */ 917341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(26)), /* IRQ25 */ 918341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(27)), /* IRQ26 */ 919341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(28)), /* IRQ27 */ 920341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(29)), /* IRQ28 */ 921341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(30)), /* IRQ29 */ 922341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(31)), /* IRQ30 */ 923341eb546SMagnus Damm DEFINE_RES_IRQ(gic_spi(32)), /* IRQ31 */ 924341eb546SMagnus Damm }; 925341eb546SMagnus Damm 926341eb546SMagnus Damm static struct platform_device irqpin3_device = { 927341eb546SMagnus Damm .name = "renesas_intc_irqpin", 928341eb546SMagnus Damm .id = 3, 929341eb546SMagnus Damm .resource = irqpin3_resources, 930341eb546SMagnus Damm .num_resources = ARRAY_SIZE(irqpin3_resources), 931341eb546SMagnus Damm .dev = { 932341eb546SMagnus Damm .platform_data = &irqpin3_platform_data, 933341eb546SMagnus Damm }, 934341eb546SMagnus Damm }; 935341eb546SMagnus Damm 9363b00f934SSimon Horman static struct platform_device *sh73a0_devices_dt[] __initdata = { 9376d9598e2SMagnus Damm &scif0_device, 9386d9598e2SMagnus Damm &scif1_device, 9396d9598e2SMagnus Damm &scif2_device, 9406d9598e2SMagnus Damm &scif3_device, 9416d9598e2SMagnus Damm &scif4_device, 9426d9598e2SMagnus Damm &scif5_device, 9436d9598e2SMagnus Damm &scif6_device, 9446d9598e2SMagnus Damm &scif7_device, 9456d9598e2SMagnus Damm &scif8_device, 9466d9598e2SMagnus Damm &cmt10_device, 94748609533SSimon Horman }; 94848609533SSimon Horman 94948609533SSimon Horman static struct platform_device *sh73a0_early_devices[] __initdata = { 9505010f3dbSMagnus Damm &tmu00_device, 9515010f3dbSMagnus Damm &tmu01_device, 9529a27dee7SHideki EIRAKU &ipmmu_device, 9536d9598e2SMagnus Damm }; 9546d9598e2SMagnus Damm 955b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 956b028f94bSYoshii Takashi &i2c0_device, 957b028f94bSYoshii Takashi &i2c1_device, 958b028f94bSYoshii Takashi &i2c2_device, 959b028f94bSYoshii Takashi &i2c3_device, 960b028f94bSYoshii Takashi &i2c4_device, 961681e1b3eSMagnus Damm &dma0_device, 962832290b2SKuninori Morimoto &mpdma0_device, 963f23f5be0STetsuyuki Kobayashi &pmu_device, 964341eb546SMagnus Damm &irqpin0_device, 965341eb546SMagnus Damm &irqpin1_device, 966341eb546SMagnus Damm &irqpin2_device, 967341eb546SMagnus Damm &irqpin3_device, 968b028f94bSYoshii Takashi }; 969b028f94bSYoshii Takashi 9700a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 971681e1b3eSMagnus Damm 9726d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 9736d9598e2SMagnus Damm { 974681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 975681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 976681e1b3eSMagnus Damm 9773b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 9783b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 9796d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 9806d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 981b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 982b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 9836d9598e2SMagnus Damm } 9846d9598e2SMagnus Damm 985d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 986d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 987d6720003SKuninori Morimoto 9886bb27d73SStephen Warren void __init sh73a0_earlytimer_init(void) 9893be26fdbSMagnus Damm { 9903be26fdbSMagnus Damm sh73a0_clock_init(); 9913be26fdbSMagnus Damm shmobile_earlytimer_init(); 992d6720003SKuninori Morimoto sh73a0_register_twd(); 9933be26fdbSMagnus Damm } 9943be26fdbSMagnus Damm 9956d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 9966d9598e2SMagnus Damm { 9973b00f934SSimon Horman early_platform_add_devices(sh73a0_devices_dt, 9983b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 9996d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 10006d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 100150e15c34SMagnus Damm 100250e15c34SMagnus Damm /* setup early console here as well */ 100350e15c34SMagnus Damm shmobile_setup_console(); 10046d9598e2SMagnus Damm } 100548609533SSimon Horman 100648609533SSimon Horman #ifdef CONFIG_USE_OF 100748609533SSimon Horman 10083b00f934SSimon Horman void __init sh73a0_init_delay(void) 100948609533SSimon Horman { 101048609533SSimon Horman shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ 101148609533SSimon Horman } 101248609533SSimon Horman 101348609533SSimon Horman static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = { 101448609533SSimon Horman {}, 101548609533SSimon Horman }; 101648609533SSimon Horman 101748609533SSimon Horman void __init sh73a0_add_standard_devices_dt(void) 101848609533SSimon Horman { 101948609533SSimon Horman /* clocks are setup late during boot in the case of DT */ 102048609533SSimon Horman sh73a0_clock_init(); 102148609533SSimon Horman 10223b00f934SSimon Horman platform_add_devices(sh73a0_devices_dt, 10233b00f934SSimon Horman ARRAY_SIZE(sh73a0_devices_dt)); 102448609533SSimon Horman of_platform_populate(NULL, of_default_bus_match_table, 102548609533SSimon Horman sh73a0_auxdata_lookup, NULL); 102648609533SSimon Horman } 102748609533SSimon Horman 102848609533SSimon Horman static const char *sh73a0_boards_compat_dt[] __initdata = { 102948609533SSimon Horman "renesas,sh73a0", 103048609533SSimon Horman NULL, 103148609533SSimon Horman }; 103248609533SSimon Horman 103348609533SSimon Horman DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") 1034f9989507SSimon Horman .smp = smp_ops(sh73a0_smp_ops), 103548609533SSimon Horman .map_io = sh73a0_map_io, 10363b00f934SSimon Horman .init_early = sh73a0_init_delay, 103748609533SSimon Horman .nr_irqs = NR_IRQS_LEGACY, 10384eca134fSSimon Horman .init_irq = irqchip_init, 103948609533SSimon Horman .init_machine = sh73a0_add_standard_devices_dt, 104048609533SSimon Horman .init_time = shmobile_timer_init, 104148609533SSimon Horman .dt_compat = sh73a0_boards_compat_dt, 104248609533SSimon Horman MACHINE_END 104348609533SSimon Horman #endif /* CONFIG_USE_OF */ 1044