16d9598e2SMagnus Damm /* 26d9598e2SMagnus Damm * sh73a0 processor support 36d9598e2SMagnus Damm * 46d9598e2SMagnus Damm * Copyright (C) 2010 Takashi Yoshii 56d9598e2SMagnus Damm * Copyright (C) 2010 Magnus Damm 66d9598e2SMagnus Damm * Copyright (C) 2008 Yoshihiro Shimoda 76d9598e2SMagnus Damm * 86d9598e2SMagnus Damm * This program is free software; you can redistribute it and/or modify 96d9598e2SMagnus Damm * it under the terms of the GNU General Public License as published by 106d9598e2SMagnus Damm * the Free Software Foundation; version 2 of the License. 116d9598e2SMagnus Damm * 126d9598e2SMagnus Damm * This program is distributed in the hope that it will be useful, 136d9598e2SMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 146d9598e2SMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 156d9598e2SMagnus Damm * GNU General Public License for more details. 166d9598e2SMagnus Damm * 176d9598e2SMagnus Damm * You should have received a copy of the GNU General Public License 186d9598e2SMagnus Damm * along with this program; if not, write to the Free Software 196d9598e2SMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 206d9598e2SMagnus Damm */ 216d9598e2SMagnus Damm #include <linux/kernel.h> 226d9598e2SMagnus Damm #include <linux/init.h> 236d9598e2SMagnus Damm #include <linux/interrupt.h> 246d9598e2SMagnus Damm #include <linux/irq.h> 256d9598e2SMagnus Damm #include <linux/platform_device.h> 266d9598e2SMagnus Damm #include <linux/delay.h> 276d9598e2SMagnus Damm #include <linux/input.h> 286d9598e2SMagnus Damm #include <linux/io.h> 296d9598e2SMagnus Damm #include <linux/serial_sci.h> 30681e1b3eSMagnus Damm #include <linux/sh_dma.h> 316d9598e2SMagnus Damm #include <linux/sh_intc.h> 326d9598e2SMagnus Damm #include <linux/sh_timer.h> 336088b422SKuninori Morimoto #include <mach/dma-register.h> 346d9598e2SMagnus Damm #include <mach/hardware.h> 35250a2723SRob Herring #include <mach/irqs.h> 36681e1b3eSMagnus Damm #include <mach/sh73a0.h> 3750e15c34SMagnus Damm #include <mach/common.h> 386d9598e2SMagnus Damm #include <asm/mach-types.h> 3950e15c34SMagnus Damm #include <asm/mach/map.h> 406d9598e2SMagnus Damm #include <asm/mach/arch.h> 413be26fdbSMagnus Damm #include <asm/mach/time.h> 426d9598e2SMagnus Damm 4350e15c34SMagnus Damm static struct map_desc sh73a0_io_desc[] __initdata = { 4450e15c34SMagnus Damm /* create a 1:1 entity map for 0xe6xxxxxx 4550e15c34SMagnus Damm * used by CPGA, INTC and PFC. 4650e15c34SMagnus Damm */ 4750e15c34SMagnus Damm { 4850e15c34SMagnus Damm .virtual = 0xe6000000, 4950e15c34SMagnus Damm .pfn = __phys_to_pfn(0xe6000000), 5050e15c34SMagnus Damm .length = 256 << 20, 5150e15c34SMagnus Damm .type = MT_DEVICE_NONSHARED 5250e15c34SMagnus Damm }, 5350e15c34SMagnus Damm }; 5450e15c34SMagnus Damm 5550e15c34SMagnus Damm void __init sh73a0_map_io(void) 5650e15c34SMagnus Damm { 5750e15c34SMagnus Damm iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 5850e15c34SMagnus Damm } 5950e15c34SMagnus Damm 606d9598e2SMagnus Damm static struct plat_sci_port scif0_platform_data = { 616d9598e2SMagnus Damm .mapbase = 0xe6c40000, 626d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 63f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 64f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 656d9598e2SMagnus Damm .type = PORT_SCIFA, 666d9598e2SMagnus Damm .irqs = { gic_spi(72), gic_spi(72), 676d9598e2SMagnus Damm gic_spi(72), gic_spi(72) }, 686d9598e2SMagnus Damm }; 696d9598e2SMagnus Damm 706d9598e2SMagnus Damm static struct platform_device scif0_device = { 716d9598e2SMagnus Damm .name = "sh-sci", 726d9598e2SMagnus Damm .id = 0, 736d9598e2SMagnus Damm .dev = { 746d9598e2SMagnus Damm .platform_data = &scif0_platform_data, 756d9598e2SMagnus Damm }, 766d9598e2SMagnus Damm }; 776d9598e2SMagnus Damm 786d9598e2SMagnus Damm static struct plat_sci_port scif1_platform_data = { 796d9598e2SMagnus Damm .mapbase = 0xe6c50000, 806d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 81f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 82f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 836d9598e2SMagnus Damm .type = PORT_SCIFA, 846d9598e2SMagnus Damm .irqs = { gic_spi(73), gic_spi(73), 856d9598e2SMagnus Damm gic_spi(73), gic_spi(73) }, 866d9598e2SMagnus Damm }; 876d9598e2SMagnus Damm 886d9598e2SMagnus Damm static struct platform_device scif1_device = { 896d9598e2SMagnus Damm .name = "sh-sci", 906d9598e2SMagnus Damm .id = 1, 916d9598e2SMagnus Damm .dev = { 926d9598e2SMagnus Damm .platform_data = &scif1_platform_data, 936d9598e2SMagnus Damm }, 946d9598e2SMagnus Damm }; 956d9598e2SMagnus Damm 966d9598e2SMagnus Damm static struct plat_sci_port scif2_platform_data = { 976d9598e2SMagnus Damm .mapbase = 0xe6c60000, 986d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 99f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 100f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1016d9598e2SMagnus Damm .type = PORT_SCIFA, 1026d9598e2SMagnus Damm .irqs = { gic_spi(74), gic_spi(74), 1036d9598e2SMagnus Damm gic_spi(74), gic_spi(74) }, 1046d9598e2SMagnus Damm }; 1056d9598e2SMagnus Damm 1066d9598e2SMagnus Damm static struct platform_device scif2_device = { 1076d9598e2SMagnus Damm .name = "sh-sci", 1086d9598e2SMagnus Damm .id = 2, 1096d9598e2SMagnus Damm .dev = { 1106d9598e2SMagnus Damm .platform_data = &scif2_platform_data, 1116d9598e2SMagnus Damm }, 1126d9598e2SMagnus Damm }; 1136d9598e2SMagnus Damm 1146d9598e2SMagnus Damm static struct plat_sci_port scif3_platform_data = { 1156d9598e2SMagnus Damm .mapbase = 0xe6c70000, 1166d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 117f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 118f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1196d9598e2SMagnus Damm .type = PORT_SCIFA, 1206d9598e2SMagnus Damm .irqs = { gic_spi(75), gic_spi(75), 1216d9598e2SMagnus Damm gic_spi(75), gic_spi(75) }, 1226d9598e2SMagnus Damm }; 1236d9598e2SMagnus Damm 1246d9598e2SMagnus Damm static struct platform_device scif3_device = { 1256d9598e2SMagnus Damm .name = "sh-sci", 1266d9598e2SMagnus Damm .id = 3, 1276d9598e2SMagnus Damm .dev = { 1286d9598e2SMagnus Damm .platform_data = &scif3_platform_data, 1296d9598e2SMagnus Damm }, 1306d9598e2SMagnus Damm }; 1316d9598e2SMagnus Damm 1326d9598e2SMagnus Damm static struct plat_sci_port scif4_platform_data = { 1336d9598e2SMagnus Damm .mapbase = 0xe6c80000, 1346d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 135f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 136f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1376d9598e2SMagnus Damm .type = PORT_SCIFA, 1386d9598e2SMagnus Damm .irqs = { gic_spi(78), gic_spi(78), 1396d9598e2SMagnus Damm gic_spi(78), gic_spi(78) }, 1406d9598e2SMagnus Damm }; 1416d9598e2SMagnus Damm 1426d9598e2SMagnus Damm static struct platform_device scif4_device = { 1436d9598e2SMagnus Damm .name = "sh-sci", 1446d9598e2SMagnus Damm .id = 4, 1456d9598e2SMagnus Damm .dev = { 1466d9598e2SMagnus Damm .platform_data = &scif4_platform_data, 1476d9598e2SMagnus Damm }, 1486d9598e2SMagnus Damm }; 1496d9598e2SMagnus Damm 1506d9598e2SMagnus Damm static struct plat_sci_port scif5_platform_data = { 1516d9598e2SMagnus Damm .mapbase = 0xe6cb0000, 1526d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 153f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 154f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1556d9598e2SMagnus Damm .type = PORT_SCIFA, 1566d9598e2SMagnus Damm .irqs = { gic_spi(79), gic_spi(79), 1576d9598e2SMagnus Damm gic_spi(79), gic_spi(79) }, 1586d9598e2SMagnus Damm }; 1596d9598e2SMagnus Damm 1606d9598e2SMagnus Damm static struct platform_device scif5_device = { 1616d9598e2SMagnus Damm .name = "sh-sci", 1626d9598e2SMagnus Damm .id = 5, 1636d9598e2SMagnus Damm .dev = { 1646d9598e2SMagnus Damm .platform_data = &scif5_platform_data, 1656d9598e2SMagnus Damm }, 1666d9598e2SMagnus Damm }; 1676d9598e2SMagnus Damm 1686d9598e2SMagnus Damm static struct plat_sci_port scif6_platform_data = { 1696d9598e2SMagnus Damm .mapbase = 0xe6cc0000, 1706d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 171f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 172f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1736d9598e2SMagnus Damm .type = PORT_SCIFA, 1746d9598e2SMagnus Damm .irqs = { gic_spi(156), gic_spi(156), 1756d9598e2SMagnus Damm gic_spi(156), gic_spi(156) }, 1766d9598e2SMagnus Damm }; 1776d9598e2SMagnus Damm 1786d9598e2SMagnus Damm static struct platform_device scif6_device = { 1796d9598e2SMagnus Damm .name = "sh-sci", 1806d9598e2SMagnus Damm .id = 6, 1816d9598e2SMagnus Damm .dev = { 1826d9598e2SMagnus Damm .platform_data = &scif6_platform_data, 1836d9598e2SMagnus Damm }, 1846d9598e2SMagnus Damm }; 1856d9598e2SMagnus Damm 1866d9598e2SMagnus Damm static struct plat_sci_port scif7_platform_data = { 1876d9598e2SMagnus Damm .mapbase = 0xe6cd0000, 1886d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 189f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 190f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 1916d9598e2SMagnus Damm .type = PORT_SCIFA, 1926d9598e2SMagnus Damm .irqs = { gic_spi(143), gic_spi(143), 1936d9598e2SMagnus Damm gic_spi(143), gic_spi(143) }, 1946d9598e2SMagnus Damm }; 1956d9598e2SMagnus Damm 1966d9598e2SMagnus Damm static struct platform_device scif7_device = { 1976d9598e2SMagnus Damm .name = "sh-sci", 1986d9598e2SMagnus Damm .id = 7, 1996d9598e2SMagnus Damm .dev = { 2006d9598e2SMagnus Damm .platform_data = &scif7_platform_data, 2016d9598e2SMagnus Damm }, 2026d9598e2SMagnus Damm }; 2036d9598e2SMagnus Damm 2046d9598e2SMagnus Damm static struct plat_sci_port scif8_platform_data = { 2056d9598e2SMagnus Damm .mapbase = 0xe6c30000, 2066d9598e2SMagnus Damm .flags = UPF_BOOT_AUTOCONF, 207f43dc23dSPaul Mundt .scscr = SCSCR_RE | SCSCR_TE, 208f43dc23dSPaul Mundt .scbrr_algo_id = SCBRR_ALGO_4, 2096d9598e2SMagnus Damm .type = PORT_SCIFB, 2106d9598e2SMagnus Damm .irqs = { gic_spi(80), gic_spi(80), 2116d9598e2SMagnus Damm gic_spi(80), gic_spi(80) }, 2126d9598e2SMagnus Damm }; 2136d9598e2SMagnus Damm 2146d9598e2SMagnus Damm static struct platform_device scif8_device = { 2156d9598e2SMagnus Damm .name = "sh-sci", 2166d9598e2SMagnus Damm .id = 8, 2176d9598e2SMagnus Damm .dev = { 2186d9598e2SMagnus Damm .platform_data = &scif8_platform_data, 2196d9598e2SMagnus Damm }, 2206d9598e2SMagnus Damm }; 2216d9598e2SMagnus Damm 2226d9598e2SMagnus Damm static struct sh_timer_config cmt10_platform_data = { 2236d9598e2SMagnus Damm .name = "CMT10", 2246d9598e2SMagnus Damm .channel_offset = 0x10, 2256d9598e2SMagnus Damm .timer_bit = 0, 2266d9598e2SMagnus Damm .clockevent_rating = 125, 2276d9598e2SMagnus Damm .clocksource_rating = 125, 2286d9598e2SMagnus Damm }; 2296d9598e2SMagnus Damm 2306d9598e2SMagnus Damm static struct resource cmt10_resources[] = { 2316d9598e2SMagnus Damm [0] = { 2326d9598e2SMagnus Damm .name = "CMT10", 2336d9598e2SMagnus Damm .start = 0xe6138010, 2346d9598e2SMagnus Damm .end = 0xe613801b, 2356d9598e2SMagnus Damm .flags = IORESOURCE_MEM, 2366d9598e2SMagnus Damm }, 2376d9598e2SMagnus Damm [1] = { 2386d9598e2SMagnus Damm .start = gic_spi(65), 2396d9598e2SMagnus Damm .flags = IORESOURCE_IRQ, 2406d9598e2SMagnus Damm }, 2416d9598e2SMagnus Damm }; 2426d9598e2SMagnus Damm 2436d9598e2SMagnus Damm static struct platform_device cmt10_device = { 2446d9598e2SMagnus Damm .name = "sh_cmt", 2456d9598e2SMagnus Damm .id = 10, 2466d9598e2SMagnus Damm .dev = { 2476d9598e2SMagnus Damm .platform_data = &cmt10_platform_data, 2486d9598e2SMagnus Damm }, 2496d9598e2SMagnus Damm .resource = cmt10_resources, 2506d9598e2SMagnus Damm .num_resources = ARRAY_SIZE(cmt10_resources), 2516d9598e2SMagnus Damm }; 2526d9598e2SMagnus Damm 2535010f3dbSMagnus Damm /* TMU */ 2545010f3dbSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 2555010f3dbSMagnus Damm .name = "TMU00", 2565010f3dbSMagnus Damm .channel_offset = 0x4, 2575010f3dbSMagnus Damm .timer_bit = 0, 2585010f3dbSMagnus Damm .clockevent_rating = 200, 2595010f3dbSMagnus Damm }; 2605010f3dbSMagnus Damm 2615010f3dbSMagnus Damm static struct resource tmu00_resources[] = { 2625010f3dbSMagnus Damm [0] = { 2635010f3dbSMagnus Damm .name = "TMU00", 2645010f3dbSMagnus Damm .start = 0xfff60008, 2655010f3dbSMagnus Damm .end = 0xfff60013, 2665010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 2675010f3dbSMagnus Damm }, 2685010f3dbSMagnus Damm [1] = { 2695010f3dbSMagnus Damm .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ 2705010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 2715010f3dbSMagnus Damm }, 2725010f3dbSMagnus Damm }; 2735010f3dbSMagnus Damm 2745010f3dbSMagnus Damm static struct platform_device tmu00_device = { 2755010f3dbSMagnus Damm .name = "sh_tmu", 2765010f3dbSMagnus Damm .id = 0, 2775010f3dbSMagnus Damm .dev = { 2785010f3dbSMagnus Damm .platform_data = &tmu00_platform_data, 2795010f3dbSMagnus Damm }, 2805010f3dbSMagnus Damm .resource = tmu00_resources, 2815010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 2825010f3dbSMagnus Damm }; 2835010f3dbSMagnus Damm 2845010f3dbSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 2855010f3dbSMagnus Damm .name = "TMU01", 2865010f3dbSMagnus Damm .channel_offset = 0x10, 2875010f3dbSMagnus Damm .timer_bit = 1, 2885010f3dbSMagnus Damm .clocksource_rating = 200, 2895010f3dbSMagnus Damm }; 2905010f3dbSMagnus Damm 2915010f3dbSMagnus Damm static struct resource tmu01_resources[] = { 2925010f3dbSMagnus Damm [0] = { 2935010f3dbSMagnus Damm .name = "TMU01", 2945010f3dbSMagnus Damm .start = 0xfff60014, 2955010f3dbSMagnus Damm .end = 0xfff6001f, 2965010f3dbSMagnus Damm .flags = IORESOURCE_MEM, 2975010f3dbSMagnus Damm }, 2985010f3dbSMagnus Damm [1] = { 2995010f3dbSMagnus Damm .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ 3005010f3dbSMagnus Damm .flags = IORESOURCE_IRQ, 3015010f3dbSMagnus Damm }, 3025010f3dbSMagnus Damm }; 3035010f3dbSMagnus Damm 3045010f3dbSMagnus Damm static struct platform_device tmu01_device = { 3055010f3dbSMagnus Damm .name = "sh_tmu", 3065010f3dbSMagnus Damm .id = 1, 3075010f3dbSMagnus Damm .dev = { 3085010f3dbSMagnus Damm .platform_data = &tmu01_platform_data, 3095010f3dbSMagnus Damm }, 3105010f3dbSMagnus Damm .resource = tmu01_resources, 3115010f3dbSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 3125010f3dbSMagnus Damm }; 3135010f3dbSMagnus Damm 314b028f94bSYoshii Takashi static struct resource i2c0_resources[] = { 315b028f94bSYoshii Takashi [0] = { 316b028f94bSYoshii Takashi .name = "IIC0", 317b028f94bSYoshii Takashi .start = 0xe6820000, 318b028f94bSYoshii Takashi .end = 0xe6820425 - 1, 319b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 320b028f94bSYoshii Takashi }, 321b028f94bSYoshii Takashi [1] = { 322b028f94bSYoshii Takashi .start = gic_spi(167), 323b028f94bSYoshii Takashi .end = gic_spi(170), 324b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 325b028f94bSYoshii Takashi }, 326b028f94bSYoshii Takashi }; 327b028f94bSYoshii Takashi 328b028f94bSYoshii Takashi static struct resource i2c1_resources[] = { 329b028f94bSYoshii Takashi [0] = { 330b028f94bSYoshii Takashi .name = "IIC1", 331b028f94bSYoshii Takashi .start = 0xe6822000, 332b028f94bSYoshii Takashi .end = 0xe6822425 - 1, 333b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 334b028f94bSYoshii Takashi }, 335b028f94bSYoshii Takashi [1] = { 336b028f94bSYoshii Takashi .start = gic_spi(51), 337b028f94bSYoshii Takashi .end = gic_spi(54), 338b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 339b028f94bSYoshii Takashi }, 340b028f94bSYoshii Takashi }; 341b028f94bSYoshii Takashi 342b028f94bSYoshii Takashi static struct resource i2c2_resources[] = { 343b028f94bSYoshii Takashi [0] = { 344b028f94bSYoshii Takashi .name = "IIC2", 345b028f94bSYoshii Takashi .start = 0xe6824000, 346b028f94bSYoshii Takashi .end = 0xe6824425 - 1, 347b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 348b028f94bSYoshii Takashi }, 349b028f94bSYoshii Takashi [1] = { 350b028f94bSYoshii Takashi .start = gic_spi(171), 351b028f94bSYoshii Takashi .end = gic_spi(174), 352b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 353b028f94bSYoshii Takashi }, 354b028f94bSYoshii Takashi }; 355b028f94bSYoshii Takashi 356b028f94bSYoshii Takashi static struct resource i2c3_resources[] = { 357b028f94bSYoshii Takashi [0] = { 358b028f94bSYoshii Takashi .name = "IIC3", 359b028f94bSYoshii Takashi .start = 0xe6826000, 360b028f94bSYoshii Takashi .end = 0xe6826425 - 1, 361b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 362b028f94bSYoshii Takashi }, 363b028f94bSYoshii Takashi [1] = { 364b028f94bSYoshii Takashi .start = gic_spi(183), 365b028f94bSYoshii Takashi .end = gic_spi(186), 366b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 367b028f94bSYoshii Takashi }, 368b028f94bSYoshii Takashi }; 369b028f94bSYoshii Takashi 370b028f94bSYoshii Takashi static struct resource i2c4_resources[] = { 371b028f94bSYoshii Takashi [0] = { 372b028f94bSYoshii Takashi .name = "IIC4", 373b028f94bSYoshii Takashi .start = 0xe6828000, 374b028f94bSYoshii Takashi .end = 0xe6828425 - 1, 375b028f94bSYoshii Takashi .flags = IORESOURCE_MEM, 376b028f94bSYoshii Takashi }, 377b028f94bSYoshii Takashi [1] = { 378b028f94bSYoshii Takashi .start = gic_spi(187), 379b028f94bSYoshii Takashi .end = gic_spi(190), 380b028f94bSYoshii Takashi .flags = IORESOURCE_IRQ, 381b028f94bSYoshii Takashi }, 382b028f94bSYoshii Takashi }; 383b028f94bSYoshii Takashi 384b028f94bSYoshii Takashi static struct platform_device i2c0_device = { 385b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 386b028f94bSYoshii Takashi .id = 0, 387b028f94bSYoshii Takashi .resource = i2c0_resources, 388b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c0_resources), 389b028f94bSYoshii Takashi }; 390b028f94bSYoshii Takashi 391b028f94bSYoshii Takashi static struct platform_device i2c1_device = { 392b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 393b028f94bSYoshii Takashi .id = 1, 394b028f94bSYoshii Takashi .resource = i2c1_resources, 395b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c1_resources), 396b028f94bSYoshii Takashi }; 397b028f94bSYoshii Takashi 398b028f94bSYoshii Takashi static struct platform_device i2c2_device = { 399b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 400b028f94bSYoshii Takashi .id = 2, 401b028f94bSYoshii Takashi .resource = i2c2_resources, 402b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c2_resources), 403b028f94bSYoshii Takashi }; 404b028f94bSYoshii Takashi 405b028f94bSYoshii Takashi static struct platform_device i2c3_device = { 406b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 407b028f94bSYoshii Takashi .id = 3, 408b028f94bSYoshii Takashi .resource = i2c3_resources, 409b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c3_resources), 410b028f94bSYoshii Takashi }; 411b028f94bSYoshii Takashi 412b028f94bSYoshii Takashi static struct platform_device i2c4_device = { 413b028f94bSYoshii Takashi .name = "i2c-sh_mobile", 414b028f94bSYoshii Takashi .id = 4, 415b028f94bSYoshii Takashi .resource = i2c4_resources, 416b028f94bSYoshii Takashi .num_resources = ARRAY_SIZE(i2c4_resources), 417b028f94bSYoshii Takashi }; 418b028f94bSYoshii Takashi 419681e1b3eSMagnus Damm static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 420681e1b3eSMagnus Damm { 421681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_TX, 422681e1b3eSMagnus Damm .addr = 0xe6c40020, 423681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 424681e1b3eSMagnus Damm .mid_rid = 0x21, 425681e1b3eSMagnus Damm }, { 426681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF0_RX, 427681e1b3eSMagnus Damm .addr = 0xe6c40024, 428681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 429681e1b3eSMagnus Damm .mid_rid = 0x22, 430681e1b3eSMagnus Damm }, { 431681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_TX, 432681e1b3eSMagnus Damm .addr = 0xe6c50020, 433681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 434681e1b3eSMagnus Damm .mid_rid = 0x25, 435681e1b3eSMagnus Damm }, { 436681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF1_RX, 437681e1b3eSMagnus Damm .addr = 0xe6c50024, 438681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 439681e1b3eSMagnus Damm .mid_rid = 0x26, 440681e1b3eSMagnus Damm }, { 441681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_TX, 442681e1b3eSMagnus Damm .addr = 0xe6c60020, 443681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 444681e1b3eSMagnus Damm .mid_rid = 0x29, 445681e1b3eSMagnus Damm }, { 446681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF2_RX, 447681e1b3eSMagnus Damm .addr = 0xe6c60024, 448681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 449681e1b3eSMagnus Damm .mid_rid = 0x2a, 450681e1b3eSMagnus Damm }, { 451681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_TX, 452681e1b3eSMagnus Damm .addr = 0xe6c70020, 453681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 454681e1b3eSMagnus Damm .mid_rid = 0x2d, 455681e1b3eSMagnus Damm }, { 456681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF3_RX, 457681e1b3eSMagnus Damm .addr = 0xe6c70024, 458681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 459681e1b3eSMagnus Damm .mid_rid = 0x2e, 460681e1b3eSMagnus Damm }, { 461681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_TX, 462681e1b3eSMagnus Damm .addr = 0xe6c80020, 463681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 464681e1b3eSMagnus Damm .mid_rid = 0x39, 465681e1b3eSMagnus Damm }, { 466681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF4_RX, 467681e1b3eSMagnus Damm .addr = 0xe6c80024, 468681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 469681e1b3eSMagnus Damm .mid_rid = 0x3a, 470681e1b3eSMagnus Damm }, { 471681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_TX, 472681e1b3eSMagnus Damm .addr = 0xe6cb0020, 473681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 474681e1b3eSMagnus Damm .mid_rid = 0x35, 475681e1b3eSMagnus Damm }, { 476681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF5_RX, 477681e1b3eSMagnus Damm .addr = 0xe6cb0024, 478681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 479681e1b3eSMagnus Damm .mid_rid = 0x36, 480681e1b3eSMagnus Damm }, { 481681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_TX, 482681e1b3eSMagnus Damm .addr = 0xe6cc0020, 483681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 484681e1b3eSMagnus Damm .mid_rid = 0x1d, 485681e1b3eSMagnus Damm }, { 486681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF6_RX, 487681e1b3eSMagnus Damm .addr = 0xe6cc0024, 488681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 489681e1b3eSMagnus Damm .mid_rid = 0x1e, 490681e1b3eSMagnus Damm }, { 491681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_TX, 492681e1b3eSMagnus Damm .addr = 0xe6cd0020, 493681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 494681e1b3eSMagnus Damm .mid_rid = 0x19, 495681e1b3eSMagnus Damm }, { 496681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF7_RX, 497681e1b3eSMagnus Damm .addr = 0xe6cd0024, 498681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 499681e1b3eSMagnus Damm .mid_rid = 0x1a, 500681e1b3eSMagnus Damm }, { 501681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_TX, 502681e1b3eSMagnus Damm .addr = 0xe6c30040, 503681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_8BIT), 504681e1b3eSMagnus Damm .mid_rid = 0x3d, 505681e1b3eSMagnus Damm }, { 506681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SCIF8_RX, 507681e1b3eSMagnus Damm .addr = 0xe6c30060, 508681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_8BIT), 509681e1b3eSMagnus Damm .mid_rid = 0x3e, 510681e1b3eSMagnus Damm }, { 511681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_TX, 512681e1b3eSMagnus Damm .addr = 0xee100030, 513681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 514681e1b3eSMagnus Damm .mid_rid = 0xc1, 515681e1b3eSMagnus Damm }, { 516681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI0_RX, 517681e1b3eSMagnus Damm .addr = 0xee100030, 518681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 519681e1b3eSMagnus Damm .mid_rid = 0xc2, 520681e1b3eSMagnus Damm }, { 521681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_TX, 522681e1b3eSMagnus Damm .addr = 0xee120030, 523681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 524681e1b3eSMagnus Damm .mid_rid = 0xc9, 525681e1b3eSMagnus Damm }, { 526681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI1_RX, 527681e1b3eSMagnus Damm .addr = 0xee120030, 528681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 529681e1b3eSMagnus Damm .mid_rid = 0xca, 530681e1b3eSMagnus Damm }, { 531681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_TX, 532681e1b3eSMagnus Damm .addr = 0xee140030, 533681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_16BIT), 534681e1b3eSMagnus Damm .mid_rid = 0xcd, 535681e1b3eSMagnus Damm }, { 536681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_SDHI2_RX, 537681e1b3eSMagnus Damm .addr = 0xee140030, 538681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_16BIT), 539681e1b3eSMagnus Damm .mid_rid = 0xce, 540681e1b3eSMagnus Damm }, { 541681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_TX, 542681e1b3eSMagnus Damm .addr = 0xe6bd0034, 543681e1b3eSMagnus Damm .chcr = CHCR_TX(XMIT_SZ_32BIT), 544681e1b3eSMagnus Damm .mid_rid = 0xd1, 545681e1b3eSMagnus Damm }, { 546681e1b3eSMagnus Damm .slave_id = SHDMA_SLAVE_MMCIF_RX, 547681e1b3eSMagnus Damm .addr = 0xe6bd0034, 548681e1b3eSMagnus Damm .chcr = CHCR_RX(XMIT_SZ_32BIT), 549681e1b3eSMagnus Damm .mid_rid = 0xd2, 550681e1b3eSMagnus Damm }, 551681e1b3eSMagnus Damm }; 552681e1b3eSMagnus Damm 553681e1b3eSMagnus Damm #define DMAE_CHANNEL(_offset) \ 554681e1b3eSMagnus Damm { \ 555681e1b3eSMagnus Damm .offset = _offset - 0x20, \ 556681e1b3eSMagnus Damm .dmars = _offset - 0x20 + 0x40, \ 557681e1b3eSMagnus Damm } 558681e1b3eSMagnus Damm 559681e1b3eSMagnus Damm static const struct sh_dmae_channel sh73a0_dmae_channels[] = { 560681e1b3eSMagnus Damm DMAE_CHANNEL(0x8000), 561681e1b3eSMagnus Damm DMAE_CHANNEL(0x8080), 562681e1b3eSMagnus Damm DMAE_CHANNEL(0x8100), 563681e1b3eSMagnus Damm DMAE_CHANNEL(0x8180), 564681e1b3eSMagnus Damm DMAE_CHANNEL(0x8200), 565681e1b3eSMagnus Damm DMAE_CHANNEL(0x8280), 566681e1b3eSMagnus Damm DMAE_CHANNEL(0x8300), 567681e1b3eSMagnus Damm DMAE_CHANNEL(0x8380), 568681e1b3eSMagnus Damm DMAE_CHANNEL(0x8400), 569681e1b3eSMagnus Damm DMAE_CHANNEL(0x8480), 570681e1b3eSMagnus Damm DMAE_CHANNEL(0x8500), 571681e1b3eSMagnus Damm DMAE_CHANNEL(0x8580), 572681e1b3eSMagnus Damm DMAE_CHANNEL(0x8600), 573681e1b3eSMagnus Damm DMAE_CHANNEL(0x8680), 574681e1b3eSMagnus Damm DMAE_CHANNEL(0x8700), 575681e1b3eSMagnus Damm DMAE_CHANNEL(0x8780), 576681e1b3eSMagnus Damm DMAE_CHANNEL(0x8800), 577681e1b3eSMagnus Damm DMAE_CHANNEL(0x8880), 578681e1b3eSMagnus Damm DMAE_CHANNEL(0x8900), 579681e1b3eSMagnus Damm DMAE_CHANNEL(0x8980), 580681e1b3eSMagnus Damm }; 581681e1b3eSMagnus Damm 582681e1b3eSMagnus Damm static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 583681e1b3eSMagnus Damm .slave = sh73a0_dmae_slaves, 584681e1b3eSMagnus Damm .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 585681e1b3eSMagnus Damm .channel = sh73a0_dmae_channels, 586681e1b3eSMagnus Damm .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 5876088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 5886088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 5896088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 5906088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 5916088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 5926088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 593681e1b3eSMagnus Damm .dmaor_init = DMAOR_DME, 594681e1b3eSMagnus Damm }; 595681e1b3eSMagnus Damm 596681e1b3eSMagnus Damm static struct resource sh73a0_dmae_resources[] = { 597681e1b3eSMagnus Damm { 598681e1b3eSMagnus Damm /* Registers including DMAOR and channels including DMARSx */ 599681e1b3eSMagnus Damm .start = 0xfe000020, 600681e1b3eSMagnus Damm .end = 0xfe008a00 - 1, 601681e1b3eSMagnus Damm .flags = IORESOURCE_MEM, 602681e1b3eSMagnus Damm }, 603681e1b3eSMagnus Damm { 60420052462SShimoda, Yoshihiro .name = "error_irq", 605681e1b3eSMagnus Damm .start = gic_spi(129), 606681e1b3eSMagnus Damm .end = gic_spi(129), 607681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 608681e1b3eSMagnus Damm }, 609681e1b3eSMagnus Damm { 610681e1b3eSMagnus Damm /* IRQ for channels 0-19 */ 611681e1b3eSMagnus Damm .start = gic_spi(109), 612681e1b3eSMagnus Damm .end = gic_spi(128), 613681e1b3eSMagnus Damm .flags = IORESOURCE_IRQ, 614681e1b3eSMagnus Damm }, 615681e1b3eSMagnus Damm }; 616681e1b3eSMagnus Damm 617681e1b3eSMagnus Damm static struct platform_device dma0_device = { 618681e1b3eSMagnus Damm .name = "sh-dma-engine", 619681e1b3eSMagnus Damm .id = 0, 620681e1b3eSMagnus Damm .resource = sh73a0_dmae_resources, 621681e1b3eSMagnus Damm .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), 622681e1b3eSMagnus Damm .dev = { 623681e1b3eSMagnus Damm .platform_data = &sh73a0_dmae_platform_data, 624681e1b3eSMagnus Damm }, 625681e1b3eSMagnus Damm }; 626681e1b3eSMagnus Damm 627832290b2SKuninori Morimoto /* MPDMAC */ 628832290b2SKuninori Morimoto static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { 629832290b2SKuninori Morimoto { 630832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_RX, 631832290b2SKuninori Morimoto .addr = 0xec230020, 632832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 633832290b2SKuninori Morimoto .mid_rid = 0xd6, /* CHECK ME */ 634832290b2SKuninori Morimoto }, { 635832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2A_TX, 636832290b2SKuninori Morimoto .addr = 0xec230024, 637832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 638832290b2SKuninori Morimoto .mid_rid = 0xd5, /* CHECK ME */ 639832290b2SKuninori Morimoto }, { 640832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_RX, 641832290b2SKuninori Morimoto .addr = 0xec230060, 642832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 643832290b2SKuninori Morimoto .mid_rid = 0xda, /* CHECK ME */ 644832290b2SKuninori Morimoto }, { 645832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2C_TX, 646832290b2SKuninori Morimoto .addr = 0xec230064, 647832290b2SKuninori Morimoto .chcr = CHCR_TX(XMIT_SZ_32BIT), 648832290b2SKuninori Morimoto .mid_rid = 0xd9, /* CHECK ME */ 649832290b2SKuninori Morimoto }, { 650832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_RX, 651832290b2SKuninori Morimoto .addr = 0xec240020, 652832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 653832290b2SKuninori Morimoto .mid_rid = 0x8e, /* CHECK ME */ 654832290b2SKuninori Morimoto }, { 655832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2B_TX, 656832290b2SKuninori Morimoto .addr = 0xec240024, 657832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 658832290b2SKuninori Morimoto .mid_rid = 0x8d, /* CHECK ME */ 659832290b2SKuninori Morimoto }, { 660832290b2SKuninori Morimoto .slave_id = SHDMA_SLAVE_FSI2D_RX, 661832290b2SKuninori Morimoto .addr = 0xec240060, 662832290b2SKuninori Morimoto .chcr = CHCR_RX(XMIT_SZ_32BIT), 663832290b2SKuninori Morimoto .mid_rid = 0x9a, /* CHECK ME */ 664832290b2SKuninori Morimoto }, 665832290b2SKuninori Morimoto }; 666832290b2SKuninori Morimoto 667832290b2SKuninori Morimoto #define MPDMA_CHANNEL(a, b, c) \ 668832290b2SKuninori Morimoto { \ 669832290b2SKuninori Morimoto .offset = a, \ 670832290b2SKuninori Morimoto .dmars = b, \ 671832290b2SKuninori Morimoto .dmars_bit = c, \ 672832290b2SKuninori Morimoto .chclr_offset = (0x220 - 0x20) + a \ 673832290b2SKuninori Morimoto } 674832290b2SKuninori Morimoto 675832290b2SKuninori Morimoto static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { 676832290b2SKuninori Morimoto MPDMA_CHANNEL(0x00, 0, 0), 677832290b2SKuninori Morimoto MPDMA_CHANNEL(0x10, 0, 8), 678832290b2SKuninori Morimoto MPDMA_CHANNEL(0x20, 4, 0), 679832290b2SKuninori Morimoto MPDMA_CHANNEL(0x30, 4, 8), 680832290b2SKuninori Morimoto MPDMA_CHANNEL(0x50, 8, 0), 681832290b2SKuninori Morimoto MPDMA_CHANNEL(0x70, 8, 8), 682832290b2SKuninori Morimoto }; 683832290b2SKuninori Morimoto 684832290b2SKuninori Morimoto static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { 685832290b2SKuninori Morimoto .slave = sh73a0_mpdma_slaves, 686832290b2SKuninori Morimoto .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), 687832290b2SKuninori Morimoto .channel = sh73a0_mpdma_channels, 688832290b2SKuninori Morimoto .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), 6896088b422SKuninori Morimoto .ts_low_shift = TS_LOW_SHIFT, 6906088b422SKuninori Morimoto .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, 6916088b422SKuninori Morimoto .ts_high_shift = TS_HI_SHIFT, 6926088b422SKuninori Morimoto .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, 6936088b422SKuninori Morimoto .ts_shift = dma_ts_shift, 6946088b422SKuninori Morimoto .ts_shift_num = ARRAY_SIZE(dma_ts_shift), 695832290b2SKuninori Morimoto .dmaor_init = DMAOR_DME, 696832290b2SKuninori Morimoto .chclr_present = 1, 697832290b2SKuninori Morimoto }; 698832290b2SKuninori Morimoto 699832290b2SKuninori Morimoto /* Resource order important! */ 700832290b2SKuninori Morimoto static struct resource sh73a0_mpdma_resources[] = { 701832290b2SKuninori Morimoto { 702832290b2SKuninori Morimoto /* Channel registers and DMAOR */ 703832290b2SKuninori Morimoto .start = 0xec618020, 704832290b2SKuninori Morimoto .end = 0xec61828f, 705832290b2SKuninori Morimoto .flags = IORESOURCE_MEM, 706832290b2SKuninori Morimoto }, 707832290b2SKuninori Morimoto { 708832290b2SKuninori Morimoto /* DMARSx */ 709832290b2SKuninori Morimoto .start = 0xec619000, 710832290b2SKuninori Morimoto .end = 0xec61900b, 711832290b2SKuninori Morimoto .flags = IORESOURCE_MEM, 712832290b2SKuninori Morimoto }, 713832290b2SKuninori Morimoto { 714832290b2SKuninori Morimoto .name = "error_irq", 715832290b2SKuninori Morimoto .start = gic_spi(181), 716832290b2SKuninori Morimoto .end = gic_spi(181), 717832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 718832290b2SKuninori Morimoto }, 719832290b2SKuninori Morimoto { 720832290b2SKuninori Morimoto /* IRQ for channels 0-5 */ 721832290b2SKuninori Morimoto .start = gic_spi(175), 722832290b2SKuninori Morimoto .end = gic_spi(180), 723832290b2SKuninori Morimoto .flags = IORESOURCE_IRQ, 724832290b2SKuninori Morimoto }, 725832290b2SKuninori Morimoto }; 726832290b2SKuninori Morimoto 727832290b2SKuninori Morimoto static struct platform_device mpdma0_device = { 728832290b2SKuninori Morimoto .name = "sh-dma-engine", 729832290b2SKuninori Morimoto .id = 1, 730832290b2SKuninori Morimoto .resource = sh73a0_mpdma_resources, 731832290b2SKuninori Morimoto .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), 732832290b2SKuninori Morimoto .dev = { 733832290b2SKuninori Morimoto .platform_data = &sh73a0_mpdma_platform_data, 734832290b2SKuninori Morimoto }, 735832290b2SKuninori Morimoto }; 736832290b2SKuninori Morimoto 7376d9598e2SMagnus Damm static struct platform_device *sh73a0_early_devices[] __initdata = { 7386d9598e2SMagnus Damm &scif0_device, 7396d9598e2SMagnus Damm &scif1_device, 7406d9598e2SMagnus Damm &scif2_device, 7416d9598e2SMagnus Damm &scif3_device, 7426d9598e2SMagnus Damm &scif4_device, 7436d9598e2SMagnus Damm &scif5_device, 7446d9598e2SMagnus Damm &scif6_device, 7456d9598e2SMagnus Damm &scif7_device, 7466d9598e2SMagnus Damm &scif8_device, 7476d9598e2SMagnus Damm &cmt10_device, 7485010f3dbSMagnus Damm &tmu00_device, 7495010f3dbSMagnus Damm &tmu01_device, 7506d9598e2SMagnus Damm }; 7516d9598e2SMagnus Damm 752b028f94bSYoshii Takashi static struct platform_device *sh73a0_late_devices[] __initdata = { 753b028f94bSYoshii Takashi &i2c0_device, 754b028f94bSYoshii Takashi &i2c1_device, 755b028f94bSYoshii Takashi &i2c2_device, 756b028f94bSYoshii Takashi &i2c3_device, 757b028f94bSYoshii Takashi &i2c4_device, 758681e1b3eSMagnus Damm &dma0_device, 759832290b2SKuninori Morimoto &mpdma0_device, 760b028f94bSYoshii Takashi }; 761b028f94bSYoshii Takashi 7620a4b04dcSArnd Bergmann #define SRCR2 IOMEM(0xe61580b0) 763681e1b3eSMagnus Damm 7646d9598e2SMagnus Damm void __init sh73a0_add_standard_devices(void) 7656d9598e2SMagnus Damm { 766681e1b3eSMagnus Damm /* Clear software reset bit on SY-DMAC module */ 767681e1b3eSMagnus Damm __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 768681e1b3eSMagnus Damm 7696d9598e2SMagnus Damm platform_add_devices(sh73a0_early_devices, 7706d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 771b028f94bSYoshii Takashi platform_add_devices(sh73a0_late_devices, 772b028f94bSYoshii Takashi ARRAY_SIZE(sh73a0_late_devices)); 7736d9598e2SMagnus Damm } 7746d9598e2SMagnus Damm 775d6720003SKuninori Morimoto /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 776d6720003SKuninori Morimoto void __init __weak sh73a0_register_twd(void) { } 777d6720003SKuninori Morimoto 7783be26fdbSMagnus Damm static void __init sh73a0_earlytimer_init(void) 7793be26fdbSMagnus Damm { 7803be26fdbSMagnus Damm sh73a0_clock_init(); 7813be26fdbSMagnus Damm shmobile_earlytimer_init(); 782d6720003SKuninori Morimoto sh73a0_register_twd(); 7833be26fdbSMagnus Damm } 7843be26fdbSMagnus Damm 7856d9598e2SMagnus Damm void __init sh73a0_add_early_devices(void) 7866d9598e2SMagnus Damm { 7876d9598e2SMagnus Damm early_platform_add_devices(sh73a0_early_devices, 7886d9598e2SMagnus Damm ARRAY_SIZE(sh73a0_early_devices)); 78950e15c34SMagnus Damm 79050e15c34SMagnus Damm /* setup early console here as well */ 79150e15c34SMagnus Damm shmobile_setup_console(); 7923be26fdbSMagnus Damm 7933be26fdbSMagnus Damm /* override timer setup with soc-specific code */ 7943be26fdbSMagnus Damm shmobile_timer.init = sh73a0_earlytimer_init; 7956d9598e2SMagnus Damm } 796