1f411fadeSMagnus Damm /* 2f411fadeSMagnus Damm * r8a7779 processor support 3f411fadeSMagnus Damm * 4f411fadeSMagnus Damm * Copyright (C) 2011 Renesas Solutions Corp. 5f411fadeSMagnus Damm * Copyright (C) 2011 Magnus Damm 6f411fadeSMagnus Damm * 7f411fadeSMagnus Damm * This program is free software; you can redistribute it and/or modify 8f411fadeSMagnus Damm * it under the terms of the GNU General Public License as published by 9f411fadeSMagnus Damm * the Free Software Foundation; version 2 of the License. 10f411fadeSMagnus Damm * 11f411fadeSMagnus Damm * This program is distributed in the hope that it will be useful, 12f411fadeSMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 13f411fadeSMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14f411fadeSMagnus Damm * GNU General Public License for more details. 15f411fadeSMagnus Damm * 16f411fadeSMagnus Damm * You should have received a copy of the GNU General Public License 17f411fadeSMagnus Damm * along with this program; if not, write to the Free Software 18f411fadeSMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19f411fadeSMagnus Damm */ 20f411fadeSMagnus Damm #include <linux/kernel.h> 21f411fadeSMagnus Damm #include <linux/init.h> 22f411fadeSMagnus Damm #include <linux/interrupt.h> 23f411fadeSMagnus Damm #include <linux/irq.h> 24f411fadeSMagnus Damm #include <linux/platform_device.h> 25f411fadeSMagnus Damm #include <linux/delay.h> 26f411fadeSMagnus Damm #include <linux/input.h> 27f411fadeSMagnus Damm #include <linux/io.h> 28f411fadeSMagnus Damm #include <linux/serial_sci.h> 29f411fadeSMagnus Damm #include <linux/sh_intc.h> 30f411fadeSMagnus Damm #include <linux/sh_timer.h> 31f411fadeSMagnus Damm #include <mach/hardware.h> 32f411fadeSMagnus Damm #include <mach/r8a7779.h> 33a662c082SMagnus Damm #include <mach/common.h> 34f411fadeSMagnus Damm #include <asm/mach-types.h> 35f411fadeSMagnus Damm #include <asm/mach/arch.h> 36df27a2d8SMagnus Damm #include <asm/mach/time.h> 373e353b87SMagnus Damm #include <asm/mach/map.h> 388bac13f5SMagnus Damm #include <asm/hardware/cache-l2x0.h> 393e353b87SMagnus Damm 403e353b87SMagnus Damm static struct map_desc r8a7779_io_desc[] __initdata = { 413e353b87SMagnus Damm /* 2M entity map for 0xf0000000 (MPCORE) */ 423e353b87SMagnus Damm { 433e353b87SMagnus Damm .virtual = 0xf0000000, 443e353b87SMagnus Damm .pfn = __phys_to_pfn(0xf0000000), 453e353b87SMagnus Damm .length = SZ_2M, 463e353b87SMagnus Damm .type = MT_DEVICE_NONSHARED 473e353b87SMagnus Damm }, 483e353b87SMagnus Damm /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */ 493e353b87SMagnus Damm { 503e353b87SMagnus Damm .virtual = 0xfe000000, 513e353b87SMagnus Damm .pfn = __phys_to_pfn(0xfe000000), 523e353b87SMagnus Damm .length = SZ_16M, 533e353b87SMagnus Damm .type = MT_DEVICE_NONSHARED 543e353b87SMagnus Damm }, 553e353b87SMagnus Damm }; 563e353b87SMagnus Damm 573e353b87SMagnus Damm void __init r8a7779_map_io(void) 583e353b87SMagnus Damm { 593e353b87SMagnus Damm iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); 603e353b87SMagnus Damm } 61f411fadeSMagnus Damm 62f411fadeSMagnus Damm static struct plat_sci_port scif0_platform_data = { 63f411fadeSMagnus Damm .mapbase = 0xffe40000, 64f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 65f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 66f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 67f411fadeSMagnus Damm .type = PORT_SCIF, 68f411fadeSMagnus Damm .irqs = { gic_spi(88), gic_spi(88), 69f411fadeSMagnus Damm gic_spi(88), gic_spi(88) }, 70f411fadeSMagnus Damm }; 71f411fadeSMagnus Damm 72f411fadeSMagnus Damm static struct platform_device scif0_device = { 73f411fadeSMagnus Damm .name = "sh-sci", 74f411fadeSMagnus Damm .id = 0, 75f411fadeSMagnus Damm .dev = { 76f411fadeSMagnus Damm .platform_data = &scif0_platform_data, 77f411fadeSMagnus Damm }, 78f411fadeSMagnus Damm }; 79f411fadeSMagnus Damm 80f411fadeSMagnus Damm static struct plat_sci_port scif1_platform_data = { 81f411fadeSMagnus Damm .mapbase = 0xffe41000, 82f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 83f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 84f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 85f411fadeSMagnus Damm .type = PORT_SCIF, 86f411fadeSMagnus Damm .irqs = { gic_spi(89), gic_spi(89), 87f411fadeSMagnus Damm gic_spi(89), gic_spi(89) }, 88f411fadeSMagnus Damm }; 89f411fadeSMagnus Damm 90f411fadeSMagnus Damm static struct platform_device scif1_device = { 91f411fadeSMagnus Damm .name = "sh-sci", 92f411fadeSMagnus Damm .id = 1, 93f411fadeSMagnus Damm .dev = { 94f411fadeSMagnus Damm .platform_data = &scif1_platform_data, 95f411fadeSMagnus Damm }, 96f411fadeSMagnus Damm }; 97f411fadeSMagnus Damm 98f411fadeSMagnus Damm static struct plat_sci_port scif2_platform_data = { 99f411fadeSMagnus Damm .mapbase = 0xffe42000, 100f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 101f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 102f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 103f411fadeSMagnus Damm .type = PORT_SCIF, 104f411fadeSMagnus Damm .irqs = { gic_spi(90), gic_spi(90), 105f411fadeSMagnus Damm gic_spi(90), gic_spi(90) }, 106f411fadeSMagnus Damm }; 107f411fadeSMagnus Damm 108f411fadeSMagnus Damm static struct platform_device scif2_device = { 109f411fadeSMagnus Damm .name = "sh-sci", 110f411fadeSMagnus Damm .id = 2, 111f411fadeSMagnus Damm .dev = { 112f411fadeSMagnus Damm .platform_data = &scif2_platform_data, 113f411fadeSMagnus Damm }, 114f411fadeSMagnus Damm }; 115f411fadeSMagnus Damm 116f411fadeSMagnus Damm static struct plat_sci_port scif3_platform_data = { 117f411fadeSMagnus Damm .mapbase = 0xffe43000, 118f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 119f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 120f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 121f411fadeSMagnus Damm .type = PORT_SCIF, 122f411fadeSMagnus Damm .irqs = { gic_spi(91), gic_spi(91), 123f411fadeSMagnus Damm gic_spi(91), gic_spi(91) }, 124f411fadeSMagnus Damm }; 125f411fadeSMagnus Damm 126f411fadeSMagnus Damm static struct platform_device scif3_device = { 127f411fadeSMagnus Damm .name = "sh-sci", 128f411fadeSMagnus Damm .id = 3, 129f411fadeSMagnus Damm .dev = { 130f411fadeSMagnus Damm .platform_data = &scif3_platform_data, 131f411fadeSMagnus Damm }, 132f411fadeSMagnus Damm }; 133f411fadeSMagnus Damm 134f411fadeSMagnus Damm static struct plat_sci_port scif4_platform_data = { 135f411fadeSMagnus Damm .mapbase = 0xffe44000, 136f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 137f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 138f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 139f411fadeSMagnus Damm .type = PORT_SCIF, 140f411fadeSMagnus Damm .irqs = { gic_spi(92), gic_spi(92), 141f411fadeSMagnus Damm gic_spi(92), gic_spi(92) }, 142f411fadeSMagnus Damm }; 143f411fadeSMagnus Damm 144f411fadeSMagnus Damm static struct platform_device scif4_device = { 145f411fadeSMagnus Damm .name = "sh-sci", 146f411fadeSMagnus Damm .id = 4, 147f411fadeSMagnus Damm .dev = { 148f411fadeSMagnus Damm .platform_data = &scif4_platform_data, 149f411fadeSMagnus Damm }, 150f411fadeSMagnus Damm }; 151f411fadeSMagnus Damm 152f411fadeSMagnus Damm static struct plat_sci_port scif5_platform_data = { 153f411fadeSMagnus Damm .mapbase = 0xffe45000, 154f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 155f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 156f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 157f411fadeSMagnus Damm .type = PORT_SCIF, 158f411fadeSMagnus Damm .irqs = { gic_spi(93), gic_spi(93), 159f411fadeSMagnus Damm gic_spi(93), gic_spi(93) }, 160f411fadeSMagnus Damm }; 161f411fadeSMagnus Damm 162f411fadeSMagnus Damm static struct platform_device scif5_device = { 163f411fadeSMagnus Damm .name = "sh-sci", 164f411fadeSMagnus Damm .id = 5, 165f411fadeSMagnus Damm .dev = { 166f411fadeSMagnus Damm .platform_data = &scif5_platform_data, 167f411fadeSMagnus Damm }, 168f411fadeSMagnus Damm }; 169f411fadeSMagnus Damm 170f411fadeSMagnus Damm /* TMU */ 171f411fadeSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 172f411fadeSMagnus Damm .name = "TMU00", 173f411fadeSMagnus Damm .channel_offset = 0x4, 174f411fadeSMagnus Damm .timer_bit = 0, 175f411fadeSMagnus Damm .clockevent_rating = 200, 176f411fadeSMagnus Damm }; 177f411fadeSMagnus Damm 178f411fadeSMagnus Damm static struct resource tmu00_resources[] = { 179f411fadeSMagnus Damm [0] = { 180f411fadeSMagnus Damm .name = "TMU00", 181f411fadeSMagnus Damm .start = 0xffd80008, 182f411fadeSMagnus Damm .end = 0xffd80013, 183f411fadeSMagnus Damm .flags = IORESOURCE_MEM, 184f411fadeSMagnus Damm }, 185f411fadeSMagnus Damm [1] = { 186f411fadeSMagnus Damm .start = gic_spi(32), 187f411fadeSMagnus Damm .flags = IORESOURCE_IRQ, 188f411fadeSMagnus Damm }, 189f411fadeSMagnus Damm }; 190f411fadeSMagnus Damm 191f411fadeSMagnus Damm static struct platform_device tmu00_device = { 192f411fadeSMagnus Damm .name = "sh_tmu", 193f411fadeSMagnus Damm .id = 0, 194f411fadeSMagnus Damm .dev = { 195f411fadeSMagnus Damm .platform_data = &tmu00_platform_data, 196f411fadeSMagnus Damm }, 197f411fadeSMagnus Damm .resource = tmu00_resources, 198f411fadeSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 199f411fadeSMagnus Damm }; 200f411fadeSMagnus Damm 201f411fadeSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 202f411fadeSMagnus Damm .name = "TMU01", 203f411fadeSMagnus Damm .channel_offset = 0x10, 204f411fadeSMagnus Damm .timer_bit = 1, 205f411fadeSMagnus Damm .clocksource_rating = 200, 206f411fadeSMagnus Damm }; 207f411fadeSMagnus Damm 208f411fadeSMagnus Damm static struct resource tmu01_resources[] = { 209f411fadeSMagnus Damm [0] = { 210f411fadeSMagnus Damm .name = "TMU01", 211f411fadeSMagnus Damm .start = 0xffd80014, 212f411fadeSMagnus Damm .end = 0xffd8001f, 213f411fadeSMagnus Damm .flags = IORESOURCE_MEM, 214f411fadeSMagnus Damm }, 215f411fadeSMagnus Damm [1] = { 216f411fadeSMagnus Damm .start = gic_spi(33), 217f411fadeSMagnus Damm .flags = IORESOURCE_IRQ, 218f411fadeSMagnus Damm }, 219f411fadeSMagnus Damm }; 220f411fadeSMagnus Damm 221f411fadeSMagnus Damm static struct platform_device tmu01_device = { 222f411fadeSMagnus Damm .name = "sh_tmu", 223f411fadeSMagnus Damm .id = 1, 224f411fadeSMagnus Damm .dev = { 225f411fadeSMagnus Damm .platform_data = &tmu01_platform_data, 226f411fadeSMagnus Damm }, 227f411fadeSMagnus Damm .resource = tmu01_resources, 228f411fadeSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 229f411fadeSMagnus Damm }; 230f411fadeSMagnus Damm 231f411fadeSMagnus Damm static struct platform_device *r8a7779_early_devices[] __initdata = { 232f411fadeSMagnus Damm &scif0_device, 233f411fadeSMagnus Damm &scif1_device, 234f411fadeSMagnus Damm &scif2_device, 235f411fadeSMagnus Damm &scif3_device, 236f411fadeSMagnus Damm &scif4_device, 237f411fadeSMagnus Damm &scif5_device, 238f411fadeSMagnus Damm &tmu00_device, 239f411fadeSMagnus Damm &tmu01_device, 240f411fadeSMagnus Damm }; 241f411fadeSMagnus Damm 242f411fadeSMagnus Damm static struct platform_device *r8a7779_late_devices[] __initdata = { 243f411fadeSMagnus Damm }; 244f411fadeSMagnus Damm 245f411fadeSMagnus Damm void __init r8a7779_add_standard_devices(void) 246f411fadeSMagnus Damm { 2478bac13f5SMagnus Damm #ifdef CONFIG_CACHE_L2X0 2488bac13f5SMagnus Damm /* Early BRESP enable, Shared attribute override enable, 64K*16way */ 2498bac13f5SMagnus Damm l2x0_init(__io(0xf0100000), 0x40470000, 0x82000fff); 2508bac13f5SMagnus Damm #endif 251a662c082SMagnus Damm r8a7779_pm_init(); 252a662c082SMagnus Damm 253a662c082SMagnus Damm r8a7779_init_pm_domain(&r8a7779_sh4a); 254a662c082SMagnus Damm r8a7779_init_pm_domain(&r8a7779_sgx); 255a662c082SMagnus Damm r8a7779_init_pm_domain(&r8a7779_vdp1); 256a662c082SMagnus Damm r8a7779_init_pm_domain(&r8a7779_impx3); 257a662c082SMagnus Damm 258f411fadeSMagnus Damm platform_add_devices(r8a7779_early_devices, 259f411fadeSMagnus Damm ARRAY_SIZE(r8a7779_early_devices)); 260f411fadeSMagnus Damm platform_add_devices(r8a7779_late_devices, 261f411fadeSMagnus Damm ARRAY_SIZE(r8a7779_late_devices)); 262f411fadeSMagnus Damm } 263f411fadeSMagnus Damm 264df27a2d8SMagnus Damm static void __init r8a7779_earlytimer_init(void) 265df27a2d8SMagnus Damm { 266df27a2d8SMagnus Damm r8a7779_clock_init(); 267df27a2d8SMagnus Damm shmobile_earlytimer_init(); 268df27a2d8SMagnus Damm } 269df27a2d8SMagnus Damm 270f411fadeSMagnus Damm void __init r8a7779_add_early_devices(void) 271f411fadeSMagnus Damm { 272f411fadeSMagnus Damm early_platform_add_devices(r8a7779_early_devices, 273f411fadeSMagnus Damm ARRAY_SIZE(r8a7779_early_devices)); 2743e353b87SMagnus Damm 2753e353b87SMagnus Damm /* Early serial console setup is not included here due to 2763e353b87SMagnus Damm * memory map collisions. The SCIF serial ports in r8a7779 2773e353b87SMagnus Damm * are difficult to entity map 1:1 due to collision with the 2783e353b87SMagnus Damm * virtual memory range used by the coherent DMA code on ARM. 2793e353b87SMagnus Damm * 2803e353b87SMagnus Damm * Anyone wanting to debug early can remove UPF_IOREMAP from 2813e353b87SMagnus Damm * the sh-sci serial console platform data, adjust mapbase 2823e353b87SMagnus Damm * to a static M:N virt:phys mapping that needs to be added to 2833e353b87SMagnus Damm * the mappings passed with iotable_init() above. 2843e353b87SMagnus Damm * 2853e353b87SMagnus Damm * Then add a call to shmobile_setup_console() from this function. 2863e353b87SMagnus Damm * 2873e353b87SMagnus Damm * As a final step pass earlyprint=sh-sci.2,115200 on the kernel 2883e353b87SMagnus Damm * command line in case of the marzen board. 2893e353b87SMagnus Damm */ 290df27a2d8SMagnus Damm 291df27a2d8SMagnus Damm /* override timer setup with soc-specific code */ 292df27a2d8SMagnus Damm shmobile_timer.init = r8a7779_earlytimer_init; 293f411fadeSMagnus Damm } 294