1f411fadeSMagnus Damm /* 2f411fadeSMagnus Damm * r8a7779 processor support 3f411fadeSMagnus Damm * 4dace48d0SSergei Shtylyov * Copyright (C) 2011, 2013 Renesas Solutions Corp. 5f411fadeSMagnus Damm * Copyright (C) 2011 Magnus Damm 6dace48d0SSergei Shtylyov * Copyright (C) 2013 Cogent Embedded, Inc. 7f411fadeSMagnus Damm * 8f411fadeSMagnus Damm * This program is free software; you can redistribute it and/or modify 9f411fadeSMagnus Damm * it under the terms of the GNU General Public License as published by 10f411fadeSMagnus Damm * the Free Software Foundation; version 2 of the License. 11f411fadeSMagnus Damm * 12f411fadeSMagnus Damm * This program is distributed in the hope that it will be useful, 13f411fadeSMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 14f411fadeSMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15f411fadeSMagnus Damm * GNU General Public License for more details. 16f411fadeSMagnus Damm */ 17131c2e04SMagnus Damm #include <linux/clk/shmobile.h> 18131c2e04SMagnus Damm #include <linux/clocksource.h> 19f411fadeSMagnus Damm #include <linux/init.h> 20f411fadeSMagnus Damm #include <linux/irq.h> 215b3859d7SKuninori Morimoto #include <linux/irqchip.h> 225b3859d7SKuninori Morimoto #include <linux/irqchip/arm-gic.h> 231b55353cSGeert Uytterhoeven 24f411fadeSMagnus Damm #include <asm/mach/arch.h> 253e353b87SMagnus Damm #include <asm/mach/map.h> 261b55353cSGeert Uytterhoeven 27fd44aa5eSMagnus Damm #include "common.h" 281b55353cSGeert Uytterhoeven #include "r8a7779.h" 293e353b87SMagnus Damm 303e353b87SMagnus Damm static struct map_desc r8a7779_io_desc[] __initdata = { 313e940958SGeert Uytterhoeven /* 2M identity mapping for 0xf0000000 (MPCORE) */ 323e353b87SMagnus Damm { 333e353b87SMagnus Damm .virtual = 0xf0000000, 343e353b87SMagnus Damm .pfn = __phys_to_pfn(0xf0000000), 353e353b87SMagnus Damm .length = SZ_2M, 363e353b87SMagnus Damm .type = MT_DEVICE_NONSHARED 373e353b87SMagnus Damm }, 383e940958SGeert Uytterhoeven /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */ 393e353b87SMagnus Damm { 403e353b87SMagnus Damm .virtual = 0xfe000000, 413e353b87SMagnus Damm .pfn = __phys_to_pfn(0xfe000000), 423e353b87SMagnus Damm .length = SZ_16M, 433e353b87SMagnus Damm .type = MT_DEVICE_NONSHARED 443e353b87SMagnus Damm }, 453e353b87SMagnus Damm }; 463e353b87SMagnus Damm 47c99cd90dSMagnus Damm static void __init r8a7779_map_io(void) 483e353b87SMagnus Damm { 497a2071c5SGeert Uytterhoeven debug_ll_io_init(); 503e353b87SMagnus Damm iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); 513e353b87SMagnus Damm } 52f411fadeSMagnus Damm 535b3859d7SKuninori Morimoto /* IRQ */ 545b3859d7SKuninori Morimoto #define INT2SMSKCR0 IOMEM(0xfe7822a0) 555b3859d7SKuninori Morimoto #define INT2SMSKCR1 IOMEM(0xfe7822a4) 565b3859d7SKuninori Morimoto #define INT2SMSKCR2 IOMEM(0xfe7822a8) 575b3859d7SKuninori Morimoto #define INT2SMSKCR3 IOMEM(0xfe7822ac) 585b3859d7SKuninori Morimoto #define INT2SMSKCR4 IOMEM(0xfe7822b0) 595b3859d7SKuninori Morimoto 605b3859d7SKuninori Morimoto #define INT2NTSR0 IOMEM(0xfe700060) 615b3859d7SKuninori Morimoto #define INT2NTSR1 IOMEM(0xfe700064) 625b3859d7SKuninori Morimoto 63c99cd90dSMagnus Damm static void __init r8a7779_init_irq_dt(void) 645b3859d7SKuninori Morimoto { 65d04594c2SMarc Zyngier gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE); 665b3859d7SKuninori Morimoto 675b3859d7SKuninori Morimoto irqchip_init(); 68c99cd90dSMagnus Damm 695b3859d7SKuninori Morimoto /* route all interrupts to ARM */ 705b3859d7SKuninori Morimoto __raw_writel(0xffffffff, INT2NTSR0); 715b3859d7SKuninori Morimoto __raw_writel(0x3fffffff, INT2NTSR1); 725b3859d7SKuninori Morimoto 735b3859d7SKuninori Morimoto /* unmask all known interrupts in INTCS2 */ 745b3859d7SKuninori Morimoto __raw_writel(0xfffffff0, INT2SMSKCR0); 755b3859d7SKuninori Morimoto __raw_writel(0xfff7ffff, INT2SMSKCR1); 765b3859d7SKuninori Morimoto __raw_writel(0xfffbffdf, INT2SMSKCR2); 775b3859d7SKuninori Morimoto __raw_writel(0xbffffffc, INT2SMSKCR3); 785b3859d7SKuninori Morimoto __raw_writel(0x003fee3f, INT2SMSKCR4); 795b3859d7SKuninori Morimoto } 805b3859d7SKuninori Morimoto 813e05f24aSSimon Horman #define MODEMR 0xffcc0020 823e05f24aSSimon Horman 83c99cd90dSMagnus Damm static u32 __init r8a7779_read_mode_pins(void) 843e05f24aSSimon Horman { 853e05f24aSSimon Horman static u32 mode; 863e05f24aSSimon Horman static bool mode_valid; 873e05f24aSSimon Horman 883e05f24aSSimon Horman if (!mode_valid) { 893e05f24aSSimon Horman void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); 903e05f24aSSimon Horman BUG_ON(!modemr); 913e05f24aSSimon Horman mode = ioread32(modemr); 923e05f24aSSimon Horman iounmap(modemr); 933e05f24aSSimon Horman mode_valid = true; 943e05f24aSSimon Horman } 953e05f24aSSimon Horman 963e05f24aSSimon Horman return mode; 9710e8d4f6SSimon Horman } 9810e8d4f6SSimon Horman 99131c2e04SMagnus Damm static void __init r8a7779_init_time(void) 100131c2e04SMagnus Damm { 101131c2e04SMagnus Damm r8a7779_clocks_init(r8a7779_read_mode_pins()); 102131c2e04SMagnus Damm clocksource_of_init(); 103131c2e04SMagnus Damm } 104131c2e04SMagnus Damm 10510e8d4f6SSimon Horman static const char *r8a7779_compat_dt[] __initdata = { 10610e8d4f6SSimon Horman "renesas,r8a7779", 10710e8d4f6SSimon Horman NULL, 10810e8d4f6SSimon Horman }; 10910e8d4f6SSimon Horman 110abe0e14bSKuninori Morimoto DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") 11144ade5edSMagnus Damm .smp = smp_ops(r8a7779_smp_ops), 11210e8d4f6SSimon Horman .map_io = r8a7779_map_io, 1130157b626SSimon Horman .init_early = shmobile_init_delay, 114131c2e04SMagnus Damm .init_time = r8a7779_init_time, 11510e8d4f6SSimon Horman .init_irq = r8a7779_init_irq_dt, 116d5b00b90SMagnus Damm .init_late = shmobile_init_late, 11710e8d4f6SSimon Horman .dt_compat = r8a7779_compat_dt, 11810e8d4f6SSimon Horman MACHINE_END 119