1f411fadeSMagnus Damm /* 2f411fadeSMagnus Damm * r8a7779 processor support 3f411fadeSMagnus Damm * 4f411fadeSMagnus Damm * Copyright (C) 2011 Renesas Solutions Corp. 5f411fadeSMagnus Damm * Copyright (C) 2011 Magnus Damm 6f411fadeSMagnus Damm * 7f411fadeSMagnus Damm * This program is free software; you can redistribute it and/or modify 8f411fadeSMagnus Damm * it under the terms of the GNU General Public License as published by 9f411fadeSMagnus Damm * the Free Software Foundation; version 2 of the License. 10f411fadeSMagnus Damm * 11f411fadeSMagnus Damm * This program is distributed in the hope that it will be useful, 12f411fadeSMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 13f411fadeSMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14f411fadeSMagnus Damm * GNU General Public License for more details. 15f411fadeSMagnus Damm * 16f411fadeSMagnus Damm * You should have received a copy of the GNU General Public License 17f411fadeSMagnus Damm * along with this program; if not, write to the Free Software 18f411fadeSMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19f411fadeSMagnus Damm */ 20f411fadeSMagnus Damm #include <linux/kernel.h> 21f411fadeSMagnus Damm #include <linux/init.h> 22f411fadeSMagnus Damm #include <linux/interrupt.h> 23f411fadeSMagnus Damm #include <linux/irq.h> 24f411fadeSMagnus Damm #include <linux/platform_device.h> 25f411fadeSMagnus Damm #include <linux/delay.h> 26f411fadeSMagnus Damm #include <linux/input.h> 27f411fadeSMagnus Damm #include <linux/io.h> 28f411fadeSMagnus Damm #include <linux/serial_sci.h> 29f411fadeSMagnus Damm #include <linux/sh_intc.h> 30f411fadeSMagnus Damm #include <linux/sh_timer.h> 31f411fadeSMagnus Damm #include <mach/hardware.h> 32f411fadeSMagnus Damm #include <mach/r8a7779.h> 33a662c082SMagnus Damm #include <mach/common.h> 34f411fadeSMagnus Damm #include <asm/mach-types.h> 35f411fadeSMagnus Damm #include <asm/mach/arch.h> 36f411fadeSMagnus Damm 37f411fadeSMagnus Damm static struct plat_sci_port scif0_platform_data = { 38f411fadeSMagnus Damm .mapbase = 0xffe40000, 39f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 40f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 41f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 42f411fadeSMagnus Damm .type = PORT_SCIF, 43f411fadeSMagnus Damm .irqs = { gic_spi(88), gic_spi(88), 44f411fadeSMagnus Damm gic_spi(88), gic_spi(88) }, 45f411fadeSMagnus Damm }; 46f411fadeSMagnus Damm 47f411fadeSMagnus Damm static struct platform_device scif0_device = { 48f411fadeSMagnus Damm .name = "sh-sci", 49f411fadeSMagnus Damm .id = 0, 50f411fadeSMagnus Damm .dev = { 51f411fadeSMagnus Damm .platform_data = &scif0_platform_data, 52f411fadeSMagnus Damm }, 53f411fadeSMagnus Damm }; 54f411fadeSMagnus Damm 55f411fadeSMagnus Damm static struct plat_sci_port scif1_platform_data = { 56f411fadeSMagnus Damm .mapbase = 0xffe41000, 57f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 58f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 59f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 60f411fadeSMagnus Damm .type = PORT_SCIF, 61f411fadeSMagnus Damm .irqs = { gic_spi(89), gic_spi(89), 62f411fadeSMagnus Damm gic_spi(89), gic_spi(89) }, 63f411fadeSMagnus Damm }; 64f411fadeSMagnus Damm 65f411fadeSMagnus Damm static struct platform_device scif1_device = { 66f411fadeSMagnus Damm .name = "sh-sci", 67f411fadeSMagnus Damm .id = 1, 68f411fadeSMagnus Damm .dev = { 69f411fadeSMagnus Damm .platform_data = &scif1_platform_data, 70f411fadeSMagnus Damm }, 71f411fadeSMagnus Damm }; 72f411fadeSMagnus Damm 73f411fadeSMagnus Damm static struct plat_sci_port scif2_platform_data = { 74f411fadeSMagnus Damm .mapbase = 0xffe42000, 75f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 76f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 77f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 78f411fadeSMagnus Damm .type = PORT_SCIF, 79f411fadeSMagnus Damm .irqs = { gic_spi(90), gic_spi(90), 80f411fadeSMagnus Damm gic_spi(90), gic_spi(90) }, 81f411fadeSMagnus Damm }; 82f411fadeSMagnus Damm 83f411fadeSMagnus Damm static struct platform_device scif2_device = { 84f411fadeSMagnus Damm .name = "sh-sci", 85f411fadeSMagnus Damm .id = 2, 86f411fadeSMagnus Damm .dev = { 87f411fadeSMagnus Damm .platform_data = &scif2_platform_data, 88f411fadeSMagnus Damm }, 89f411fadeSMagnus Damm }; 90f411fadeSMagnus Damm 91f411fadeSMagnus Damm static struct plat_sci_port scif3_platform_data = { 92f411fadeSMagnus Damm .mapbase = 0xffe43000, 93f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 94f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 95f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 96f411fadeSMagnus Damm .type = PORT_SCIF, 97f411fadeSMagnus Damm .irqs = { gic_spi(91), gic_spi(91), 98f411fadeSMagnus Damm gic_spi(91), gic_spi(91) }, 99f411fadeSMagnus Damm }; 100f411fadeSMagnus Damm 101f411fadeSMagnus Damm static struct platform_device scif3_device = { 102f411fadeSMagnus Damm .name = "sh-sci", 103f411fadeSMagnus Damm .id = 3, 104f411fadeSMagnus Damm .dev = { 105f411fadeSMagnus Damm .platform_data = &scif3_platform_data, 106f411fadeSMagnus Damm }, 107f411fadeSMagnus Damm }; 108f411fadeSMagnus Damm 109f411fadeSMagnus Damm static struct plat_sci_port scif4_platform_data = { 110f411fadeSMagnus Damm .mapbase = 0xffe44000, 111f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 112f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 113f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 114f411fadeSMagnus Damm .type = PORT_SCIF, 115f411fadeSMagnus Damm .irqs = { gic_spi(92), gic_spi(92), 116f411fadeSMagnus Damm gic_spi(92), gic_spi(92) }, 117f411fadeSMagnus Damm }; 118f411fadeSMagnus Damm 119f411fadeSMagnus Damm static struct platform_device scif4_device = { 120f411fadeSMagnus Damm .name = "sh-sci", 121f411fadeSMagnus Damm .id = 4, 122f411fadeSMagnus Damm .dev = { 123f411fadeSMagnus Damm .platform_data = &scif4_platform_data, 124f411fadeSMagnus Damm }, 125f411fadeSMagnus Damm }; 126f411fadeSMagnus Damm 127f411fadeSMagnus Damm static struct plat_sci_port scif5_platform_data = { 128f411fadeSMagnus Damm .mapbase = 0xffe45000, 129f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 130f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 131f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 132f411fadeSMagnus Damm .type = PORT_SCIF, 133f411fadeSMagnus Damm .irqs = { gic_spi(93), gic_spi(93), 134f411fadeSMagnus Damm gic_spi(93), gic_spi(93) }, 135f411fadeSMagnus Damm }; 136f411fadeSMagnus Damm 137f411fadeSMagnus Damm static struct platform_device scif5_device = { 138f411fadeSMagnus Damm .name = "sh-sci", 139f411fadeSMagnus Damm .id = 5, 140f411fadeSMagnus Damm .dev = { 141f411fadeSMagnus Damm .platform_data = &scif5_platform_data, 142f411fadeSMagnus Damm }, 143f411fadeSMagnus Damm }; 144f411fadeSMagnus Damm 145f411fadeSMagnus Damm /* TMU */ 146f411fadeSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 147f411fadeSMagnus Damm .name = "TMU00", 148f411fadeSMagnus Damm .channel_offset = 0x4, 149f411fadeSMagnus Damm .timer_bit = 0, 150f411fadeSMagnus Damm .clockevent_rating = 200, 151f411fadeSMagnus Damm }; 152f411fadeSMagnus Damm 153f411fadeSMagnus Damm static struct resource tmu00_resources[] = { 154f411fadeSMagnus Damm [0] = { 155f411fadeSMagnus Damm .name = "TMU00", 156f411fadeSMagnus Damm .start = 0xffd80008, 157f411fadeSMagnus Damm .end = 0xffd80013, 158f411fadeSMagnus Damm .flags = IORESOURCE_MEM, 159f411fadeSMagnus Damm }, 160f411fadeSMagnus Damm [1] = { 161f411fadeSMagnus Damm .start = gic_spi(32), 162f411fadeSMagnus Damm .flags = IORESOURCE_IRQ, 163f411fadeSMagnus Damm }, 164f411fadeSMagnus Damm }; 165f411fadeSMagnus Damm 166f411fadeSMagnus Damm static struct platform_device tmu00_device = { 167f411fadeSMagnus Damm .name = "sh_tmu", 168f411fadeSMagnus Damm .id = 0, 169f411fadeSMagnus Damm .dev = { 170f411fadeSMagnus Damm .platform_data = &tmu00_platform_data, 171f411fadeSMagnus Damm }, 172f411fadeSMagnus Damm .resource = tmu00_resources, 173f411fadeSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 174f411fadeSMagnus Damm }; 175f411fadeSMagnus Damm 176f411fadeSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 177f411fadeSMagnus Damm .name = "TMU01", 178f411fadeSMagnus Damm .channel_offset = 0x10, 179f411fadeSMagnus Damm .timer_bit = 1, 180f411fadeSMagnus Damm .clocksource_rating = 200, 181f411fadeSMagnus Damm }; 182f411fadeSMagnus Damm 183f411fadeSMagnus Damm static struct resource tmu01_resources[] = { 184f411fadeSMagnus Damm [0] = { 185f411fadeSMagnus Damm .name = "TMU01", 186f411fadeSMagnus Damm .start = 0xffd80014, 187f411fadeSMagnus Damm .end = 0xffd8001f, 188f411fadeSMagnus Damm .flags = IORESOURCE_MEM, 189f411fadeSMagnus Damm }, 190f411fadeSMagnus Damm [1] = { 191f411fadeSMagnus Damm .start = gic_spi(33), 192f411fadeSMagnus Damm .flags = IORESOURCE_IRQ, 193f411fadeSMagnus Damm }, 194f411fadeSMagnus Damm }; 195f411fadeSMagnus Damm 196f411fadeSMagnus Damm static struct platform_device tmu01_device = { 197f411fadeSMagnus Damm .name = "sh_tmu", 198f411fadeSMagnus Damm .id = 1, 199f411fadeSMagnus Damm .dev = { 200f411fadeSMagnus Damm .platform_data = &tmu01_platform_data, 201f411fadeSMagnus Damm }, 202f411fadeSMagnus Damm .resource = tmu01_resources, 203f411fadeSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 204f411fadeSMagnus Damm }; 205f411fadeSMagnus Damm 206f411fadeSMagnus Damm static struct platform_device *r8a7779_early_devices[] __initdata = { 207f411fadeSMagnus Damm &scif0_device, 208f411fadeSMagnus Damm &scif1_device, 209f411fadeSMagnus Damm &scif2_device, 210f411fadeSMagnus Damm &scif3_device, 211f411fadeSMagnus Damm &scif4_device, 212f411fadeSMagnus Damm &scif5_device, 213f411fadeSMagnus Damm &tmu00_device, 214f411fadeSMagnus Damm &tmu01_device, 215f411fadeSMagnus Damm }; 216f411fadeSMagnus Damm 217f411fadeSMagnus Damm static struct platform_device *r8a7779_late_devices[] __initdata = { 218f411fadeSMagnus Damm }; 219f411fadeSMagnus Damm 220f411fadeSMagnus Damm void __init r8a7779_add_standard_devices(void) 221f411fadeSMagnus Damm { 222a662c082SMagnus Damm r8a7779_pm_init(); 223a662c082SMagnus Damm 224a662c082SMagnus Damm r8a7779_init_pm_domain(&r8a7779_sh4a); 225a662c082SMagnus Damm r8a7779_init_pm_domain(&r8a7779_sgx); 226a662c082SMagnus Damm r8a7779_init_pm_domain(&r8a7779_vdp1); 227a662c082SMagnus Damm r8a7779_init_pm_domain(&r8a7779_impx3); 228a662c082SMagnus Damm 229f411fadeSMagnus Damm platform_add_devices(r8a7779_early_devices, 230f411fadeSMagnus Damm ARRAY_SIZE(r8a7779_early_devices)); 231f411fadeSMagnus Damm platform_add_devices(r8a7779_late_devices, 232f411fadeSMagnus Damm ARRAY_SIZE(r8a7779_late_devices)); 233f411fadeSMagnus Damm } 234f411fadeSMagnus Damm 235f411fadeSMagnus Damm void __init r8a7779_add_early_devices(void) 236f411fadeSMagnus Damm { 237f411fadeSMagnus Damm early_platform_add_devices(r8a7779_early_devices, 238f411fadeSMagnus Damm ARRAY_SIZE(r8a7779_early_devices)); 239f411fadeSMagnus Damm } 240