1f411fadeSMagnus Damm /* 2f411fadeSMagnus Damm * r8a7779 processor support 3f411fadeSMagnus Damm * 4dace48d0SSergei Shtylyov * Copyright (C) 2011, 2013 Renesas Solutions Corp. 5f411fadeSMagnus Damm * Copyright (C) 2011 Magnus Damm 6dace48d0SSergei Shtylyov * Copyright (C) 2013 Cogent Embedded, Inc. 7f411fadeSMagnus Damm * 8f411fadeSMagnus Damm * This program is free software; you can redistribute it and/or modify 9f411fadeSMagnus Damm * it under the terms of the GNU General Public License as published by 10f411fadeSMagnus Damm * the Free Software Foundation; version 2 of the License. 11f411fadeSMagnus Damm * 12f411fadeSMagnus Damm * This program is distributed in the hope that it will be useful, 13f411fadeSMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 14f411fadeSMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15f411fadeSMagnus Damm * GNU General Public License for more details. 16f411fadeSMagnus Damm * 17f411fadeSMagnus Damm * You should have received a copy of the GNU General Public License 18f411fadeSMagnus Damm * along with this program; if not, write to the Free Software 19f411fadeSMagnus Damm * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 20f411fadeSMagnus Damm */ 21f411fadeSMagnus Damm #include <linux/kernel.h> 22f411fadeSMagnus Damm #include <linux/init.h> 23f411fadeSMagnus Damm #include <linux/interrupt.h> 24f411fadeSMagnus Damm #include <linux/irq.h> 255b3859d7SKuninori Morimoto #include <linux/irqchip.h> 265b3859d7SKuninori Morimoto #include <linux/irqchip/arm-gic.h> 2710e8d4f6SSimon Horman #include <linux/of_platform.h> 2837a72d07SLaurent Pinchart #include <linux/platform_data/gpio-rcar.h> 295b3859d7SKuninori Morimoto #include <linux/platform_data/irq-renesas-intc-irqpin.h> 30f411fadeSMagnus Damm #include <linux/platform_device.h> 31f411fadeSMagnus Damm #include <linux/delay.h> 32f411fadeSMagnus Damm #include <linux/input.h> 33f411fadeSMagnus Damm #include <linux/io.h> 34f411fadeSMagnus Damm #include <linux/serial_sci.h> 35f411fadeSMagnus Damm #include <linux/sh_timer.h> 36a7b9837cSVladimir Barinov #include <linux/dma-mapping.h> 372c8788bfSSergei Shtylyov #include <linux/usb/otg.h> 3884a812daSSergei Shtylyov #include <linux/usb/hcd.h> 392c8788bfSSergei Shtylyov #include <linux/usb/ehci_pdriver.h> 402c8788bfSSergei Shtylyov #include <linux/usb/ohci_pdriver.h> 412c8788bfSSergei Shtylyov #include <linux/pm_runtime.h> 42250a2723SRob Herring #include <mach/irqs.h> 43f411fadeSMagnus Damm #include <mach/r8a7779.h> 44a662c082SMagnus Damm #include <mach/common.h> 45f411fadeSMagnus Damm #include <asm/mach-types.h> 46f411fadeSMagnus Damm #include <asm/mach/arch.h> 47df27a2d8SMagnus Damm #include <asm/mach/time.h> 483e353b87SMagnus Damm #include <asm/mach/map.h> 498bac13f5SMagnus Damm #include <asm/hardware/cache-l2x0.h> 503e353b87SMagnus Damm 513e353b87SMagnus Damm static struct map_desc r8a7779_io_desc[] __initdata = { 523e353b87SMagnus Damm /* 2M entity map for 0xf0000000 (MPCORE) */ 533e353b87SMagnus Damm { 543e353b87SMagnus Damm .virtual = 0xf0000000, 553e353b87SMagnus Damm .pfn = __phys_to_pfn(0xf0000000), 563e353b87SMagnus Damm .length = SZ_2M, 573e353b87SMagnus Damm .type = MT_DEVICE_NONSHARED 583e353b87SMagnus Damm }, 593e353b87SMagnus Damm /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */ 603e353b87SMagnus Damm { 613e353b87SMagnus Damm .virtual = 0xfe000000, 623e353b87SMagnus Damm .pfn = __phys_to_pfn(0xfe000000), 633e353b87SMagnus Damm .length = SZ_16M, 643e353b87SMagnus Damm .type = MT_DEVICE_NONSHARED 653e353b87SMagnus Damm }, 663e353b87SMagnus Damm }; 673e353b87SMagnus Damm 683e353b87SMagnus Damm void __init r8a7779_map_io(void) 693e353b87SMagnus Damm { 703e353b87SMagnus Damm iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); 713e353b87SMagnus Damm } 72f411fadeSMagnus Damm 735b3859d7SKuninori Morimoto /* IRQ */ 745b3859d7SKuninori Morimoto #define INT2SMSKCR0 IOMEM(0xfe7822a0) 755b3859d7SKuninori Morimoto #define INT2SMSKCR1 IOMEM(0xfe7822a4) 765b3859d7SKuninori Morimoto #define INT2SMSKCR2 IOMEM(0xfe7822a8) 775b3859d7SKuninori Morimoto #define INT2SMSKCR3 IOMEM(0xfe7822ac) 785b3859d7SKuninori Morimoto #define INT2SMSKCR4 IOMEM(0xfe7822b0) 795b3859d7SKuninori Morimoto 805b3859d7SKuninori Morimoto #define INT2NTSR0 IOMEM(0xfe700060) 815b3859d7SKuninori Morimoto #define INT2NTSR1 IOMEM(0xfe700064) 825b3859d7SKuninori Morimoto 835b3859d7SKuninori Morimoto static struct renesas_intc_irqpin_config irqpin0_platform_data __initdata = { 845b3859d7SKuninori Morimoto .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ 855b3859d7SKuninori Morimoto .sense_bitfield_width = 2, 865b3859d7SKuninori Morimoto }; 875b3859d7SKuninori Morimoto 885b3859d7SKuninori Morimoto static struct resource irqpin0_resources[] __initdata = { 895b3859d7SKuninori Morimoto DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */ 905b3859d7SKuninori Morimoto DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */ 915b3859d7SKuninori Morimoto DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */ 925b3859d7SKuninori Morimoto DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */ 935b3859d7SKuninori Morimoto DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */ 945b3859d7SKuninori Morimoto DEFINE_RES_IRQ(gic_spi(27)), /* IRQ0 */ 955b3859d7SKuninori Morimoto DEFINE_RES_IRQ(gic_spi(28)), /* IRQ1 */ 965b3859d7SKuninori Morimoto DEFINE_RES_IRQ(gic_spi(29)), /* IRQ2 */ 975b3859d7SKuninori Morimoto DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */ 985b3859d7SKuninori Morimoto }; 995b3859d7SKuninori Morimoto 1005b3859d7SKuninori Morimoto void __init r8a7779_init_irq_extpin(int irlm) 1015b3859d7SKuninori Morimoto { 1025b3859d7SKuninori Morimoto void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE); 1035b3859d7SKuninori Morimoto u32 tmp; 1045b3859d7SKuninori Morimoto 1055b3859d7SKuninori Morimoto if (!icr0) { 1065b3859d7SKuninori Morimoto pr_warn("r8a7779: unable to setup external irq pin mode\n"); 1075b3859d7SKuninori Morimoto return; 1085b3859d7SKuninori Morimoto } 1095b3859d7SKuninori Morimoto 1105b3859d7SKuninori Morimoto tmp = ioread32(icr0); 1115b3859d7SKuninori Morimoto if (irlm) 1125b3859d7SKuninori Morimoto tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */ 1135b3859d7SKuninori Morimoto else 1145b3859d7SKuninori Morimoto tmp &= ~(1 << 23); /* IRL mode - not supported */ 1155b3859d7SKuninori Morimoto tmp |= (1 << 21); /* LVLMODE = 1 */ 1165b3859d7SKuninori Morimoto iowrite32(tmp, icr0); 1175b3859d7SKuninori Morimoto iounmap(icr0); 1185b3859d7SKuninori Morimoto 1195b3859d7SKuninori Morimoto if (irlm) 1205b3859d7SKuninori Morimoto platform_device_register_resndata( 1215b3859d7SKuninori Morimoto &platform_bus, "renesas_intc_irqpin", -1, 1225b3859d7SKuninori Morimoto irqpin0_resources, ARRAY_SIZE(irqpin0_resources), 1235b3859d7SKuninori Morimoto &irqpin0_platform_data, sizeof(irqpin0_platform_data)); 1245b3859d7SKuninori Morimoto } 1255b3859d7SKuninori Morimoto 1265b3859d7SKuninori Morimoto /* PFC/GPIO */ 1278b6edf36SLaurent Pinchart static struct resource r8a7779_pfc_resources[] = { 1280ccaf5bbSMagnus Damm DEFINE_RES_MEM(0xfffc0000, 0x023c), 1298b6edf36SLaurent Pinchart }; 1308b6edf36SLaurent Pinchart 1318b6edf36SLaurent Pinchart static struct platform_device r8a7779_pfc_device = { 1328b6edf36SLaurent Pinchart .name = "pfc-r8a7779", 1338b6edf36SLaurent Pinchart .id = -1, 1348b6edf36SLaurent Pinchart .resource = r8a7779_pfc_resources, 1358b6edf36SLaurent Pinchart .num_resources = ARRAY_SIZE(r8a7779_pfc_resources), 1368b6edf36SLaurent Pinchart }; 1378b6edf36SLaurent Pinchart 13837a72d07SLaurent Pinchart #define R8A7779_GPIO(idx, npins) \ 13937a72d07SLaurent Pinchart static struct resource r8a7779_gpio##idx##_resources[] = { \ 1400ccaf5bbSMagnus Damm DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c), \ 1410ccaf5bbSMagnus Damm DEFINE_RES_IRQ(gic_iid(0xad + (idx))), \ 14237a72d07SLaurent Pinchart }; \ 14337a72d07SLaurent Pinchart \ 14437a72d07SLaurent Pinchart static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \ 14537a72d07SLaurent Pinchart .gpio_base = 32 * (idx), \ 14637a72d07SLaurent Pinchart .irq_base = 0, \ 14737a72d07SLaurent Pinchart .number_of_pins = npins, \ 14837a72d07SLaurent Pinchart .pctl_name = "pfc-r8a7779", \ 14937a72d07SLaurent Pinchart }; \ 15037a72d07SLaurent Pinchart \ 15137a72d07SLaurent Pinchart static struct platform_device r8a7779_gpio##idx##_device = { \ 15237a72d07SLaurent Pinchart .name = "gpio_rcar", \ 15337a72d07SLaurent Pinchart .id = idx, \ 15437a72d07SLaurent Pinchart .resource = r8a7779_gpio##idx##_resources, \ 15537a72d07SLaurent Pinchart .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \ 15637a72d07SLaurent Pinchart .dev = { \ 15737a72d07SLaurent Pinchart .platform_data = &r8a7779_gpio##idx##_platform_data, \ 15837a72d07SLaurent Pinchart }, \ 15937a72d07SLaurent Pinchart } 16037a72d07SLaurent Pinchart 16137a72d07SLaurent Pinchart R8A7779_GPIO(0, 32); 16237a72d07SLaurent Pinchart R8A7779_GPIO(1, 32); 16337a72d07SLaurent Pinchart R8A7779_GPIO(2, 32); 16437a72d07SLaurent Pinchart R8A7779_GPIO(3, 32); 16537a72d07SLaurent Pinchart R8A7779_GPIO(4, 32); 16637a72d07SLaurent Pinchart R8A7779_GPIO(5, 32); 16737a72d07SLaurent Pinchart R8A7779_GPIO(6, 9); 16837a72d07SLaurent Pinchart 16937a72d07SLaurent Pinchart static struct platform_device *r8a7779_pinctrl_devices[] __initdata = { 17037a72d07SLaurent Pinchart &r8a7779_pfc_device, 17137a72d07SLaurent Pinchart &r8a7779_gpio0_device, 17237a72d07SLaurent Pinchart &r8a7779_gpio1_device, 17337a72d07SLaurent Pinchart &r8a7779_gpio2_device, 17437a72d07SLaurent Pinchart &r8a7779_gpio3_device, 17537a72d07SLaurent Pinchart &r8a7779_gpio4_device, 17637a72d07SLaurent Pinchart &r8a7779_gpio5_device, 17737a72d07SLaurent Pinchart &r8a7779_gpio6_device, 17837a72d07SLaurent Pinchart }; 17937a72d07SLaurent Pinchart 1808b6edf36SLaurent Pinchart void __init r8a7779_pinmux_init(void) 1818b6edf36SLaurent Pinchart { 18237a72d07SLaurent Pinchart platform_add_devices(r8a7779_pinctrl_devices, 18337a72d07SLaurent Pinchart ARRAY_SIZE(r8a7779_pinctrl_devices)); 1848b6edf36SLaurent Pinchart } 1858b6edf36SLaurent Pinchart 186f411fadeSMagnus Damm static struct plat_sci_port scif0_platform_data = { 187f411fadeSMagnus Damm .mapbase = 0xffe40000, 188f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 189f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 190f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 191f411fadeSMagnus Damm .type = PORT_SCIF, 192dbe95ad0SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)), 193f411fadeSMagnus Damm }; 194f411fadeSMagnus Damm 195f411fadeSMagnus Damm static struct platform_device scif0_device = { 196f411fadeSMagnus Damm .name = "sh-sci", 197f411fadeSMagnus Damm .id = 0, 198f411fadeSMagnus Damm .dev = { 199f411fadeSMagnus Damm .platform_data = &scif0_platform_data, 200f411fadeSMagnus Damm }, 201f411fadeSMagnus Damm }; 202f411fadeSMagnus Damm 203f411fadeSMagnus Damm static struct plat_sci_port scif1_platform_data = { 204f411fadeSMagnus Damm .mapbase = 0xffe41000, 205f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 206f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 207f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 208f411fadeSMagnus Damm .type = PORT_SCIF, 209dbe95ad0SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)), 210f411fadeSMagnus Damm }; 211f411fadeSMagnus Damm 212f411fadeSMagnus Damm static struct platform_device scif1_device = { 213f411fadeSMagnus Damm .name = "sh-sci", 214f411fadeSMagnus Damm .id = 1, 215f411fadeSMagnus Damm .dev = { 216f411fadeSMagnus Damm .platform_data = &scif1_platform_data, 217f411fadeSMagnus Damm }, 218f411fadeSMagnus Damm }; 219f411fadeSMagnus Damm 220f411fadeSMagnus Damm static struct plat_sci_port scif2_platform_data = { 221f411fadeSMagnus Damm .mapbase = 0xffe42000, 222f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 223f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 224f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 225f411fadeSMagnus Damm .type = PORT_SCIF, 226dbe95ad0SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)), 227f411fadeSMagnus Damm }; 228f411fadeSMagnus Damm 229f411fadeSMagnus Damm static struct platform_device scif2_device = { 230f411fadeSMagnus Damm .name = "sh-sci", 231f411fadeSMagnus Damm .id = 2, 232f411fadeSMagnus Damm .dev = { 233f411fadeSMagnus Damm .platform_data = &scif2_platform_data, 234f411fadeSMagnus Damm }, 235f411fadeSMagnus Damm }; 236f411fadeSMagnus Damm 237f411fadeSMagnus Damm static struct plat_sci_port scif3_platform_data = { 238f411fadeSMagnus Damm .mapbase = 0xffe43000, 239f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 240f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 241f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 242f411fadeSMagnus Damm .type = PORT_SCIF, 243dbe95ad0SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)), 244f411fadeSMagnus Damm }; 245f411fadeSMagnus Damm 246f411fadeSMagnus Damm static struct platform_device scif3_device = { 247f411fadeSMagnus Damm .name = "sh-sci", 248f411fadeSMagnus Damm .id = 3, 249f411fadeSMagnus Damm .dev = { 250f411fadeSMagnus Damm .platform_data = &scif3_platform_data, 251f411fadeSMagnus Damm }, 252f411fadeSMagnus Damm }; 253f411fadeSMagnus Damm 254f411fadeSMagnus Damm static struct plat_sci_port scif4_platform_data = { 255f411fadeSMagnus Damm .mapbase = 0xffe44000, 256f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 257f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 258f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 259f411fadeSMagnus Damm .type = PORT_SCIF, 260dbe95ad0SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)), 261f411fadeSMagnus Damm }; 262f411fadeSMagnus Damm 263f411fadeSMagnus Damm static struct platform_device scif4_device = { 264f411fadeSMagnus Damm .name = "sh-sci", 265f411fadeSMagnus Damm .id = 4, 266f411fadeSMagnus Damm .dev = { 267f411fadeSMagnus Damm .platform_data = &scif4_platform_data, 268f411fadeSMagnus Damm }, 269f411fadeSMagnus Damm }; 270f411fadeSMagnus Damm 271f411fadeSMagnus Damm static struct plat_sci_port scif5_platform_data = { 272f411fadeSMagnus Damm .mapbase = 0xffe45000, 273f411fadeSMagnus Damm .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 274f411fadeSMagnus Damm .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 275f411fadeSMagnus Damm .scbrr_algo_id = SCBRR_ALGO_2, 276f411fadeSMagnus Damm .type = PORT_SCIF, 277dbe95ad0SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)), 278f411fadeSMagnus Damm }; 279f411fadeSMagnus Damm 280f411fadeSMagnus Damm static struct platform_device scif5_device = { 281f411fadeSMagnus Damm .name = "sh-sci", 282f411fadeSMagnus Damm .id = 5, 283f411fadeSMagnus Damm .dev = { 284f411fadeSMagnus Damm .platform_data = &scif5_platform_data, 285f411fadeSMagnus Damm }, 286f411fadeSMagnus Damm }; 287f411fadeSMagnus Damm 288f411fadeSMagnus Damm /* TMU */ 289f411fadeSMagnus Damm static struct sh_timer_config tmu00_platform_data = { 290f411fadeSMagnus Damm .name = "TMU00", 291f411fadeSMagnus Damm .channel_offset = 0x4, 292f411fadeSMagnus Damm .timer_bit = 0, 293f411fadeSMagnus Damm .clockevent_rating = 200, 294f411fadeSMagnus Damm }; 295f411fadeSMagnus Damm 296f411fadeSMagnus Damm static struct resource tmu00_resources[] = { 297f411fadeSMagnus Damm [0] = { 298f411fadeSMagnus Damm .name = "TMU00", 299f411fadeSMagnus Damm .start = 0xffd80008, 300f411fadeSMagnus Damm .end = 0xffd80013, 301f411fadeSMagnus Damm .flags = IORESOURCE_MEM, 302f411fadeSMagnus Damm }, 303f411fadeSMagnus Damm [1] = { 304dbe95ad0SKuninori Morimoto .start = gic_iid(0x40), 305f411fadeSMagnus Damm .flags = IORESOURCE_IRQ, 306f411fadeSMagnus Damm }, 307f411fadeSMagnus Damm }; 308f411fadeSMagnus Damm 309f411fadeSMagnus Damm static struct platform_device tmu00_device = { 310f411fadeSMagnus Damm .name = "sh_tmu", 311f411fadeSMagnus Damm .id = 0, 312f411fadeSMagnus Damm .dev = { 313f411fadeSMagnus Damm .platform_data = &tmu00_platform_data, 314f411fadeSMagnus Damm }, 315f411fadeSMagnus Damm .resource = tmu00_resources, 316f411fadeSMagnus Damm .num_resources = ARRAY_SIZE(tmu00_resources), 317f411fadeSMagnus Damm }; 318f411fadeSMagnus Damm 319f411fadeSMagnus Damm static struct sh_timer_config tmu01_platform_data = { 320f411fadeSMagnus Damm .name = "TMU01", 321f411fadeSMagnus Damm .channel_offset = 0x10, 322f411fadeSMagnus Damm .timer_bit = 1, 323f411fadeSMagnus Damm .clocksource_rating = 200, 324f411fadeSMagnus Damm }; 325f411fadeSMagnus Damm 326f411fadeSMagnus Damm static struct resource tmu01_resources[] = { 327f411fadeSMagnus Damm [0] = { 328f411fadeSMagnus Damm .name = "TMU01", 329f411fadeSMagnus Damm .start = 0xffd80014, 330f411fadeSMagnus Damm .end = 0xffd8001f, 331f411fadeSMagnus Damm .flags = IORESOURCE_MEM, 332f411fadeSMagnus Damm }, 333f411fadeSMagnus Damm [1] = { 334dbe95ad0SKuninori Morimoto .start = gic_iid(0x41), 335f411fadeSMagnus Damm .flags = IORESOURCE_IRQ, 336f411fadeSMagnus Damm }, 337f411fadeSMagnus Damm }; 338f411fadeSMagnus Damm 339f411fadeSMagnus Damm static struct platform_device tmu01_device = { 340f411fadeSMagnus Damm .name = "sh_tmu", 341f411fadeSMagnus Damm .id = 1, 342f411fadeSMagnus Damm .dev = { 343f411fadeSMagnus Damm .platform_data = &tmu01_platform_data, 344f411fadeSMagnus Damm }, 345f411fadeSMagnus Damm .resource = tmu01_resources, 346f411fadeSMagnus Damm .num_resources = ARRAY_SIZE(tmu01_resources), 347f411fadeSMagnus Damm }; 348f411fadeSMagnus Damm 349ccc2a27bSKuninori Morimoto /* I2C */ 350ccc2a27bSKuninori Morimoto static struct resource rcar_i2c0_res[] = { 351ccc2a27bSKuninori Morimoto { 352ccc2a27bSKuninori Morimoto .start = 0xffc70000, 353ccc2a27bSKuninori Morimoto .end = 0xffc70fff, 354ccc2a27bSKuninori Morimoto .flags = IORESOURCE_MEM, 355ccc2a27bSKuninori Morimoto }, { 356dbe95ad0SKuninori Morimoto .start = gic_iid(0x6f), 357ccc2a27bSKuninori Morimoto .flags = IORESOURCE_IRQ, 358ccc2a27bSKuninori Morimoto }, 359ccc2a27bSKuninori Morimoto }; 360ccc2a27bSKuninori Morimoto 361ccc2a27bSKuninori Morimoto static struct platform_device i2c0_device = { 362ccc2a27bSKuninori Morimoto .name = "i2c-rcar", 363ccc2a27bSKuninori Morimoto .id = 0, 364ccc2a27bSKuninori Morimoto .resource = rcar_i2c0_res, 365ccc2a27bSKuninori Morimoto .num_resources = ARRAY_SIZE(rcar_i2c0_res), 366ccc2a27bSKuninori Morimoto }; 367ccc2a27bSKuninori Morimoto 368ccc2a27bSKuninori Morimoto static struct resource rcar_i2c1_res[] = { 369ccc2a27bSKuninori Morimoto { 370ccc2a27bSKuninori Morimoto .start = 0xffc71000, 371ccc2a27bSKuninori Morimoto .end = 0xffc71fff, 372ccc2a27bSKuninori Morimoto .flags = IORESOURCE_MEM, 373ccc2a27bSKuninori Morimoto }, { 374dbe95ad0SKuninori Morimoto .start = gic_iid(0x72), 375ccc2a27bSKuninori Morimoto .flags = IORESOURCE_IRQ, 376ccc2a27bSKuninori Morimoto }, 377ccc2a27bSKuninori Morimoto }; 378ccc2a27bSKuninori Morimoto 379ccc2a27bSKuninori Morimoto static struct platform_device i2c1_device = { 380ccc2a27bSKuninori Morimoto .name = "i2c-rcar", 381ccc2a27bSKuninori Morimoto .id = 1, 382ccc2a27bSKuninori Morimoto .resource = rcar_i2c1_res, 383ccc2a27bSKuninori Morimoto .num_resources = ARRAY_SIZE(rcar_i2c1_res), 384ccc2a27bSKuninori Morimoto }; 385ccc2a27bSKuninori Morimoto 386ccc2a27bSKuninori Morimoto static struct resource rcar_i2c2_res[] = { 387ccc2a27bSKuninori Morimoto { 388ccc2a27bSKuninori Morimoto .start = 0xffc72000, 389ccc2a27bSKuninori Morimoto .end = 0xffc72fff, 390ccc2a27bSKuninori Morimoto .flags = IORESOURCE_MEM, 391ccc2a27bSKuninori Morimoto }, { 392dbe95ad0SKuninori Morimoto .start = gic_iid(0x70), 393ccc2a27bSKuninori Morimoto .flags = IORESOURCE_IRQ, 394ccc2a27bSKuninori Morimoto }, 395ccc2a27bSKuninori Morimoto }; 396ccc2a27bSKuninori Morimoto 397ccc2a27bSKuninori Morimoto static struct platform_device i2c2_device = { 398ccc2a27bSKuninori Morimoto .name = "i2c-rcar", 399ccc2a27bSKuninori Morimoto .id = 2, 400ccc2a27bSKuninori Morimoto .resource = rcar_i2c2_res, 401ccc2a27bSKuninori Morimoto .num_resources = ARRAY_SIZE(rcar_i2c2_res), 402ccc2a27bSKuninori Morimoto }; 403ccc2a27bSKuninori Morimoto 404ccc2a27bSKuninori Morimoto static struct resource rcar_i2c3_res[] = { 405ccc2a27bSKuninori Morimoto { 406ccc2a27bSKuninori Morimoto .start = 0xffc73000, 407ccc2a27bSKuninori Morimoto .end = 0xffc73fff, 408ccc2a27bSKuninori Morimoto .flags = IORESOURCE_MEM, 409ccc2a27bSKuninori Morimoto }, { 410dbe95ad0SKuninori Morimoto .start = gic_iid(0x71), 411ccc2a27bSKuninori Morimoto .flags = IORESOURCE_IRQ, 412ccc2a27bSKuninori Morimoto }, 413ccc2a27bSKuninori Morimoto }; 414ccc2a27bSKuninori Morimoto 415ccc2a27bSKuninori Morimoto static struct platform_device i2c3_device = { 416ccc2a27bSKuninori Morimoto .name = "i2c-rcar", 417ccc2a27bSKuninori Morimoto .id = 3, 418ccc2a27bSKuninori Morimoto .resource = rcar_i2c3_res, 419ccc2a27bSKuninori Morimoto .num_resources = ARRAY_SIZE(rcar_i2c3_res), 420ccc2a27bSKuninori Morimoto }; 421ccc2a27bSKuninori Morimoto 422a7b9837cSVladimir Barinov static struct resource sata_resources[] = { 423a7b9837cSVladimir Barinov [0] = { 424a7b9837cSVladimir Barinov .name = "rcar-sata", 425a7b9837cSVladimir Barinov .start = 0xfc600000, 426a7b9837cSVladimir Barinov .end = 0xfc601fff, 427a7b9837cSVladimir Barinov .flags = IORESOURCE_MEM, 428a7b9837cSVladimir Barinov }, 429a7b9837cSVladimir Barinov [1] = { 430d60cd5f1SSergei Shtylyov .start = gic_iid(0x84), 431a7b9837cSVladimir Barinov .flags = IORESOURCE_IRQ, 432a7b9837cSVladimir Barinov }, 433a7b9837cSVladimir Barinov }; 434a7b9837cSVladimir Barinov 435a7b9837cSVladimir Barinov static struct platform_device sata_device = { 436a7b9837cSVladimir Barinov .name = "sata_rcar", 437a7b9837cSVladimir Barinov .id = -1, 438a7b9837cSVladimir Barinov .resource = sata_resources, 439a7b9837cSVladimir Barinov .num_resources = ARRAY_SIZE(sata_resources), 440a7b9837cSVladimir Barinov .dev = { 441a7b9837cSVladimir Barinov .dma_mask = &sata_device.dev.coherent_dma_mask, 442a7b9837cSVladimir Barinov .coherent_dma_mask = DMA_BIT_MASK(32), 443a7b9837cSVladimir Barinov }, 444a7b9837cSVladimir Barinov }; 445a7b9837cSVladimir Barinov 4462c8788bfSSergei Shtylyov /* USB */ 4472c8788bfSSergei Shtylyov static struct usb_phy *phy; 4482c8788bfSSergei Shtylyov 4492c8788bfSSergei Shtylyov static int usb_power_on(struct platform_device *pdev) 4502c8788bfSSergei Shtylyov { 4512c8788bfSSergei Shtylyov if (IS_ERR(phy)) 4522c8788bfSSergei Shtylyov return PTR_ERR(phy); 4532c8788bfSSergei Shtylyov 4542c8788bfSSergei Shtylyov pm_runtime_enable(&pdev->dev); 4552c8788bfSSergei Shtylyov pm_runtime_get_sync(&pdev->dev); 4562c8788bfSSergei Shtylyov 4572c8788bfSSergei Shtylyov usb_phy_init(phy); 4582c8788bfSSergei Shtylyov 4592c8788bfSSergei Shtylyov return 0; 4602c8788bfSSergei Shtylyov } 4612c8788bfSSergei Shtylyov 4622c8788bfSSergei Shtylyov static void usb_power_off(struct platform_device *pdev) 4632c8788bfSSergei Shtylyov { 4642c8788bfSSergei Shtylyov if (IS_ERR(phy)) 4652c8788bfSSergei Shtylyov return; 4662c8788bfSSergei Shtylyov 4672c8788bfSSergei Shtylyov usb_phy_shutdown(phy); 4682c8788bfSSergei Shtylyov 4692c8788bfSSergei Shtylyov pm_runtime_put_sync(&pdev->dev); 4702c8788bfSSergei Shtylyov pm_runtime_disable(&pdev->dev); 4712c8788bfSSergei Shtylyov } 4722c8788bfSSergei Shtylyov 47384a812daSSergei Shtylyov static int ehci_init_internal_buffer(struct usb_hcd *hcd) 47484a812daSSergei Shtylyov { 47584a812daSSergei Shtylyov /* 47684a812daSSergei Shtylyov * Below are recommended values from the datasheet; 47784a812daSSergei Shtylyov * see [USB :: Setting of EHCI Internal Buffer]. 47884a812daSSergei Shtylyov */ 47984a812daSSergei Shtylyov /* EHCI IP internal buffer setting */ 48084a812daSSergei Shtylyov iowrite32(0x00ff0040, hcd->regs + 0x0094); 48184a812daSSergei Shtylyov /* EHCI IP internal buffer enable */ 48284a812daSSergei Shtylyov iowrite32(0x00000001, hcd->regs + 0x009C); 48384a812daSSergei Shtylyov 48484a812daSSergei Shtylyov return 0; 48584a812daSSergei Shtylyov } 48684a812daSSergei Shtylyov 4872c8788bfSSergei Shtylyov static struct usb_ehci_pdata ehcix_pdata = { 4882c8788bfSSergei Shtylyov .power_on = usb_power_on, 4892c8788bfSSergei Shtylyov .power_off = usb_power_off, 4902c8788bfSSergei Shtylyov .power_suspend = usb_power_off, 49184a812daSSergei Shtylyov .pre_setup = ehci_init_internal_buffer, 4922c8788bfSSergei Shtylyov }; 4932c8788bfSSergei Shtylyov 4942c8788bfSSergei Shtylyov static struct resource ehci0_resources[] = { 4952c8788bfSSergei Shtylyov [0] = { 4962c8788bfSSergei Shtylyov .start = 0xffe70000, 4972c8788bfSSergei Shtylyov .end = 0xffe70400 - 1, 4982c8788bfSSergei Shtylyov .flags = IORESOURCE_MEM, 4992c8788bfSSergei Shtylyov }, 5002c8788bfSSergei Shtylyov [1] = { 5012c8788bfSSergei Shtylyov .start = gic_iid(0x4c), 5022c8788bfSSergei Shtylyov .flags = IORESOURCE_IRQ, 5032c8788bfSSergei Shtylyov }, 5042c8788bfSSergei Shtylyov }; 5052c8788bfSSergei Shtylyov 5062c8788bfSSergei Shtylyov static struct platform_device ehci0_device = { 5072c8788bfSSergei Shtylyov .name = "ehci-platform", 5082c8788bfSSergei Shtylyov .id = 0, 5092c8788bfSSergei Shtylyov .dev = { 5102c8788bfSSergei Shtylyov .dma_mask = &ehci0_device.dev.coherent_dma_mask, 5112c8788bfSSergei Shtylyov .coherent_dma_mask = 0xffffffff, 5122c8788bfSSergei Shtylyov .platform_data = &ehcix_pdata, 5132c8788bfSSergei Shtylyov }, 5142c8788bfSSergei Shtylyov .num_resources = ARRAY_SIZE(ehci0_resources), 5152c8788bfSSergei Shtylyov .resource = ehci0_resources, 5162c8788bfSSergei Shtylyov }; 5172c8788bfSSergei Shtylyov 5182c8788bfSSergei Shtylyov static struct resource ehci1_resources[] = { 5192c8788bfSSergei Shtylyov [0] = { 5202c8788bfSSergei Shtylyov .start = 0xfff70000, 5212c8788bfSSergei Shtylyov .end = 0xfff70400 - 1, 5222c8788bfSSergei Shtylyov .flags = IORESOURCE_MEM, 5232c8788bfSSergei Shtylyov }, 5242c8788bfSSergei Shtylyov [1] = { 5252c8788bfSSergei Shtylyov .start = gic_iid(0x4d), 5262c8788bfSSergei Shtylyov .flags = IORESOURCE_IRQ, 5272c8788bfSSergei Shtylyov }, 5282c8788bfSSergei Shtylyov }; 5292c8788bfSSergei Shtylyov 5302c8788bfSSergei Shtylyov static struct platform_device ehci1_device = { 5312c8788bfSSergei Shtylyov .name = "ehci-platform", 5322c8788bfSSergei Shtylyov .id = 1, 5332c8788bfSSergei Shtylyov .dev = { 5342c8788bfSSergei Shtylyov .dma_mask = &ehci1_device.dev.coherent_dma_mask, 5352c8788bfSSergei Shtylyov .coherent_dma_mask = 0xffffffff, 5362c8788bfSSergei Shtylyov .platform_data = &ehcix_pdata, 5372c8788bfSSergei Shtylyov }, 5382c8788bfSSergei Shtylyov .num_resources = ARRAY_SIZE(ehci1_resources), 5392c8788bfSSergei Shtylyov .resource = ehci1_resources, 5402c8788bfSSergei Shtylyov }; 5412c8788bfSSergei Shtylyov 5422c8788bfSSergei Shtylyov static struct usb_ohci_pdata ohcix_pdata = { 5432c8788bfSSergei Shtylyov .power_on = usb_power_on, 5442c8788bfSSergei Shtylyov .power_off = usb_power_off, 5452c8788bfSSergei Shtylyov .power_suspend = usb_power_off, 5462c8788bfSSergei Shtylyov }; 5472c8788bfSSergei Shtylyov 5482c8788bfSSergei Shtylyov static struct resource ohci0_resources[] = { 5492c8788bfSSergei Shtylyov [0] = { 5502c8788bfSSergei Shtylyov .start = 0xffe70400, 5512c8788bfSSergei Shtylyov .end = 0xffe70800 - 1, 5522c8788bfSSergei Shtylyov .flags = IORESOURCE_MEM, 5532c8788bfSSergei Shtylyov }, 5542c8788bfSSergei Shtylyov [1] = { 5552c8788bfSSergei Shtylyov .start = gic_iid(0x4c), 5562c8788bfSSergei Shtylyov .flags = IORESOURCE_IRQ, 5572c8788bfSSergei Shtylyov }, 5582c8788bfSSergei Shtylyov }; 5592c8788bfSSergei Shtylyov 5602c8788bfSSergei Shtylyov static struct platform_device ohci0_device = { 5612c8788bfSSergei Shtylyov .name = "ohci-platform", 5622c8788bfSSergei Shtylyov .id = 0, 5632c8788bfSSergei Shtylyov .dev = { 5642c8788bfSSergei Shtylyov .dma_mask = &ohci0_device.dev.coherent_dma_mask, 5652c8788bfSSergei Shtylyov .coherent_dma_mask = 0xffffffff, 5662c8788bfSSergei Shtylyov .platform_data = &ohcix_pdata, 5672c8788bfSSergei Shtylyov }, 5682c8788bfSSergei Shtylyov .num_resources = ARRAY_SIZE(ohci0_resources), 5692c8788bfSSergei Shtylyov .resource = ohci0_resources, 5702c8788bfSSergei Shtylyov }; 5712c8788bfSSergei Shtylyov 5722c8788bfSSergei Shtylyov static struct resource ohci1_resources[] = { 5732c8788bfSSergei Shtylyov [0] = { 5742c8788bfSSergei Shtylyov .start = 0xfff70400, 5752c8788bfSSergei Shtylyov .end = 0xfff70800 - 1, 5762c8788bfSSergei Shtylyov .flags = IORESOURCE_MEM, 5772c8788bfSSergei Shtylyov }, 5782c8788bfSSergei Shtylyov [1] = { 5792c8788bfSSergei Shtylyov .start = gic_iid(0x4d), 5802c8788bfSSergei Shtylyov .flags = IORESOURCE_IRQ, 5812c8788bfSSergei Shtylyov }, 5822c8788bfSSergei Shtylyov }; 5832c8788bfSSergei Shtylyov 5842c8788bfSSergei Shtylyov static struct platform_device ohci1_device = { 5852c8788bfSSergei Shtylyov .name = "ohci-platform", 5862c8788bfSSergei Shtylyov .id = 1, 5872c8788bfSSergei Shtylyov .dev = { 5882c8788bfSSergei Shtylyov .dma_mask = &ohci1_device.dev.coherent_dma_mask, 5892c8788bfSSergei Shtylyov .coherent_dma_mask = 0xffffffff, 5902c8788bfSSergei Shtylyov .platform_data = &ohcix_pdata, 5912c8788bfSSergei Shtylyov }, 5922c8788bfSSergei Shtylyov .num_resources = ARRAY_SIZE(ohci1_resources), 5932c8788bfSSergei Shtylyov .resource = ohci1_resources, 5942c8788bfSSergei Shtylyov }; 5952c8788bfSSergei Shtylyov 596dace48d0SSergei Shtylyov /* Ether */ 597c7537655SKuninori Morimoto static struct resource ether_resources[] __initdata = { 598dace48d0SSergei Shtylyov { 599dace48d0SSergei Shtylyov .start = 0xfde00000, 600dace48d0SSergei Shtylyov .end = 0xfde003ff, 601dace48d0SSergei Shtylyov .flags = IORESOURCE_MEM, 602dace48d0SSergei Shtylyov }, { 603dace48d0SSergei Shtylyov .start = gic_iid(0xb4), 604dace48d0SSergei Shtylyov .flags = IORESOURCE_IRQ, 605dace48d0SSergei Shtylyov }, 606dace48d0SSergei Shtylyov }; 607dace48d0SSergei Shtylyov 608916ddc35SSimon Horman static struct platform_device *r8a7779_devices_dt[] __initdata = { 609f411fadeSMagnus Damm &scif0_device, 610f411fadeSMagnus Damm &scif1_device, 611f411fadeSMagnus Damm &scif2_device, 612f411fadeSMagnus Damm &scif3_device, 613f411fadeSMagnus Damm &scif4_device, 614f411fadeSMagnus Damm &scif5_device, 615f411fadeSMagnus Damm &tmu00_device, 616f411fadeSMagnus Damm &tmu01_device, 61710e8d4f6SSimon Horman }; 61810e8d4f6SSimon Horman 6192c8788bfSSergei Shtylyov static struct platform_device *r8a7779_standard_devices[] __initdata = { 620ccc2a27bSKuninori Morimoto &i2c0_device, 621ccc2a27bSKuninori Morimoto &i2c1_device, 622ccc2a27bSKuninori Morimoto &i2c2_device, 623ccc2a27bSKuninori Morimoto &i2c3_device, 624a7b9837cSVladimir Barinov &sata_device, 625f411fadeSMagnus Damm }; 626f411fadeSMagnus Damm 627f411fadeSMagnus Damm void __init r8a7779_add_standard_devices(void) 628f411fadeSMagnus Damm { 6298bac13f5SMagnus Damm #ifdef CONFIG_CACHE_L2X0 6308bac13f5SMagnus Damm /* Early BRESP enable, Shared attribute override enable, 64K*16way */ 631ed7d132aSKuninori Morimoto l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff); 6328bac13f5SMagnus Damm #endif 633a662c082SMagnus Damm r8a7779_pm_init(); 634a662c082SMagnus Damm 63545e5ca57SRafael J. Wysocki r8a7779_init_pm_domains(); 636a662c082SMagnus Damm 637916ddc35SSimon Horman platform_add_devices(r8a7779_devices_dt, 638916ddc35SSimon Horman ARRAY_SIZE(r8a7779_devices_dt)); 6392c8788bfSSergei Shtylyov platform_add_devices(r8a7779_standard_devices, 6402c8788bfSSergei Shtylyov ARRAY_SIZE(r8a7779_standard_devices)); 641f411fadeSMagnus Damm } 642f411fadeSMagnus Damm 643dace48d0SSergei Shtylyov void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata) 644dace48d0SSergei Shtylyov { 6454c370abbSSergei Shtylyov platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1, 646dace48d0SSergei Shtylyov ether_resources, 647dace48d0SSergei Shtylyov ARRAY_SIZE(ether_resources), 648dace48d0SSergei Shtylyov pdata, sizeof(*pdata)); 649dace48d0SSergei Shtylyov } 650dace48d0SSergei Shtylyov 651b759bd11SMagnus Damm /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 652b759bd11SMagnus Damm void __init __weak r8a7779_register_twd(void) { } 653b759bd11SMagnus Damm 6546bb27d73SStephen Warren void __init r8a7779_earlytimer_init(void) 655df27a2d8SMagnus Damm { 656df27a2d8SMagnus Damm r8a7779_clock_init(); 657df27a2d8SMagnus Damm shmobile_earlytimer_init(); 658b759bd11SMagnus Damm r8a7779_register_twd(); 659df27a2d8SMagnus Damm } 660df27a2d8SMagnus Damm 661f411fadeSMagnus Damm void __init r8a7779_add_early_devices(void) 662f411fadeSMagnus Damm { 663916ddc35SSimon Horman early_platform_add_devices(r8a7779_devices_dt, 664916ddc35SSimon Horman ARRAY_SIZE(r8a7779_devices_dt)); 6653e353b87SMagnus Damm 6663e353b87SMagnus Damm /* Early serial console setup is not included here due to 6673e353b87SMagnus Damm * memory map collisions. The SCIF serial ports in r8a7779 6683e353b87SMagnus Damm * are difficult to entity map 1:1 due to collision with the 6693e353b87SMagnus Damm * virtual memory range used by the coherent DMA code on ARM. 6703e353b87SMagnus Damm * 6713e353b87SMagnus Damm * Anyone wanting to debug early can remove UPF_IOREMAP from 6723e353b87SMagnus Damm * the sh-sci serial console platform data, adjust mapbase 6733e353b87SMagnus Damm * to a static M:N virt:phys mapping that needs to be added to 6743e353b87SMagnus Damm * the mappings passed with iotable_init() above. 6753e353b87SMagnus Damm * 6763e353b87SMagnus Damm * Then add a call to shmobile_setup_console() from this function. 6773e353b87SMagnus Damm * 6783e353b87SMagnus Damm * As a final step pass earlyprint=sh-sci.2,115200 on the kernel 6793e353b87SMagnus Damm * command line in case of the marzen board. 6803e353b87SMagnus Damm */ 681f411fadeSMagnus Damm } 68210e8d4f6SSimon Horman 6832c8788bfSSergei Shtylyov static struct platform_device *r8a7779_late_devices[] __initdata = { 6842c8788bfSSergei Shtylyov &ehci0_device, 6852c8788bfSSergei Shtylyov &ehci1_device, 6862c8788bfSSergei Shtylyov &ohci0_device, 6872c8788bfSSergei Shtylyov &ohci1_device, 6882c8788bfSSergei Shtylyov }; 6892c8788bfSSergei Shtylyov 6902c8788bfSSergei Shtylyov void __init r8a7779_init_late(void) 6912c8788bfSSergei Shtylyov { 6922c8788bfSSergei Shtylyov /* get USB PHY */ 6932c8788bfSSergei Shtylyov phy = usb_get_phy(USB_PHY_TYPE_USB2); 6942c8788bfSSergei Shtylyov 6952c8788bfSSergei Shtylyov shmobile_init_late(); 6962c8788bfSSergei Shtylyov platform_add_devices(r8a7779_late_devices, 6972c8788bfSSergei Shtylyov ARRAY_SIZE(r8a7779_late_devices)); 6982c8788bfSSergei Shtylyov } 6992c8788bfSSergei Shtylyov 70010e8d4f6SSimon Horman #ifdef CONFIG_USE_OF 7015b3859d7SKuninori Morimoto static int r8a7779_set_wake(struct irq_data *data, unsigned int on) 7025b3859d7SKuninori Morimoto { 7035b3859d7SKuninori Morimoto return 0; /* always allow wakeup */ 7045b3859d7SKuninori Morimoto } 7055b3859d7SKuninori Morimoto 7065b3859d7SKuninori Morimoto void __init r8a7779_init_irq_dt(void) 7075b3859d7SKuninori Morimoto { 7085b3859d7SKuninori Morimoto gic_arch_extn.irq_set_wake = r8a7779_set_wake; 7095b3859d7SKuninori Morimoto 7105b3859d7SKuninori Morimoto irqchip_init(); 7115b3859d7SKuninori Morimoto 7125b3859d7SKuninori Morimoto /* route all interrupts to ARM */ 7135b3859d7SKuninori Morimoto __raw_writel(0xffffffff, INT2NTSR0); 7145b3859d7SKuninori Morimoto __raw_writel(0x3fffffff, INT2NTSR1); 7155b3859d7SKuninori Morimoto 7165b3859d7SKuninori Morimoto /* unmask all known interrupts in INTCS2 */ 7175b3859d7SKuninori Morimoto __raw_writel(0xfffffff0, INT2SMSKCR0); 7185b3859d7SKuninori Morimoto __raw_writel(0xfff7ffff, INT2SMSKCR1); 7195b3859d7SKuninori Morimoto __raw_writel(0xfffbffdf, INT2SMSKCR2); 7205b3859d7SKuninori Morimoto __raw_writel(0xbffffffc, INT2SMSKCR3); 7215b3859d7SKuninori Morimoto __raw_writel(0x003fee3f, INT2SMSKCR4); 7225b3859d7SKuninori Morimoto } 7235b3859d7SKuninori Morimoto 724916ddc35SSimon Horman void __init r8a7779_init_delay(void) 72510e8d4f6SSimon Horman { 72610e8d4f6SSimon Horman shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */ 72710e8d4f6SSimon Horman } 72810e8d4f6SSimon Horman 72910e8d4f6SSimon Horman void __init r8a7779_add_standard_devices_dt(void) 73010e8d4f6SSimon Horman { 73110e8d4f6SSimon Horman /* clocks are setup late during boot in the case of DT */ 73210e8d4f6SSimon Horman r8a7779_clock_init(); 73310e8d4f6SSimon Horman 734916ddc35SSimon Horman platform_add_devices(r8a7779_devices_dt, 735916ddc35SSimon Horman ARRAY_SIZE(r8a7779_devices_dt)); 73641b0156cSMagnus Damm of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 73710e8d4f6SSimon Horman } 73810e8d4f6SSimon Horman 73910e8d4f6SSimon Horman static const char *r8a7779_compat_dt[] __initdata = { 74010e8d4f6SSimon Horman "renesas,r8a7779", 74110e8d4f6SSimon Horman NULL, 74210e8d4f6SSimon Horman }; 74310e8d4f6SSimon Horman 744abe0e14bSKuninori Morimoto DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") 74510e8d4f6SSimon Horman .map_io = r8a7779_map_io, 746916ddc35SSimon Horman .init_early = r8a7779_init_delay, 74710e8d4f6SSimon Horman .nr_irqs = NR_IRQS_LEGACY, 74810e8d4f6SSimon Horman .init_irq = r8a7779_init_irq_dt, 74910e8d4f6SSimon Horman .init_machine = r8a7779_add_standard_devices_dt, 7502c8788bfSSergei Shtylyov .init_late = r8a7779_init_late, 75110e8d4f6SSimon Horman .dt_compat = r8a7779_compat_dt, 75210e8d4f6SSimon Horman MACHINE_END 75310e8d4f6SSimon Horman #endif /* CONFIG_USE_OF */ 754