1c44e182eSWolfram Sang // SPDX-License-Identifier: GPL-2.0
2f411fadeSMagnus Damm /*
3f411fadeSMagnus Damm * r8a7779 processor support
4f411fadeSMagnus Damm *
5dace48d0SSergei Shtylyov * Copyright (C) 2011, 2013 Renesas Solutions Corp.
6f411fadeSMagnus Damm * Copyright (C) 2011 Magnus Damm
7dace48d0SSergei Shtylyov * Copyright (C) 2013 Cogent Embedded, Inc.
8f411fadeSMagnus Damm */
9f411fadeSMagnus Damm #include <linux/init.h>
105b3859d7SKuninori Morimoto #include <linux/irqchip.h>
111b55353cSGeert Uytterhoeven
12f411fadeSMagnus Damm #include <asm/mach/arch.h>
133e353b87SMagnus Damm #include <asm/mach/map.h>
141b55353cSGeert Uytterhoeven
15fd44aa5eSMagnus Damm #include "common.h"
161b55353cSGeert Uytterhoeven #include "r8a7779.h"
173e353b87SMagnus Damm
18caf67a93SGeert Uytterhoeven #define HPBREG_BASE 0xfe700000
195b3859d7SKuninori Morimoto
20caf67a93SGeert Uytterhoeven /* IRQ */
21caf67a93SGeert Uytterhoeven #define INT2SMSKCR0 0x822a0 /* Interrupt Submask Clear Register 0 */
22caf67a93SGeert Uytterhoeven #define INT2SMSKCR1 0x822a4 /* Interrupt Submask Clear Register 1 */
23caf67a93SGeert Uytterhoeven #define INT2SMSKCR2 0x822a8 /* Interrupt Submask Clear Register 2 */
24caf67a93SGeert Uytterhoeven #define INT2SMSKCR3 0x822ac /* Interrupt Submask Clear Register 3 */
25caf67a93SGeert Uytterhoeven #define INT2SMSKCR4 0x822b0 /* Interrupt Submask Clear Register 4 */
26caf67a93SGeert Uytterhoeven
27caf67a93SGeert Uytterhoeven #define INT2NTSR0 0x00060 /* Interrupt Notification Select Register 0 */
28caf67a93SGeert Uytterhoeven #define INT2NTSR1 0x00064 /* Interrupt Notification Select Register 1 */
295b3859d7SKuninori Morimoto
r8a7779_init_irq_dt(void)30c99cd90dSMagnus Damm static void __init r8a7779_init_irq_dt(void)
315b3859d7SKuninori Morimoto {
32caf67a93SGeert Uytterhoeven void __iomem *base = ioremap(HPBREG_BASE, 0x00100000);
33caf67a93SGeert Uytterhoeven
345b3859d7SKuninori Morimoto irqchip_init();
35c99cd90dSMagnus Damm
365b3859d7SKuninori Morimoto /* route all interrupts to ARM */
37d4a617c9SGeert Uytterhoeven writel(0xffffffff, base + INT2NTSR0);
38d4a617c9SGeert Uytterhoeven writel(0x3fffffff, base + INT2NTSR1);
395b3859d7SKuninori Morimoto
405b3859d7SKuninori Morimoto /* unmask all known interrupts in INTCS2 */
41d4a617c9SGeert Uytterhoeven writel(0xfffffff0, base + INT2SMSKCR0);
42d4a617c9SGeert Uytterhoeven writel(0xfff7ffff, base + INT2SMSKCR1);
43d4a617c9SGeert Uytterhoeven writel(0xfffbffdf, base + INT2SMSKCR2);
44d4a617c9SGeert Uytterhoeven writel(0xbffffffc, base + INT2SMSKCR3);
45d4a617c9SGeert Uytterhoeven writel(0x003fee3f, base + INT2SMSKCR4);
46caf67a93SGeert Uytterhoeven
47caf67a93SGeert Uytterhoeven iounmap(base);
485b3859d7SKuninori Morimoto }
495b3859d7SKuninori Morimoto
5019c233b7SNicolas Pitre static const char *const r8a7779_compat_dt[] __initconst = {
5110e8d4f6SSimon Horman "renesas,r8a7779",
52*3238f82dSGeert Uytterhoeven NULL
5310e8d4f6SSimon Horman };
5410e8d4f6SSimon Horman
55abe0e14bSKuninori Morimoto DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
5644ade5edSMagnus Damm .smp = smp_ops(r8a7779_smp_ops),
5710e8d4f6SSimon Horman .init_irq = r8a7779_init_irq_dt,
58d5b00b90SMagnus Damm .init_late = shmobile_init_late,
5910e8d4f6SSimon Horman .dt_compat = r8a7779_compat_dt,
6010e8d4f6SSimon Horman MACHINE_END
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