1 /*
2  * r8a7778 processor support
3  *
4  * Copyright (C) 2013  Renesas Solutions Corp.
5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; version 2 of the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  */
20 
21 #include <linux/kernel.h>
22 #include <linux/io.h>
23 #include <linux/irqchip/arm-gic.h>
24 #include <linux/of.h>
25 #include <linux/of_platform.h>
26 #include <linux/platform_device.h>
27 #include <linux/irqchip.h>
28 #include <linux/sh_timer.h>
29 #include <mach/irqs.h>
30 #include <mach/r8a7778.h>
31 #include <mach/common.h>
32 #include <asm/mach/arch.h>
33 #include <asm/hardware/cache-l2x0.h>
34 
35 /* TMU */
36 static struct resource sh_tmu0_resources[] = {
37 	DEFINE_RES_MEM(0xffd80008, 12),
38 	DEFINE_RES_IRQ(gic_iid(0x40)),
39 };
40 
41 static struct sh_timer_config sh_tmu0_platform_data = {
42 	.name			= "TMU00",
43 	.channel_offset		= 0x4,
44 	.timer_bit		= 0,
45 	.clockevent_rating	= 200,
46 };
47 
48 static struct resource sh_tmu1_resources[] = {
49 	DEFINE_RES_MEM(0xffd80014, 12),
50 	DEFINE_RES_IRQ(gic_iid(0x41)),
51 };
52 
53 static struct sh_timer_config sh_tmu1_platform_data = {
54 	.name			= "TMU01",
55 	.channel_offset		= 0x10,
56 	.timer_bit		= 1,
57 	.clocksource_rating	= 200,
58 };
59 
60 #define PLATFORM_INFO(n, i)					\
61 {								\
62 	.parent		= &platform_bus,			\
63 	.name		= #n,					\
64 	.id		= i,					\
65 	.res		= n ## i ## _resources,			\
66 	.num_res	= ARRAY_SIZE(n ## i ##_resources),	\
67 	.data		= &n ## i ##_platform_data,		\
68 	.size_data	= sizeof(n ## i ## _platform_data),	\
69 }
70 
71 struct platform_device_info platform_devinfo[] = {
72 	PLATFORM_INFO(sh_tmu, 0),
73 	PLATFORM_INFO(sh_tmu, 1),
74 };
75 
76 void __init r8a7778_add_standard_devices(void)
77 {
78 	int i;
79 
80 #ifdef CONFIG_CACHE_L2X0
81 	void __iomem *base = ioremap_nocache(0xf0100000, 0x1000);
82 	if (base) {
83 		/*
84 		 * Early BRESP enable, Shared attribute override enable, 64K*16way
85 		 * don't call iounmap(base)
86 		 */
87 		l2x0_init(base, 0x40470000, 0x82000fff);
88 	}
89 #endif
90 
91 	for (i = 0; i < ARRAY_SIZE(platform_devinfo); i++)
92 		platform_device_register_full(&platform_devinfo[i]);
93 }
94 
95 #define INT2SMSKCR0	0x82288 /* 0xfe782288 */
96 #define INT2SMSKCR1	0x8228c /* 0xfe78228c */
97 
98 #define INT2NTSR0	0x00018 /* 0xfe700018 */
99 #define INT2NTSR1	0x0002c /* 0xfe70002c */
100 static void __init r8a7778_init_irq_common(void)
101 {
102 	void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
103 
104 	BUG_ON(!base);
105 
106 	/* route all interrupts to ARM */
107 	__raw_writel(0x73ffffff, base + INT2NTSR0);
108 	__raw_writel(0xffffffff, base + INT2NTSR1);
109 
110 	/* unmask all known interrupts in INTCS2 */
111 	__raw_writel(0x08330773, base + INT2SMSKCR0);
112 	__raw_writel(0x00311110, base + INT2SMSKCR1);
113 
114 	iounmap(base);
115 }
116 
117 void __init r8a7778_init_irq(void)
118 {
119 	void __iomem *gic_dist_base;
120 	void __iomem *gic_cpu_base;
121 
122 	gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE);
123 	gic_cpu_base  = ioremap_nocache(0xfe430000, PAGE_SIZE);
124 	BUG_ON(!gic_dist_base || !gic_cpu_base);
125 
126 	/* use GIC to handle interrupts */
127 	gic_init(0, 29, gic_dist_base, gic_cpu_base);
128 
129 	r8a7778_init_irq_common();
130 }
131 
132 void __init r8a7778_init_delay(void)
133 {
134 	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
135 }
136 
137 #ifdef CONFIG_USE_OF
138 void __init r8a7778_init_irq_dt(void)
139 {
140 	irqchip_init();
141 	r8a7778_init_irq_common();
142 }
143 
144 static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = {
145 	{},
146 };
147 
148 void __init r8a7778_add_standard_devices_dt(void)
149 {
150 	of_platform_populate(NULL, of_default_bus_match_table,
151 			     r8a7778_auxdata_lookup, NULL);
152 }
153 
154 static const char *r8a7778_compat_dt[] __initdata = {
155 	"renesas,r8a7778",
156 	NULL,
157 };
158 
159 DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
160 	.init_early	= r8a7778_init_delay,
161 	.init_irq	= r8a7778_init_irq_dt,
162 	.init_machine	= r8a7778_add_standard_devices_dt,
163 	.init_time	= shmobile_timer_init,
164 	.dt_compat	= r8a7778_compat_dt,
165 MACHINE_END
166 
167 #endif /* CONFIG_USE_OF */
168