1ccb7cc74SKuninori Morimoto /* 2ccb7cc74SKuninori Morimoto * r8a7778 processor support 3ccb7cc74SKuninori Morimoto * 4ccb7cc74SKuninori Morimoto * Copyright (C) 2013 Renesas Solutions Corp. 5ccb7cc74SKuninori Morimoto * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 652421914SSergei Shtylyov * Copyright (C) 2013 Cogent Embedded, Inc. 7ccb7cc74SKuninori Morimoto * 8ccb7cc74SKuninori Morimoto * This program is free software; you can redistribute it and/or modify 9ccb7cc74SKuninori Morimoto * it under the terms of the GNU General Public License as published by 10ccb7cc74SKuninori Morimoto * the Free Software Foundation; version 2 of the License. 11ccb7cc74SKuninori Morimoto * 12ccb7cc74SKuninori Morimoto * This program is distributed in the hope that it will be useful, 13ccb7cc74SKuninori Morimoto * but WITHOUT ANY WARRANTY; without even the implied warranty of 14ccb7cc74SKuninori Morimoto * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15ccb7cc74SKuninori Morimoto * GNU General Public License for more details. 16ccb7cc74SKuninori Morimoto * 17ccb7cc74SKuninori Morimoto * You should have received a copy of the GNU General Public License 18ccb7cc74SKuninori Morimoto * along with this program; if not, write to the Free Software 19ccb7cc74SKuninori Morimoto * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 20ccb7cc74SKuninori Morimoto */ 21ccb7cc74SKuninori Morimoto 22ccb7cc74SKuninori Morimoto #include <linux/kernel.h> 23ccb7cc74SKuninori Morimoto #include <linux/io.h> 24ccb7cc74SKuninori Morimoto #include <linux/irqchip/arm-gic.h> 25ccb7cc74SKuninori Morimoto #include <linux/of.h> 26ccb7cc74SKuninori Morimoto #include <linux/of_platform.h> 273a42fa20SKuninori Morimoto #include <linux/platform_data/irq-renesas-intc-irqpin.h> 28ccb7cc74SKuninori Morimoto #include <linux/platform_device.h> 29ccb7cc74SKuninori Morimoto #include <linux/irqchip.h> 30db331fc8SKuninori Morimoto #include <linux/serial_sci.h> 31ccb7cc74SKuninori Morimoto #include <linux/sh_timer.h> 32ccb7cc74SKuninori Morimoto #include <mach/irqs.h> 33ccb7cc74SKuninori Morimoto #include <mach/r8a7778.h> 34ccb7cc74SKuninori Morimoto #include <mach/common.h> 35ccb7cc74SKuninori Morimoto #include <asm/mach/arch.h> 36ccb7cc74SKuninori Morimoto #include <asm/hardware/cache-l2x0.h> 37ccb7cc74SKuninori Morimoto 38db331fc8SKuninori Morimoto /* SCIF */ 39db331fc8SKuninori Morimoto #define SCIF_INFO(baseaddr, irq) \ 40db331fc8SKuninori Morimoto { \ 41db331fc8SKuninori Morimoto .mapbase = baseaddr, \ 42db331fc8SKuninori Morimoto .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ 43db331fc8SKuninori Morimoto .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \ 44db331fc8SKuninori Morimoto .scbrr_algo_id = SCBRR_ALGO_2, \ 45db331fc8SKuninori Morimoto .type = PORT_SCIF, \ 46db331fc8SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(irq), \ 47db331fc8SKuninori Morimoto } 48db331fc8SKuninori Morimoto 49db331fc8SKuninori Morimoto static struct plat_sci_port scif_platform_data[] = { 50db331fc8SKuninori Morimoto SCIF_INFO(0xffe40000, gic_iid(0x66)), 51db331fc8SKuninori Morimoto SCIF_INFO(0xffe41000, gic_iid(0x67)), 52db331fc8SKuninori Morimoto SCIF_INFO(0xffe42000, gic_iid(0x68)), 53db331fc8SKuninori Morimoto SCIF_INFO(0xffe43000, gic_iid(0x69)), 54db331fc8SKuninori Morimoto SCIF_INFO(0xffe44000, gic_iid(0x6a)), 55db331fc8SKuninori Morimoto SCIF_INFO(0xffe45000, gic_iid(0x6b)), 56db331fc8SKuninori Morimoto }; 57db331fc8SKuninori Morimoto 58ccb7cc74SKuninori Morimoto /* TMU */ 59ccb7cc74SKuninori Morimoto static struct resource sh_tmu0_resources[] = { 60ccb7cc74SKuninori Morimoto DEFINE_RES_MEM(0xffd80008, 12), 61ccb7cc74SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x40)), 62ccb7cc74SKuninori Morimoto }; 63ccb7cc74SKuninori Morimoto 64ccb7cc74SKuninori Morimoto static struct sh_timer_config sh_tmu0_platform_data = { 65ccb7cc74SKuninori Morimoto .name = "TMU00", 66ccb7cc74SKuninori Morimoto .channel_offset = 0x4, 67ccb7cc74SKuninori Morimoto .timer_bit = 0, 68ccb7cc74SKuninori Morimoto .clockevent_rating = 200, 69ccb7cc74SKuninori Morimoto }; 70ccb7cc74SKuninori Morimoto 71ccb7cc74SKuninori Morimoto static struct resource sh_tmu1_resources[] = { 72ccb7cc74SKuninori Morimoto DEFINE_RES_MEM(0xffd80014, 12), 73ccb7cc74SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x41)), 74ccb7cc74SKuninori Morimoto }; 75ccb7cc74SKuninori Morimoto 76ccb7cc74SKuninori Morimoto static struct sh_timer_config sh_tmu1_platform_data = { 77ccb7cc74SKuninori Morimoto .name = "TMU01", 78ccb7cc74SKuninori Morimoto .channel_offset = 0x10, 79ccb7cc74SKuninori Morimoto .timer_bit = 1, 80ccb7cc74SKuninori Morimoto .clocksource_rating = 200, 81ccb7cc74SKuninori Morimoto }; 82ccb7cc74SKuninori Morimoto 8381484487SKuninori Morimoto #define r8a7778_register_tmu(idx) \ 8481484487SKuninori Morimoto platform_device_register_resndata( \ 8581484487SKuninori Morimoto &platform_bus, "sh_tmu", idx, \ 8681484487SKuninori Morimoto sh_tmu##idx##_resources, \ 8781484487SKuninori Morimoto ARRAY_SIZE(sh_tmu##idx##_resources), \ 8881484487SKuninori Morimoto &sh_tmu##idx##_platform_data, \ 8981484487SKuninori Morimoto sizeof(sh_tmu##idx##_platform_data)) 90ccb7cc74SKuninori Morimoto 91734e02f8SKuninori Morimoto /* Ether */ 92734e02f8SKuninori Morimoto static struct resource ether_resources[] = { 93734e02f8SKuninori Morimoto DEFINE_RES_MEM(0xfde00000, 0x400), 94734e02f8SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x89)), 95734e02f8SKuninori Morimoto }; 96734e02f8SKuninori Morimoto 97734e02f8SKuninori Morimoto void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata) 98734e02f8SKuninori Morimoto { 99734e02f8SKuninori Morimoto platform_device_register_resndata(&platform_bus, "sh_eth", -1, 100734e02f8SKuninori Morimoto ether_resources, 101734e02f8SKuninori Morimoto ARRAY_SIZE(ether_resources), 102734e02f8SKuninori Morimoto pdata, sizeof(*pdata)); 103734e02f8SKuninori Morimoto } 104734e02f8SKuninori Morimoto 105dab58113SKuninori Morimoto /* SDHI */ 106dab58113SKuninori Morimoto static struct resource sdhi_resources[] = { 107dab58113SKuninori Morimoto /* SDHI0 */ 108dab58113SKuninori Morimoto DEFINE_RES_MEM(0xFFE4C000, 0x100), 109dab58113SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x77)), 110dab58113SKuninori Morimoto /* SDHI1 */ 111dab58113SKuninori Morimoto DEFINE_RES_MEM(0xFFE4D000, 0x100), 112dab58113SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x78)), 113dab58113SKuninori Morimoto /* SDHI2 */ 114dab58113SKuninori Morimoto DEFINE_RES_MEM(0xFFE4F000, 0x100), 115dab58113SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x76)), 116dab58113SKuninori Morimoto }; 117dab58113SKuninori Morimoto 118dab58113SKuninori Morimoto void __init r8a7778_sdhi_init(int id, 119dab58113SKuninori Morimoto struct sh_mobile_sdhi_info *info) 120dab58113SKuninori Morimoto { 121dab58113SKuninori Morimoto BUG_ON(id < 0 || id > 2); 122dab58113SKuninori Morimoto 123dab58113SKuninori Morimoto platform_device_register_resndata( 124dab58113SKuninori Morimoto &platform_bus, "sh_mobile_sdhi", id, 125dab58113SKuninori Morimoto sdhi_resources + (2 * id), 2, 126dab58113SKuninori Morimoto info, sizeof(*info)); 127dab58113SKuninori Morimoto } 128dab58113SKuninori Morimoto 129ccb7cc74SKuninori Morimoto void __init r8a7778_add_standard_devices(void) 130ccb7cc74SKuninori Morimoto { 131ccb7cc74SKuninori Morimoto int i; 132ccb7cc74SKuninori Morimoto 133ccb7cc74SKuninori Morimoto #ifdef CONFIG_CACHE_L2X0 134ccb7cc74SKuninori Morimoto void __iomem *base = ioremap_nocache(0xf0100000, 0x1000); 135ccb7cc74SKuninori Morimoto if (base) { 136ccb7cc74SKuninori Morimoto /* 137ccb7cc74SKuninori Morimoto * Early BRESP enable, Shared attribute override enable, 64K*16way 138ccb7cc74SKuninori Morimoto * don't call iounmap(base) 139ccb7cc74SKuninori Morimoto */ 140ccb7cc74SKuninori Morimoto l2x0_init(base, 0x40470000, 0x82000fff); 141ccb7cc74SKuninori Morimoto } 142ccb7cc74SKuninori Morimoto #endif 143ccb7cc74SKuninori Morimoto 144db331fc8SKuninori Morimoto for (i = 0; i < ARRAY_SIZE(scif_platform_data); i++) 145db331fc8SKuninori Morimoto platform_device_register_data(&platform_bus, "sh-sci", i, 146db331fc8SKuninori Morimoto &scif_platform_data[i], 147db331fc8SKuninori Morimoto sizeof(struct plat_sci_port)); 148db331fc8SKuninori Morimoto 14981484487SKuninori Morimoto r8a7778_register_tmu(0); 15081484487SKuninori Morimoto r8a7778_register_tmu(1); 151ccb7cc74SKuninori Morimoto } 152ccb7cc74SKuninori Morimoto 1533a42fa20SKuninori Morimoto static struct renesas_intc_irqpin_config irqpin_platform_data = { 1543a42fa20SKuninori Morimoto .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ 1553a42fa20SKuninori Morimoto .sense_bitfield_width = 2, 1563a42fa20SKuninori Morimoto }; 1573a42fa20SKuninori Morimoto 1583a42fa20SKuninori Morimoto static struct resource irqpin_resources[] = { 1593a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */ 1603a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */ 1613a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */ 1623a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */ 1633a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */ 1643a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3b)), /* IRQ0 */ 1653a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3c)), /* IRQ1 */ 1663a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3d)), /* IRQ2 */ 1673a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3e)), /* IRQ3 */ 1683a42fa20SKuninori Morimoto }; 1693a42fa20SKuninori Morimoto 1703a42fa20SKuninori Morimoto void __init r8a7778_init_irq_extpin(int irlm) 1713a42fa20SKuninori Morimoto { 1723a42fa20SKuninori Morimoto void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE); 1733a42fa20SKuninori Morimoto unsigned long tmp; 1743a42fa20SKuninori Morimoto 1753a42fa20SKuninori Morimoto if (!icr0) { 1763a42fa20SKuninori Morimoto pr_warn("r8a7778: unable to setup external irq pin mode\n"); 1773a42fa20SKuninori Morimoto return; 1783a42fa20SKuninori Morimoto } 1793a42fa20SKuninori Morimoto 1803a42fa20SKuninori Morimoto tmp = ioread32(icr0); 1813a42fa20SKuninori Morimoto if (irlm) 1823a42fa20SKuninori Morimoto tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */ 1833a42fa20SKuninori Morimoto else 1843a42fa20SKuninori Morimoto tmp &= ~(1 << 23); /* IRL mode - not supported */ 1853a42fa20SKuninori Morimoto tmp |= (1 << 21); /* LVLMODE = 1 */ 1863a42fa20SKuninori Morimoto iowrite32(tmp, icr0); 1873a42fa20SKuninori Morimoto iounmap(icr0); 1883a42fa20SKuninori Morimoto 1893a42fa20SKuninori Morimoto if (irlm) 1903a42fa20SKuninori Morimoto platform_device_register_resndata( 1913a42fa20SKuninori Morimoto &platform_bus, "renesas_intc_irqpin", -1, 1923a42fa20SKuninori Morimoto irqpin_resources, ARRAY_SIZE(irqpin_resources), 1933a42fa20SKuninori Morimoto &irqpin_platform_data, sizeof(irqpin_platform_data)); 1943a42fa20SKuninori Morimoto } 1953a42fa20SKuninori Morimoto 196ccb7cc74SKuninori Morimoto #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ 197ccb7cc74SKuninori Morimoto #define INT2SMSKCR1 0x8228c /* 0xfe78228c */ 198ccb7cc74SKuninori Morimoto 199ccb7cc74SKuninori Morimoto #define INT2NTSR0 0x00018 /* 0xfe700018 */ 200ccb7cc74SKuninori Morimoto #define INT2NTSR1 0x0002c /* 0xfe70002c */ 201ccb7cc74SKuninori Morimoto static void __init r8a7778_init_irq_common(void) 202ccb7cc74SKuninori Morimoto { 203ccb7cc74SKuninori Morimoto void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); 204ccb7cc74SKuninori Morimoto 205ccb7cc74SKuninori Morimoto BUG_ON(!base); 206ccb7cc74SKuninori Morimoto 207ccb7cc74SKuninori Morimoto /* route all interrupts to ARM */ 208ccb7cc74SKuninori Morimoto __raw_writel(0x73ffffff, base + INT2NTSR0); 209ccb7cc74SKuninori Morimoto __raw_writel(0xffffffff, base + INT2NTSR1); 210ccb7cc74SKuninori Morimoto 211ccb7cc74SKuninori Morimoto /* unmask all known interrupts in INTCS2 */ 212ccb7cc74SKuninori Morimoto __raw_writel(0x08330773, base + INT2SMSKCR0); 213ccb7cc74SKuninori Morimoto __raw_writel(0x00311110, base + INT2SMSKCR1); 214ccb7cc74SKuninori Morimoto 215ccb7cc74SKuninori Morimoto iounmap(base); 216ccb7cc74SKuninori Morimoto } 217ccb7cc74SKuninori Morimoto 218ccb7cc74SKuninori Morimoto void __init r8a7778_init_irq(void) 219ccb7cc74SKuninori Morimoto { 220ccb7cc74SKuninori Morimoto void __iomem *gic_dist_base; 221ccb7cc74SKuninori Morimoto void __iomem *gic_cpu_base; 222ccb7cc74SKuninori Morimoto 223ccb7cc74SKuninori Morimoto gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE); 224ccb7cc74SKuninori Morimoto gic_cpu_base = ioremap_nocache(0xfe430000, PAGE_SIZE); 225ccb7cc74SKuninori Morimoto BUG_ON(!gic_dist_base || !gic_cpu_base); 226ccb7cc74SKuninori Morimoto 227ccb7cc74SKuninori Morimoto /* use GIC to handle interrupts */ 228ccb7cc74SKuninori Morimoto gic_init(0, 29, gic_dist_base, gic_cpu_base); 229ccb7cc74SKuninori Morimoto 230ccb7cc74SKuninori Morimoto r8a7778_init_irq_common(); 231ccb7cc74SKuninori Morimoto } 232ccb7cc74SKuninori Morimoto 233ccb7cc74SKuninori Morimoto void __init r8a7778_init_delay(void) 234ccb7cc74SKuninori Morimoto { 235ccb7cc74SKuninori Morimoto shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */ 236ccb7cc74SKuninori Morimoto } 237ccb7cc74SKuninori Morimoto 238ccb7cc74SKuninori Morimoto #ifdef CONFIG_USE_OF 239ccb7cc74SKuninori Morimoto void __init r8a7778_init_irq_dt(void) 240ccb7cc74SKuninori Morimoto { 241ccb7cc74SKuninori Morimoto irqchip_init(); 242ccb7cc74SKuninori Morimoto r8a7778_init_irq_common(); 243ccb7cc74SKuninori Morimoto } 244ccb7cc74SKuninori Morimoto 245ccb7cc74SKuninori Morimoto static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = { 246ccb7cc74SKuninori Morimoto {}, 247ccb7cc74SKuninori Morimoto }; 248ccb7cc74SKuninori Morimoto 249ccb7cc74SKuninori Morimoto void __init r8a7778_add_standard_devices_dt(void) 250ccb7cc74SKuninori Morimoto { 251ccb7cc74SKuninori Morimoto of_platform_populate(NULL, of_default_bus_match_table, 252ccb7cc74SKuninori Morimoto r8a7778_auxdata_lookup, NULL); 253ccb7cc74SKuninori Morimoto } 254ccb7cc74SKuninori Morimoto 255ccb7cc74SKuninori Morimoto static const char *r8a7778_compat_dt[] __initdata = { 256ccb7cc74SKuninori Morimoto "renesas,r8a7778", 257ccb7cc74SKuninori Morimoto NULL, 258ccb7cc74SKuninori Morimoto }; 259ccb7cc74SKuninori Morimoto 260ccb7cc74SKuninori Morimoto DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") 261ccb7cc74SKuninori Morimoto .init_early = r8a7778_init_delay, 262ccb7cc74SKuninori Morimoto .init_irq = r8a7778_init_irq_dt, 263ccb7cc74SKuninori Morimoto .init_machine = r8a7778_add_standard_devices_dt, 264ccb7cc74SKuninori Morimoto .init_time = shmobile_timer_init, 265ccb7cc74SKuninori Morimoto .dt_compat = r8a7778_compat_dt, 266ccb7cc74SKuninori Morimoto MACHINE_END 267ccb7cc74SKuninori Morimoto 268ccb7cc74SKuninori Morimoto #endif /* CONFIG_USE_OF */ 269