1ccb7cc74SKuninori Morimoto /* 2ccb7cc74SKuninori Morimoto * r8a7778 processor support 3ccb7cc74SKuninori Morimoto * 4ccb7cc74SKuninori Morimoto * Copyright (C) 2013 Renesas Solutions Corp. 5ccb7cc74SKuninori Morimoto * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 6ccb7cc74SKuninori Morimoto * 7ccb7cc74SKuninori Morimoto * This program is free software; you can redistribute it and/or modify 8ccb7cc74SKuninori Morimoto * it under the terms of the GNU General Public License as published by 9ccb7cc74SKuninori Morimoto * the Free Software Foundation; version 2 of the License. 10ccb7cc74SKuninori Morimoto * 11ccb7cc74SKuninori Morimoto * This program is distributed in the hope that it will be useful, 12ccb7cc74SKuninori Morimoto * but WITHOUT ANY WARRANTY; without even the implied warranty of 13ccb7cc74SKuninori Morimoto * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14ccb7cc74SKuninori Morimoto * GNU General Public License for more details. 15ccb7cc74SKuninori Morimoto * 16ccb7cc74SKuninori Morimoto * You should have received a copy of the GNU General Public License 17ccb7cc74SKuninori Morimoto * along with this program; if not, write to the Free Software 18ccb7cc74SKuninori Morimoto * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19ccb7cc74SKuninori Morimoto */ 20ccb7cc74SKuninori Morimoto 21ccb7cc74SKuninori Morimoto #include <linux/kernel.h> 22ccb7cc74SKuninori Morimoto #include <linux/io.h> 23ccb7cc74SKuninori Morimoto #include <linux/irqchip/arm-gic.h> 24ccb7cc74SKuninori Morimoto #include <linux/of.h> 25ccb7cc74SKuninori Morimoto #include <linux/of_platform.h> 26ccb7cc74SKuninori Morimoto #include <linux/platform_device.h> 27ccb7cc74SKuninori Morimoto #include <linux/irqchip.h> 28ccb7cc74SKuninori Morimoto #include <linux/sh_timer.h> 29ccb7cc74SKuninori Morimoto #include <mach/irqs.h> 30ccb7cc74SKuninori Morimoto #include <mach/r8a7778.h> 31ccb7cc74SKuninori Morimoto #include <mach/common.h> 32ccb7cc74SKuninori Morimoto #include <asm/mach/arch.h> 33ccb7cc74SKuninori Morimoto #include <asm/hardware/cache-l2x0.h> 34ccb7cc74SKuninori Morimoto 35ccb7cc74SKuninori Morimoto /* TMU */ 36ccb7cc74SKuninori Morimoto static struct resource sh_tmu0_resources[] = { 37ccb7cc74SKuninori Morimoto DEFINE_RES_MEM(0xffd80008, 12), 38ccb7cc74SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x40)), 39ccb7cc74SKuninori Morimoto }; 40ccb7cc74SKuninori Morimoto 41ccb7cc74SKuninori Morimoto static struct sh_timer_config sh_tmu0_platform_data = { 42ccb7cc74SKuninori Morimoto .name = "TMU00", 43ccb7cc74SKuninori Morimoto .channel_offset = 0x4, 44ccb7cc74SKuninori Morimoto .timer_bit = 0, 45ccb7cc74SKuninori Morimoto .clockevent_rating = 200, 46ccb7cc74SKuninori Morimoto }; 47ccb7cc74SKuninori Morimoto 48ccb7cc74SKuninori Morimoto static struct resource sh_tmu1_resources[] = { 49ccb7cc74SKuninori Morimoto DEFINE_RES_MEM(0xffd80014, 12), 50ccb7cc74SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x41)), 51ccb7cc74SKuninori Morimoto }; 52ccb7cc74SKuninori Morimoto 53ccb7cc74SKuninori Morimoto static struct sh_timer_config sh_tmu1_platform_data = { 54ccb7cc74SKuninori Morimoto .name = "TMU01", 55ccb7cc74SKuninori Morimoto .channel_offset = 0x10, 56ccb7cc74SKuninori Morimoto .timer_bit = 1, 57ccb7cc74SKuninori Morimoto .clocksource_rating = 200, 58ccb7cc74SKuninori Morimoto }; 59ccb7cc74SKuninori Morimoto 60ccb7cc74SKuninori Morimoto #define PLATFORM_INFO(n, i) \ 61ccb7cc74SKuninori Morimoto { \ 62ccb7cc74SKuninori Morimoto .parent = &platform_bus, \ 63ccb7cc74SKuninori Morimoto .name = #n, \ 64ccb7cc74SKuninori Morimoto .id = i, \ 65ccb7cc74SKuninori Morimoto .res = n ## i ## _resources, \ 66ccb7cc74SKuninori Morimoto .num_res = ARRAY_SIZE(n ## i ##_resources), \ 67ccb7cc74SKuninori Morimoto .data = &n ## i ##_platform_data, \ 68ccb7cc74SKuninori Morimoto .size_data = sizeof(n ## i ## _platform_data), \ 69ccb7cc74SKuninori Morimoto } 70ccb7cc74SKuninori Morimoto 71ccb7cc74SKuninori Morimoto struct platform_device_info platform_devinfo[] = { 72ccb7cc74SKuninori Morimoto PLATFORM_INFO(sh_tmu, 0), 73ccb7cc74SKuninori Morimoto PLATFORM_INFO(sh_tmu, 1), 74ccb7cc74SKuninori Morimoto }; 75ccb7cc74SKuninori Morimoto 76ccb7cc74SKuninori Morimoto void __init r8a7778_add_standard_devices(void) 77ccb7cc74SKuninori Morimoto { 78ccb7cc74SKuninori Morimoto int i; 79ccb7cc74SKuninori Morimoto 80ccb7cc74SKuninori Morimoto #ifdef CONFIG_CACHE_L2X0 81ccb7cc74SKuninori Morimoto void __iomem *base = ioremap_nocache(0xf0100000, 0x1000); 82ccb7cc74SKuninori Morimoto if (base) { 83ccb7cc74SKuninori Morimoto /* 84ccb7cc74SKuninori Morimoto * Early BRESP enable, Shared attribute override enable, 64K*16way 85ccb7cc74SKuninori Morimoto * don't call iounmap(base) 86ccb7cc74SKuninori Morimoto */ 87ccb7cc74SKuninori Morimoto l2x0_init(base, 0x40470000, 0x82000fff); 88ccb7cc74SKuninori Morimoto } 89ccb7cc74SKuninori Morimoto #endif 90ccb7cc74SKuninori Morimoto 91ccb7cc74SKuninori Morimoto for (i = 0; i < ARRAY_SIZE(platform_devinfo); i++) 92ccb7cc74SKuninori Morimoto platform_device_register_full(&platform_devinfo[i]); 93ccb7cc74SKuninori Morimoto } 94ccb7cc74SKuninori Morimoto 95ccb7cc74SKuninori Morimoto #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ 96ccb7cc74SKuninori Morimoto #define INT2SMSKCR1 0x8228c /* 0xfe78228c */ 97ccb7cc74SKuninori Morimoto 98ccb7cc74SKuninori Morimoto #define INT2NTSR0 0x00018 /* 0xfe700018 */ 99ccb7cc74SKuninori Morimoto #define INT2NTSR1 0x0002c /* 0xfe70002c */ 100ccb7cc74SKuninori Morimoto static void __init r8a7778_init_irq_common(void) 101ccb7cc74SKuninori Morimoto { 102ccb7cc74SKuninori Morimoto void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); 103ccb7cc74SKuninori Morimoto 104ccb7cc74SKuninori Morimoto BUG_ON(!base); 105ccb7cc74SKuninori Morimoto 106ccb7cc74SKuninori Morimoto /* route all interrupts to ARM */ 107ccb7cc74SKuninori Morimoto __raw_writel(0x73ffffff, base + INT2NTSR0); 108ccb7cc74SKuninori Morimoto __raw_writel(0xffffffff, base + INT2NTSR1); 109ccb7cc74SKuninori Morimoto 110ccb7cc74SKuninori Morimoto /* unmask all known interrupts in INTCS2 */ 111ccb7cc74SKuninori Morimoto __raw_writel(0x08330773, base + INT2SMSKCR0); 112ccb7cc74SKuninori Morimoto __raw_writel(0x00311110, base + INT2SMSKCR1); 113ccb7cc74SKuninori Morimoto 114ccb7cc74SKuninori Morimoto iounmap(base); 115ccb7cc74SKuninori Morimoto } 116ccb7cc74SKuninori Morimoto 117ccb7cc74SKuninori Morimoto void __init r8a7778_init_irq(void) 118ccb7cc74SKuninori Morimoto { 119ccb7cc74SKuninori Morimoto void __iomem *gic_dist_base; 120ccb7cc74SKuninori Morimoto void __iomem *gic_cpu_base; 121ccb7cc74SKuninori Morimoto 122ccb7cc74SKuninori Morimoto gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE); 123ccb7cc74SKuninori Morimoto gic_cpu_base = ioremap_nocache(0xfe430000, PAGE_SIZE); 124ccb7cc74SKuninori Morimoto BUG_ON(!gic_dist_base || !gic_cpu_base); 125ccb7cc74SKuninori Morimoto 126ccb7cc74SKuninori Morimoto /* use GIC to handle interrupts */ 127ccb7cc74SKuninori Morimoto gic_init(0, 29, gic_dist_base, gic_cpu_base); 128ccb7cc74SKuninori Morimoto 129ccb7cc74SKuninori Morimoto r8a7778_init_irq_common(); 130ccb7cc74SKuninori Morimoto } 131ccb7cc74SKuninori Morimoto 132ccb7cc74SKuninori Morimoto void __init r8a7778_init_delay(void) 133ccb7cc74SKuninori Morimoto { 134ccb7cc74SKuninori Morimoto shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */ 135ccb7cc74SKuninori Morimoto } 136ccb7cc74SKuninori Morimoto 137ccb7cc74SKuninori Morimoto #ifdef CONFIG_USE_OF 138ccb7cc74SKuninori Morimoto void __init r8a7778_init_irq_dt(void) 139ccb7cc74SKuninori Morimoto { 140ccb7cc74SKuninori Morimoto irqchip_init(); 141ccb7cc74SKuninori Morimoto r8a7778_init_irq_common(); 142ccb7cc74SKuninori Morimoto } 143ccb7cc74SKuninori Morimoto 144ccb7cc74SKuninori Morimoto static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = { 145ccb7cc74SKuninori Morimoto {}, 146ccb7cc74SKuninori Morimoto }; 147ccb7cc74SKuninori Morimoto 148ccb7cc74SKuninori Morimoto void __init r8a7778_add_standard_devices_dt(void) 149ccb7cc74SKuninori Morimoto { 150ccb7cc74SKuninori Morimoto of_platform_populate(NULL, of_default_bus_match_table, 151ccb7cc74SKuninori Morimoto r8a7778_auxdata_lookup, NULL); 152ccb7cc74SKuninori Morimoto } 153ccb7cc74SKuninori Morimoto 154ccb7cc74SKuninori Morimoto static const char *r8a7778_compat_dt[] __initdata = { 155ccb7cc74SKuninori Morimoto "renesas,r8a7778", 156ccb7cc74SKuninori Morimoto NULL, 157ccb7cc74SKuninori Morimoto }; 158ccb7cc74SKuninori Morimoto 159ccb7cc74SKuninori Morimoto DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") 160ccb7cc74SKuninori Morimoto .init_early = r8a7778_init_delay, 161ccb7cc74SKuninori Morimoto .init_irq = r8a7778_init_irq_dt, 162ccb7cc74SKuninori Morimoto .init_machine = r8a7778_add_standard_devices_dt, 163ccb7cc74SKuninori Morimoto .init_time = shmobile_timer_init, 164ccb7cc74SKuninori Morimoto .dt_compat = r8a7778_compat_dt, 165ccb7cc74SKuninori Morimoto MACHINE_END 166ccb7cc74SKuninori Morimoto 167ccb7cc74SKuninori Morimoto #endif /* CONFIG_USE_OF */ 168