1ccb7cc74SKuninori Morimoto /* 2ccb7cc74SKuninori Morimoto * r8a7778 processor support 3ccb7cc74SKuninori Morimoto * 4ccb7cc74SKuninori Morimoto * Copyright (C) 2013 Renesas Solutions Corp. 5ccb7cc74SKuninori Morimoto * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 652421914SSergei Shtylyov * Copyright (C) 2013 Cogent Embedded, Inc. 7ccb7cc74SKuninori Morimoto * 8ccb7cc74SKuninori Morimoto * This program is free software; you can redistribute it and/or modify 9ccb7cc74SKuninori Morimoto * it under the terms of the GNU General Public License as published by 10ccb7cc74SKuninori Morimoto * the Free Software Foundation; version 2 of the License. 11ccb7cc74SKuninori Morimoto * 12ccb7cc74SKuninori Morimoto * This program is distributed in the hope that it will be useful, 13ccb7cc74SKuninori Morimoto * but WITHOUT ANY WARRANTY; without even the implied warranty of 14ccb7cc74SKuninori Morimoto * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15ccb7cc74SKuninori Morimoto * GNU General Public License for more details. 16ccb7cc74SKuninori Morimoto * 17ccb7cc74SKuninori Morimoto * You should have received a copy of the GNU General Public License 18ccb7cc74SKuninori Morimoto * along with this program; if not, write to the Free Software 19ccb7cc74SKuninori Morimoto * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 20ccb7cc74SKuninori Morimoto */ 21ccb7cc74SKuninori Morimoto 22ccb7cc74SKuninori Morimoto #include <linux/kernel.h> 23ccb7cc74SKuninori Morimoto #include <linux/io.h> 24ccb7cc74SKuninori Morimoto #include <linux/irqchip/arm-gic.h> 25ccb7cc74SKuninori Morimoto #include <linux/of.h> 26ccb7cc74SKuninori Morimoto #include <linux/of_platform.h> 27338c4991SMax Filippov #include <linux/platform_data/dma-rcar-hpbdma.h> 2839ca2283SKuninori Morimoto #include <linux/platform_data/gpio-rcar.h> 293a42fa20SKuninori Morimoto #include <linux/platform_data/irq-renesas-intc-irqpin.h> 30ccb7cc74SKuninori Morimoto #include <linux/platform_device.h> 31ccb7cc74SKuninori Morimoto #include <linux/irqchip.h> 32db331fc8SKuninori Morimoto #include <linux/serial_sci.h> 33ccb7cc74SKuninori Morimoto #include <linux/sh_timer.h> 3402474a41SSergei Shtylyov #include <linux/pm_runtime.h> 3502474a41SSergei Shtylyov #include <linux/usb/phy.h> 3602474a41SSergei Shtylyov #include <linux/usb/hcd.h> 3702474a41SSergei Shtylyov #include <linux/usb/ehci_pdriver.h> 3802474a41SSergei Shtylyov #include <linux/usb/ohci_pdriver.h> 3902474a41SSergei Shtylyov #include <linux/dma-mapping.h> 40ccb7cc74SKuninori Morimoto #include <mach/irqs.h> 41ccb7cc74SKuninori Morimoto #include <mach/r8a7778.h> 42ccb7cc74SKuninori Morimoto #include <mach/common.h> 43ccb7cc74SKuninori Morimoto #include <asm/mach/arch.h> 44ccb7cc74SKuninori Morimoto #include <asm/hardware/cache-l2x0.h> 45ccb7cc74SKuninori Morimoto 46db331fc8SKuninori Morimoto /* SCIF */ 47db331fc8SKuninori Morimoto #define SCIF_INFO(baseaddr, irq) \ 48db331fc8SKuninori Morimoto { \ 49db331fc8SKuninori Morimoto .mapbase = baseaddr, \ 50db331fc8SKuninori Morimoto .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ 51db331fc8SKuninori Morimoto .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \ 52db331fc8SKuninori Morimoto .scbrr_algo_id = SCBRR_ALGO_2, \ 53db331fc8SKuninori Morimoto .type = PORT_SCIF, \ 54db331fc8SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(irq), \ 55db331fc8SKuninori Morimoto } 56db331fc8SKuninori Morimoto 57c9031fbbSKuninori Morimoto static struct plat_sci_port scif_platform_data[] __initdata = { 58db331fc8SKuninori Morimoto SCIF_INFO(0xffe40000, gic_iid(0x66)), 59db331fc8SKuninori Morimoto SCIF_INFO(0xffe41000, gic_iid(0x67)), 60db331fc8SKuninori Morimoto SCIF_INFO(0xffe42000, gic_iid(0x68)), 61db331fc8SKuninori Morimoto SCIF_INFO(0xffe43000, gic_iid(0x69)), 62db331fc8SKuninori Morimoto SCIF_INFO(0xffe44000, gic_iid(0x6a)), 63db331fc8SKuninori Morimoto SCIF_INFO(0xffe45000, gic_iid(0x6b)), 64db331fc8SKuninori Morimoto }; 65db331fc8SKuninori Morimoto 66ccb7cc74SKuninori Morimoto /* TMU */ 67c9031fbbSKuninori Morimoto static struct resource sh_tmu0_resources[] __initdata = { 68ccb7cc74SKuninori Morimoto DEFINE_RES_MEM(0xffd80008, 12), 69ccb7cc74SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x40)), 70ccb7cc74SKuninori Morimoto }; 71ccb7cc74SKuninori Morimoto 72c9031fbbSKuninori Morimoto static struct sh_timer_config sh_tmu0_platform_data __initdata = { 73ccb7cc74SKuninori Morimoto .name = "TMU00", 74ccb7cc74SKuninori Morimoto .channel_offset = 0x4, 75ccb7cc74SKuninori Morimoto .timer_bit = 0, 76ccb7cc74SKuninori Morimoto .clockevent_rating = 200, 77ccb7cc74SKuninori Morimoto }; 78ccb7cc74SKuninori Morimoto 79c9031fbbSKuninori Morimoto static struct resource sh_tmu1_resources[] __initdata = { 80ccb7cc74SKuninori Morimoto DEFINE_RES_MEM(0xffd80014, 12), 81ccb7cc74SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x41)), 82ccb7cc74SKuninori Morimoto }; 83ccb7cc74SKuninori Morimoto 84c9031fbbSKuninori Morimoto static struct sh_timer_config sh_tmu1_platform_data __initdata = { 85ccb7cc74SKuninori Morimoto .name = "TMU01", 86ccb7cc74SKuninori Morimoto .channel_offset = 0x10, 87ccb7cc74SKuninori Morimoto .timer_bit = 1, 88ccb7cc74SKuninori Morimoto .clocksource_rating = 200, 89ccb7cc74SKuninori Morimoto }; 90ccb7cc74SKuninori Morimoto 9181484487SKuninori Morimoto #define r8a7778_register_tmu(idx) \ 9281484487SKuninori Morimoto platform_device_register_resndata( \ 9381484487SKuninori Morimoto &platform_bus, "sh_tmu", idx, \ 9481484487SKuninori Morimoto sh_tmu##idx##_resources, \ 9581484487SKuninori Morimoto ARRAY_SIZE(sh_tmu##idx##_resources), \ 9681484487SKuninori Morimoto &sh_tmu##idx##_platform_data, \ 9781484487SKuninori Morimoto sizeof(sh_tmu##idx##_platform_data)) 98ccb7cc74SKuninori Morimoto 99f39d35fcSKuninori Morimoto int r8a7778_usb_phy_power(bool enable) 100f39d35fcSKuninori Morimoto { 101f39d35fcSKuninori Morimoto static struct usb_phy *phy = NULL; 102f39d35fcSKuninori Morimoto int ret = 0; 10302474a41SSergei Shtylyov 104f39d35fcSKuninori Morimoto if (!phy) 105f39d35fcSKuninori Morimoto phy = usb_get_phy(USB_PHY_TYPE_USB2); 106f39d35fcSKuninori Morimoto 107f39d35fcSKuninori Morimoto if (IS_ERR(phy)) { 108f39d35fcSKuninori Morimoto pr_err("kernel doesn't have usb phy driver\n"); 109f39d35fcSKuninori Morimoto return PTR_ERR(phy); 110f39d35fcSKuninori Morimoto } 111f39d35fcSKuninori Morimoto 112f39d35fcSKuninori Morimoto if (enable) 113f39d35fcSKuninori Morimoto ret = usb_phy_init(phy); 114f39d35fcSKuninori Morimoto else 115f39d35fcSKuninori Morimoto usb_phy_shutdown(phy); 116f39d35fcSKuninori Morimoto 117f39d35fcSKuninori Morimoto return ret; 118f39d35fcSKuninori Morimoto } 119f39d35fcSKuninori Morimoto 120f39d35fcSKuninori Morimoto /* USB */ 12102474a41SSergei Shtylyov static int usb_power_on(struct platform_device *pdev) 12202474a41SSergei Shtylyov { 123f39d35fcSKuninori Morimoto int ret = r8a7778_usb_phy_power(true); 124f39d35fcSKuninori Morimoto 125f39d35fcSKuninori Morimoto if (ret) 126f39d35fcSKuninori Morimoto return ret; 12702474a41SSergei Shtylyov 12802474a41SSergei Shtylyov pm_runtime_enable(&pdev->dev); 12902474a41SSergei Shtylyov pm_runtime_get_sync(&pdev->dev); 13002474a41SSergei Shtylyov 13102474a41SSergei Shtylyov return 0; 13202474a41SSergei Shtylyov } 13302474a41SSergei Shtylyov 13402474a41SSergei Shtylyov static void usb_power_off(struct platform_device *pdev) 13502474a41SSergei Shtylyov { 136f39d35fcSKuninori Morimoto if (r8a7778_usb_phy_power(false)) 13702474a41SSergei Shtylyov return; 13802474a41SSergei Shtylyov 13902474a41SSergei Shtylyov pm_runtime_put_sync(&pdev->dev); 14002474a41SSergei Shtylyov pm_runtime_disable(&pdev->dev); 14102474a41SSergei Shtylyov } 14202474a41SSergei Shtylyov 14302474a41SSergei Shtylyov static int ehci_init_internal_buffer(struct usb_hcd *hcd) 14402474a41SSergei Shtylyov { 14502474a41SSergei Shtylyov /* 14602474a41SSergei Shtylyov * Below are recommended values from the datasheet; 14702474a41SSergei Shtylyov * see [USB :: Setting of EHCI Internal Buffer]. 14802474a41SSergei Shtylyov */ 14902474a41SSergei Shtylyov /* EHCI IP internal buffer setting */ 15002474a41SSergei Shtylyov iowrite32(0x00ff0040, hcd->regs + 0x0094); 15102474a41SSergei Shtylyov /* EHCI IP internal buffer enable */ 15202474a41SSergei Shtylyov iowrite32(0x00000001, hcd->regs + 0x009C); 15302474a41SSergei Shtylyov 15402474a41SSergei Shtylyov return 0; 15502474a41SSergei Shtylyov } 15602474a41SSergei Shtylyov 15702474a41SSergei Shtylyov static struct usb_ehci_pdata ehci_pdata __initdata = { 15802474a41SSergei Shtylyov .power_on = usb_power_on, 15902474a41SSergei Shtylyov .power_off = usb_power_off, 16002474a41SSergei Shtylyov .power_suspend = usb_power_off, 16102474a41SSergei Shtylyov .pre_setup = ehci_init_internal_buffer, 16202474a41SSergei Shtylyov }; 16302474a41SSergei Shtylyov 16402474a41SSergei Shtylyov static struct resource ehci_resources[] __initdata = { 16502474a41SSergei Shtylyov DEFINE_RES_MEM(0xffe70000, 0x400), 16602474a41SSergei Shtylyov DEFINE_RES_IRQ(gic_iid(0x4c)), 16702474a41SSergei Shtylyov }; 16802474a41SSergei Shtylyov 16902474a41SSergei Shtylyov static struct usb_ohci_pdata ohci_pdata __initdata = { 17002474a41SSergei Shtylyov .power_on = usb_power_on, 17102474a41SSergei Shtylyov .power_off = usb_power_off, 17202474a41SSergei Shtylyov .power_suspend = usb_power_off, 17302474a41SSergei Shtylyov }; 17402474a41SSergei Shtylyov 17502474a41SSergei Shtylyov static struct resource ohci_resources[] __initdata = { 17602474a41SSergei Shtylyov DEFINE_RES_MEM(0xffe70400, 0x400), 17702474a41SSergei Shtylyov DEFINE_RES_IRQ(gic_iid(0x4c)), 17802474a41SSergei Shtylyov }; 17902474a41SSergei Shtylyov 18002474a41SSergei Shtylyov #define USB_PLATFORM_INFO(hci) \ 18102474a41SSergei Shtylyov static struct platform_device_info hci##_info __initdata = { \ 18202474a41SSergei Shtylyov .parent = &platform_bus, \ 18302474a41SSergei Shtylyov .name = #hci "-platform", \ 18402474a41SSergei Shtylyov .id = -1, \ 18502474a41SSergei Shtylyov .res = hci##_resources, \ 18602474a41SSergei Shtylyov .num_res = ARRAY_SIZE(hci##_resources), \ 18702474a41SSergei Shtylyov .data = &hci##_pdata, \ 18802474a41SSergei Shtylyov .size_data = sizeof(hci##_pdata), \ 18902474a41SSergei Shtylyov .dma_mask = DMA_BIT_MASK(32), \ 19002474a41SSergei Shtylyov } 19102474a41SSergei Shtylyov 19202474a41SSergei Shtylyov USB_PLATFORM_INFO(ehci); 19302474a41SSergei Shtylyov USB_PLATFORM_INFO(ohci); 19402474a41SSergei Shtylyov 19539ca2283SKuninori Morimoto /* PFC/GPIO */ 196c9031fbbSKuninori Morimoto static struct resource pfc_resources[] __initdata = { 197369b00bbSKuninori Morimoto DEFINE_RES_MEM(0xfffc0000, 0x118), 198369b00bbSKuninori Morimoto }; 199369b00bbSKuninori Morimoto 20039ca2283SKuninori Morimoto #define R8A7778_GPIO(idx) \ 201c9031fbbSKuninori Morimoto static struct resource r8a7778_gpio##idx##_resources[] __initdata = { \ 20239ca2283SKuninori Morimoto DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \ 20339ca2283SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x87)), \ 20439ca2283SKuninori Morimoto }; \ 20539ca2283SKuninori Morimoto \ 206c9031fbbSKuninori Morimoto static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data __initdata = { \ 20739ca2283SKuninori Morimoto .gpio_base = 32 * (idx), \ 20839ca2283SKuninori Morimoto .irq_base = GPIO_IRQ_BASE(idx), \ 20939ca2283SKuninori Morimoto .number_of_pins = 32, \ 21039ca2283SKuninori Morimoto .pctl_name = "pfc-r8a7778", \ 21139ca2283SKuninori Morimoto } 21239ca2283SKuninori Morimoto 21339ca2283SKuninori Morimoto R8A7778_GPIO(0); 21439ca2283SKuninori Morimoto R8A7778_GPIO(1); 21539ca2283SKuninori Morimoto R8A7778_GPIO(2); 21639ca2283SKuninori Morimoto R8A7778_GPIO(3); 21739ca2283SKuninori Morimoto R8A7778_GPIO(4); 21839ca2283SKuninori Morimoto 21939ca2283SKuninori Morimoto #define r8a7778_register_gpio(idx) \ 22039ca2283SKuninori Morimoto platform_device_register_resndata( \ 22139ca2283SKuninori Morimoto &platform_bus, "gpio_rcar", idx, \ 22239ca2283SKuninori Morimoto r8a7778_gpio##idx##_resources, \ 22339ca2283SKuninori Morimoto ARRAY_SIZE(r8a7778_gpio##idx##_resources), \ 22439ca2283SKuninori Morimoto &r8a7778_gpio##idx##_platform_data, \ 22539ca2283SKuninori Morimoto sizeof(r8a7778_gpio##idx##_platform_data)) 22639ca2283SKuninori Morimoto 227369b00bbSKuninori Morimoto void __init r8a7778_pinmux_init(void) 228369b00bbSKuninori Morimoto { 229369b00bbSKuninori Morimoto platform_device_register_simple( 230369b00bbSKuninori Morimoto "pfc-r8a7778", -1, 231369b00bbSKuninori Morimoto pfc_resources, 232369b00bbSKuninori Morimoto ARRAY_SIZE(pfc_resources)); 23339ca2283SKuninori Morimoto 23439ca2283SKuninori Morimoto r8a7778_register_gpio(0); 23539ca2283SKuninori Morimoto r8a7778_register_gpio(1); 23639ca2283SKuninori Morimoto r8a7778_register_gpio(2); 23739ca2283SKuninori Morimoto r8a7778_register_gpio(3); 23839ca2283SKuninori Morimoto r8a7778_register_gpio(4); 239ae8b378fSSimon Horman }; 240ae8b378fSSimon Horman 24146b9a092SKuninori Morimoto /* I2C */ 24246b9a092SKuninori Morimoto static struct resource i2c_resources[] __initdata = { 24346b9a092SKuninori Morimoto /* I2C0 */ 24446b9a092SKuninori Morimoto DEFINE_RES_MEM(0xffc70000, 0x1000), 24546b9a092SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x63)), 24646b9a092SKuninori Morimoto /* I2C1 */ 24746b9a092SKuninori Morimoto DEFINE_RES_MEM(0xffc71000, 0x1000), 24846b9a092SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x6e)), 24946b9a092SKuninori Morimoto /* I2C2 */ 25046b9a092SKuninori Morimoto DEFINE_RES_MEM(0xffc72000, 0x1000), 25146b9a092SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x6c)), 25246b9a092SKuninori Morimoto /* I2C3 */ 25346b9a092SKuninori Morimoto DEFINE_RES_MEM(0xffc73000, 0x1000), 25446b9a092SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x6d)), 25546b9a092SKuninori Morimoto }; 25646b9a092SKuninori Morimoto 2571fd4eecdSKuninori Morimoto static void __init r8a7778_register_i2c(int id) 25846b9a092SKuninori Morimoto { 25946b9a092SKuninori Morimoto BUG_ON(id < 0 || id > 3); 26046b9a092SKuninori Morimoto 26146b9a092SKuninori Morimoto platform_device_register_simple( 26246b9a092SKuninori Morimoto "i2c-rcar", id, 26346b9a092SKuninori Morimoto i2c_resources + (2 * id), 2); 26446b9a092SKuninori Morimoto } 26546b9a092SKuninori Morimoto 2668b89797fSKuninori Morimoto /* HSPI */ 2678b89797fSKuninori Morimoto static struct resource hspi_resources[] __initdata = { 2688b89797fSKuninori Morimoto /* HSPI0 */ 2698b89797fSKuninori Morimoto DEFINE_RES_MEM(0xfffc7000, 0x18), 2708b89797fSKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x5f)), 2718b89797fSKuninori Morimoto /* HSPI1 */ 2728b89797fSKuninori Morimoto DEFINE_RES_MEM(0xfffc8000, 0x18), 2738b89797fSKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x74)), 2748b89797fSKuninori Morimoto /* HSPI2 */ 2758b89797fSKuninori Morimoto DEFINE_RES_MEM(0xfffc6000, 0x18), 2768b89797fSKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x75)), 2778b89797fSKuninori Morimoto }; 2788b89797fSKuninori Morimoto 279117378e5SKuninori Morimoto static void __init r8a7778_register_hspi(int id) 2808b89797fSKuninori Morimoto { 2818b89797fSKuninori Morimoto BUG_ON(id < 0 || id > 2); 2828b89797fSKuninori Morimoto 2838b89797fSKuninori Morimoto platform_device_register_simple( 2848b89797fSKuninori Morimoto "sh-hspi", id, 2858b89797fSKuninori Morimoto hspi_resources + (2 * id), 2); 2868b89797fSKuninori Morimoto } 2878b89797fSKuninori Morimoto 288cfa66a81SKuninori Morimoto void __init r8a7778_add_dt_devices(void) 289ccb7cc74SKuninori Morimoto { 290ccb7cc74SKuninori Morimoto int i; 291ccb7cc74SKuninori Morimoto 292ccb7cc74SKuninori Morimoto #ifdef CONFIG_CACHE_L2X0 293ccb7cc74SKuninori Morimoto void __iomem *base = ioremap_nocache(0xf0100000, 0x1000); 294ccb7cc74SKuninori Morimoto if (base) { 295ccb7cc74SKuninori Morimoto /* 296ccb7cc74SKuninori Morimoto * Early BRESP enable, Shared attribute override enable, 64K*16way 297ccb7cc74SKuninori Morimoto * don't call iounmap(base) 298ccb7cc74SKuninori Morimoto */ 299ccb7cc74SKuninori Morimoto l2x0_init(base, 0x40470000, 0x82000fff); 300ccb7cc74SKuninori Morimoto } 301ccb7cc74SKuninori Morimoto #endif 302ccb7cc74SKuninori Morimoto 303db331fc8SKuninori Morimoto for (i = 0; i < ARRAY_SIZE(scif_platform_data); i++) 304db331fc8SKuninori Morimoto platform_device_register_data(&platform_bus, "sh-sci", i, 305db331fc8SKuninori Morimoto &scif_platform_data[i], 306db331fc8SKuninori Morimoto sizeof(struct plat_sci_port)); 307db331fc8SKuninori Morimoto 30881484487SKuninori Morimoto r8a7778_register_tmu(0); 30981484487SKuninori Morimoto r8a7778_register_tmu(1); 310ccb7cc74SKuninori Morimoto } 311ccb7cc74SKuninori Morimoto 312338c4991SMax Filippov /* HPB-DMA */ 313338c4991SMax Filippov 314338c4991SMax Filippov /* Asynchronous mode register (ASYNCMDR) bits */ 315338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD22_MASK BIT(2) /* SDHI0 */ 316338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD22_SINGLE BIT(2) /* SDHI0 */ 317338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD22_MULTI 0 /* SDHI0 */ 318338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD21_MASK BIT(1) /* SDHI0 */ 319338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */ 320338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */ 321338c4991SMax Filippov 322a91be22cSKuninori Morimoto #define HPBDMA_SSI(_id) \ 323a91be22cSKuninori Morimoto { \ 324a91be22cSKuninori Morimoto .id = HPBDMA_SLAVE_SSI## _id ##_TX, \ 325a91be22cSKuninori Morimoto .addr = 0xffd91008 + (_id * 0x40), \ 326a91be22cSKuninori Morimoto .dcr = HPB_DMAE_DCR_CT | \ 327a91be22cSKuninori Morimoto HPB_DMAE_DCR_DIP | \ 328a91be22cSKuninori Morimoto HPB_DMAE_DCR_SPDS_32BIT | \ 329a91be22cSKuninori Morimoto HPB_DMAE_DCR_DMDL | \ 330a91be22cSKuninori Morimoto HPB_DMAE_DCR_DPDS_32BIT, \ 331a91be22cSKuninori Morimoto .port = _id + (_id << 8), \ 332a91be22cSKuninori Morimoto .dma_ch = (28 + _id), \ 333a91be22cSKuninori Morimoto }, { \ 334a91be22cSKuninori Morimoto .id = HPBDMA_SLAVE_SSI## _id ##_RX, \ 335a91be22cSKuninori Morimoto .addr = 0xffd9100c + (_id * 0x40), \ 336a91be22cSKuninori Morimoto .dcr = HPB_DMAE_DCR_CT | \ 337a91be22cSKuninori Morimoto HPB_DMAE_DCR_DIP | \ 338a91be22cSKuninori Morimoto HPB_DMAE_DCR_SMDL | \ 339a91be22cSKuninori Morimoto HPB_DMAE_DCR_SPDS_32BIT | \ 340a91be22cSKuninori Morimoto HPB_DMAE_DCR_DPDS_32BIT, \ 341a91be22cSKuninori Morimoto .port = _id + (_id << 8), \ 342a91be22cSKuninori Morimoto .dma_ch = (28 + _id), \ 343a91be22cSKuninori Morimoto } 344a91be22cSKuninori Morimoto 345b4283184SKuninori Morimoto #define HPBDMA_HPBIF(_id) \ 346b4283184SKuninori Morimoto { \ 347b4283184SKuninori Morimoto .id = HPBDMA_SLAVE_HPBIF## _id ##_TX, \ 348b4283184SKuninori Morimoto .addr = 0xffda0000 + (_id * 0x1000), \ 349b4283184SKuninori Morimoto .dcr = HPB_DMAE_DCR_CT | \ 350b4283184SKuninori Morimoto HPB_DMAE_DCR_DIP | \ 351b4283184SKuninori Morimoto HPB_DMAE_DCR_SPDS_32BIT | \ 352b4283184SKuninori Morimoto HPB_DMAE_DCR_DMDL | \ 353b4283184SKuninori Morimoto HPB_DMAE_DCR_DPDS_32BIT, \ 354b4283184SKuninori Morimoto .port = 0x1111, \ 355b4283184SKuninori Morimoto .dma_ch = (28 + _id), \ 356b4283184SKuninori Morimoto }, { \ 357b4283184SKuninori Morimoto .id = HPBDMA_SLAVE_HPBIF## _id ##_RX, \ 358b4283184SKuninori Morimoto .addr = 0xffda0000 + (_id * 0x1000), \ 359b4283184SKuninori Morimoto .dcr = HPB_DMAE_DCR_CT | \ 360b4283184SKuninori Morimoto HPB_DMAE_DCR_DIP | \ 361b4283184SKuninori Morimoto HPB_DMAE_DCR_SMDL | \ 362b4283184SKuninori Morimoto HPB_DMAE_DCR_SPDS_32BIT | \ 363b4283184SKuninori Morimoto HPB_DMAE_DCR_DPDS_32BIT, \ 364b4283184SKuninori Morimoto .port = 0x1111, \ 365b4283184SKuninori Morimoto .dma_ch = (28 + _id), \ 366b4283184SKuninori Morimoto } 367b4283184SKuninori Morimoto 368338c4991SMax Filippov static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = { 369338c4991SMax Filippov { 370338c4991SMax Filippov .id = HPBDMA_SLAVE_SDHI0_TX, 371338c4991SMax Filippov .addr = 0xffe4c000 + 0x30, 372338c4991SMax Filippov .dcr = HPB_DMAE_DCR_SPDS_16BIT | 373338c4991SMax Filippov HPB_DMAE_DCR_DMDL | 374338c4991SMax Filippov HPB_DMAE_DCR_DPDS_16BIT, 375338c4991SMax Filippov .rstr = HPB_DMAE_ASYNCRSTR_ASRST21 | 376338c4991SMax Filippov HPB_DMAE_ASYNCRSTR_ASRST22 | 377338c4991SMax Filippov HPB_DMAE_ASYNCRSTR_ASRST23, 378338c4991SMax Filippov .mdr = HPB_DMAE_ASYNCMDR_ASMD21_MULTI, 379338c4991SMax Filippov .mdm = HPB_DMAE_ASYNCMDR_ASMD21_MASK, 380338c4991SMax Filippov .port = 0x0D0C, 381338c4991SMax Filippov .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE, 382338c4991SMax Filippov .dma_ch = 21, 383338c4991SMax Filippov }, { 384338c4991SMax Filippov .id = HPBDMA_SLAVE_SDHI0_RX, 385338c4991SMax Filippov .addr = 0xffe4c000 + 0x30, 386338c4991SMax Filippov .dcr = HPB_DMAE_DCR_SMDL | 387338c4991SMax Filippov HPB_DMAE_DCR_SPDS_16BIT | 388338c4991SMax Filippov HPB_DMAE_DCR_DPDS_16BIT, 389338c4991SMax Filippov .rstr = HPB_DMAE_ASYNCRSTR_ASRST21 | 390338c4991SMax Filippov HPB_DMAE_ASYNCRSTR_ASRST22 | 391338c4991SMax Filippov HPB_DMAE_ASYNCRSTR_ASRST23, 392338c4991SMax Filippov .mdr = HPB_DMAE_ASYNCMDR_ASMD22_MULTI, 393338c4991SMax Filippov .mdm = HPB_DMAE_ASYNCMDR_ASMD22_MASK, 394338c4991SMax Filippov .port = 0x0D0C, 395338c4991SMax Filippov .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE, 396338c4991SMax Filippov .dma_ch = 22, 397338c4991SMax Filippov }, 398b4283184SKuninori Morimoto 399a91be22cSKuninori Morimoto HPBDMA_SSI(0), 400a91be22cSKuninori Morimoto HPBDMA_SSI(1), 401a91be22cSKuninori Morimoto HPBDMA_SSI(2), 402a91be22cSKuninori Morimoto HPBDMA_SSI(3), 403a91be22cSKuninori Morimoto HPBDMA_SSI(4), 404a91be22cSKuninori Morimoto HPBDMA_SSI(5), 405a91be22cSKuninori Morimoto HPBDMA_SSI(6), 406a91be22cSKuninori Morimoto HPBDMA_SSI(7), 407a91be22cSKuninori Morimoto HPBDMA_SSI(8), 408a91be22cSKuninori Morimoto 409b4283184SKuninori Morimoto HPBDMA_HPBIF(0), 410b4283184SKuninori Morimoto HPBDMA_HPBIF(1), 411b4283184SKuninori Morimoto HPBDMA_HPBIF(2), 412b4283184SKuninori Morimoto HPBDMA_HPBIF(3), 413b4283184SKuninori Morimoto HPBDMA_HPBIF(4), 414b4283184SKuninori Morimoto HPBDMA_HPBIF(5), 415b4283184SKuninori Morimoto HPBDMA_HPBIF(6), 416b4283184SKuninori Morimoto HPBDMA_HPBIF(7), 417b4283184SKuninori Morimoto HPBDMA_HPBIF(8), 418338c4991SMax Filippov }; 419338c4991SMax Filippov 420338c4991SMax Filippov static const struct hpb_dmae_channel hpb_dmae_channels[] = { 421338c4991SMax Filippov HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */ 422338c4991SMax Filippov HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */ 423a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_TX), /* ch. 28 */ 424a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_RX), /* ch. 28 */ 425b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */ 426b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */ 427a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_TX), /* ch. 29 */ 428a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_RX), /* ch. 29 */ 429b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */ 430b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */ 431a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_TX), /* ch. 30 */ 432a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_RX), /* ch. 30 */ 433b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */ 434b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */ 435a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_TX), /* ch. 31 */ 436a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_RX), /* ch. 31 */ 437b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */ 438b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */ 439a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_TX), /* ch. 32 */ 440a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_RX), /* ch. 32 */ 441b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */ 442b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */ 443a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_TX), /* ch. 33 */ 444a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_RX), /* ch. 33 */ 445b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */ 446b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */ 447a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_TX), /* ch. 34 */ 448a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_RX), /* ch. 34 */ 449b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */ 450b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */ 451a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_TX), /* ch. 35 */ 452a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_RX), /* ch. 35 */ 453b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */ 454b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */ 455a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_TX), /* ch. 36 */ 456a91be22cSKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_RX), /* ch. 36 */ 457b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */ 458b4283184SKuninori Morimoto HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */ 459338c4991SMax Filippov }; 460338c4991SMax Filippov 461338c4991SMax Filippov static struct hpb_dmae_pdata dma_platform_data __initdata = { 462338c4991SMax Filippov .slaves = hpb_dmae_slaves, 463338c4991SMax Filippov .num_slaves = ARRAY_SIZE(hpb_dmae_slaves), 464338c4991SMax Filippov .channels = hpb_dmae_channels, 465338c4991SMax Filippov .num_channels = ARRAY_SIZE(hpb_dmae_channels), 466338c4991SMax Filippov .ts_shift = { 467338c4991SMax Filippov [XMIT_SZ_8BIT] = 0, 468338c4991SMax Filippov [XMIT_SZ_16BIT] = 1, 469338c4991SMax Filippov [XMIT_SZ_32BIT] = 2, 470338c4991SMax Filippov }, 471338c4991SMax Filippov .num_hw_channels = 39, 472338c4991SMax Filippov }; 473338c4991SMax Filippov 474338c4991SMax Filippov static struct resource hpb_dmae_resources[] __initdata = { 475338c4991SMax Filippov /* Channel registers */ 476338c4991SMax Filippov DEFINE_RES_MEM(0xffc08000, 0x1000), 477338c4991SMax Filippov /* Common registers */ 478338c4991SMax Filippov DEFINE_RES_MEM(0xffc09000, 0x170), 479338c4991SMax Filippov /* Asynchronous reset registers */ 480338c4991SMax Filippov DEFINE_RES_MEM(0xffc00300, 4), 481338c4991SMax Filippov /* Asynchronous mode registers */ 482338c4991SMax Filippov DEFINE_RES_MEM(0xffc00400, 4), 483338c4991SMax Filippov /* IRQ for DMA channels */ 484338c4991SMax Filippov DEFINE_RES_NAMED(gic_iid(0x7b), 5, NULL, IORESOURCE_IRQ), 485338c4991SMax Filippov }; 486338c4991SMax Filippov 487338c4991SMax Filippov static void __init r8a7778_register_hpb_dmae(void) 488338c4991SMax Filippov { 489338c4991SMax Filippov platform_device_register_resndata(&platform_bus, "hpb-dma-engine", -1, 490338c4991SMax Filippov hpb_dmae_resources, 491338c4991SMax Filippov ARRAY_SIZE(hpb_dmae_resources), 492338c4991SMax Filippov &dma_platform_data, 493338c4991SMax Filippov sizeof(dma_platform_data)); 494338c4991SMax Filippov } 495338c4991SMax Filippov 496cfa66a81SKuninori Morimoto void __init r8a7778_add_standard_devices(void) 497cfa66a81SKuninori Morimoto { 498cfa66a81SKuninori Morimoto r8a7778_add_dt_devices(); 4991fd4eecdSKuninori Morimoto r8a7778_register_i2c(0); 5001fd4eecdSKuninori Morimoto r8a7778_register_i2c(1); 5011fd4eecdSKuninori Morimoto r8a7778_register_i2c(2); 5021fd4eecdSKuninori Morimoto r8a7778_register_i2c(3); 5033c7b5362SKuninori Morimoto r8a7778_register_hspi(0); 5043c7b5362SKuninori Morimoto r8a7778_register_hspi(1); 5053c7b5362SKuninori Morimoto r8a7778_register_hspi(2); 506338c4991SMax Filippov 507338c4991SMax Filippov r8a7778_register_hpb_dmae(); 508cfa66a81SKuninori Morimoto } 509cfa66a81SKuninori Morimoto 51002474a41SSergei Shtylyov void __init r8a7778_init_late(void) 51102474a41SSergei Shtylyov { 51202474a41SSergei Shtylyov platform_device_register_full(&ehci_info); 51302474a41SSergei Shtylyov platform_device_register_full(&ohci_info); 51402474a41SSergei Shtylyov } 51502474a41SSergei Shtylyov 516c9031fbbSKuninori Morimoto static struct renesas_intc_irqpin_config irqpin_platform_data __initdata = { 5173a42fa20SKuninori Morimoto .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ 5183a42fa20SKuninori Morimoto .sense_bitfield_width = 2, 5193a42fa20SKuninori Morimoto }; 5203a42fa20SKuninori Morimoto 521c9031fbbSKuninori Morimoto static struct resource irqpin_resources[] __initdata = { 5223a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */ 5233a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */ 5243a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */ 5253a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */ 5263a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */ 5273a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3b)), /* IRQ0 */ 5283a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3c)), /* IRQ1 */ 5293a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3d)), /* IRQ2 */ 5303a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3e)), /* IRQ3 */ 5313a42fa20SKuninori Morimoto }; 5323a42fa20SKuninori Morimoto 5332238577bSKuninori Morimoto void __init r8a7778_init_irq_extpin_dt(int irlm) 5343a42fa20SKuninori Morimoto { 5353a42fa20SKuninori Morimoto void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE); 5363a42fa20SKuninori Morimoto unsigned long tmp; 5373a42fa20SKuninori Morimoto 5383a42fa20SKuninori Morimoto if (!icr0) { 5393a42fa20SKuninori Morimoto pr_warn("r8a7778: unable to setup external irq pin mode\n"); 5403a42fa20SKuninori Morimoto return; 5413a42fa20SKuninori Morimoto } 5423a42fa20SKuninori Morimoto 5433a42fa20SKuninori Morimoto tmp = ioread32(icr0); 5443a42fa20SKuninori Morimoto if (irlm) 5453a42fa20SKuninori Morimoto tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */ 5463a42fa20SKuninori Morimoto else 5473a42fa20SKuninori Morimoto tmp &= ~(1 << 23); /* IRL mode - not supported */ 5483a42fa20SKuninori Morimoto tmp |= (1 << 21); /* LVLMODE = 1 */ 5493a42fa20SKuninori Morimoto iowrite32(tmp, icr0); 5503a42fa20SKuninori Morimoto iounmap(icr0); 5512238577bSKuninori Morimoto } 5523a42fa20SKuninori Morimoto 5532238577bSKuninori Morimoto void __init r8a7778_init_irq_extpin(int irlm) 5542238577bSKuninori Morimoto { 5552238577bSKuninori Morimoto r8a7778_init_irq_extpin_dt(irlm); 5563a42fa20SKuninori Morimoto if (irlm) 5573a42fa20SKuninori Morimoto platform_device_register_resndata( 5583a42fa20SKuninori Morimoto &platform_bus, "renesas_intc_irqpin", -1, 5593a42fa20SKuninori Morimoto irqpin_resources, ARRAY_SIZE(irqpin_resources), 5603a42fa20SKuninori Morimoto &irqpin_platform_data, sizeof(irqpin_platform_data)); 5613a42fa20SKuninori Morimoto } 5623a42fa20SKuninori Morimoto 56354aa4c48SKuninori Morimoto void __init r8a7778_init_delay(void) 56454aa4c48SKuninori Morimoto { 56554aa4c48SKuninori Morimoto shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */ 56654aa4c48SKuninori Morimoto } 56754aa4c48SKuninori Morimoto 56854aa4c48SKuninori Morimoto #ifdef CONFIG_USE_OF 569ccb7cc74SKuninori Morimoto #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ 570ccb7cc74SKuninori Morimoto #define INT2SMSKCR1 0x8228c /* 0xfe78228c */ 571ccb7cc74SKuninori Morimoto 572ccb7cc74SKuninori Morimoto #define INT2NTSR0 0x00018 /* 0xfe700018 */ 573ccb7cc74SKuninori Morimoto #define INT2NTSR1 0x0002c /* 0xfe70002c */ 57454aa4c48SKuninori Morimoto void __init r8a7778_init_irq_dt(void) 575ccb7cc74SKuninori Morimoto { 576ccb7cc74SKuninori Morimoto void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); 577ccb7cc74SKuninori Morimoto 578ccb7cc74SKuninori Morimoto BUG_ON(!base); 579ccb7cc74SKuninori Morimoto 58054aa4c48SKuninori Morimoto irqchip_init(); 58154aa4c48SKuninori Morimoto 582ccb7cc74SKuninori Morimoto /* route all interrupts to ARM */ 583ccb7cc74SKuninori Morimoto __raw_writel(0x73ffffff, base + INT2NTSR0); 584ccb7cc74SKuninori Morimoto __raw_writel(0xffffffff, base + INT2NTSR1); 585ccb7cc74SKuninori Morimoto 586ccb7cc74SKuninori Morimoto /* unmask all known interrupts in INTCS2 */ 587ccb7cc74SKuninori Morimoto __raw_writel(0x08330773, base + INT2SMSKCR0); 588ccb7cc74SKuninori Morimoto __raw_writel(0x00311110, base + INT2SMSKCR1); 589ccb7cc74SKuninori Morimoto 590ccb7cc74SKuninori Morimoto iounmap(base); 591ccb7cc74SKuninori Morimoto } 592ccb7cc74SKuninori Morimoto 593ccb7cc74SKuninori Morimoto static const char *r8a7778_compat_dt[] __initdata = { 594ccb7cc74SKuninori Morimoto "renesas,r8a7778", 595ccb7cc74SKuninori Morimoto NULL, 596ccb7cc74SKuninori Morimoto }; 597ccb7cc74SKuninori Morimoto 598ccb7cc74SKuninori Morimoto DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") 599ccb7cc74SKuninori Morimoto .init_early = r8a7778_init_delay, 600ccb7cc74SKuninori Morimoto .init_irq = r8a7778_init_irq_dt, 601ccb7cc74SKuninori Morimoto .dt_compat = r8a7778_compat_dt, 60202474a41SSergei Shtylyov .init_late = r8a7778_init_late, 603ccb7cc74SKuninori Morimoto MACHINE_END 604ccb7cc74SKuninori Morimoto 605ccb7cc74SKuninori Morimoto #endif /* CONFIG_USE_OF */ 606