1ccb7cc74SKuninori Morimoto /* 2ccb7cc74SKuninori Morimoto * r8a7778 processor support 3ccb7cc74SKuninori Morimoto * 4ccb7cc74SKuninori Morimoto * Copyright (C) 2013 Renesas Solutions Corp. 5ccb7cc74SKuninori Morimoto * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 652421914SSergei Shtylyov * Copyright (C) 2013 Cogent Embedded, Inc. 7ccb7cc74SKuninori Morimoto * 8ccb7cc74SKuninori Morimoto * This program is free software; you can redistribute it and/or modify 9ccb7cc74SKuninori Morimoto * it under the terms of the GNU General Public License as published by 10ccb7cc74SKuninori Morimoto * the Free Software Foundation; version 2 of the License. 11ccb7cc74SKuninori Morimoto * 12ccb7cc74SKuninori Morimoto * This program is distributed in the hope that it will be useful, 13ccb7cc74SKuninori Morimoto * but WITHOUT ANY WARRANTY; without even the implied warranty of 14ccb7cc74SKuninori Morimoto * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15ccb7cc74SKuninori Morimoto * GNU General Public License for more details. 16ccb7cc74SKuninori Morimoto * 17ccb7cc74SKuninori Morimoto * You should have received a copy of the GNU General Public License 18ccb7cc74SKuninori Morimoto * along with this program; if not, write to the Free Software 19ccb7cc74SKuninori Morimoto * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 20ccb7cc74SKuninori Morimoto */ 21ccb7cc74SKuninori Morimoto 22ccb7cc74SKuninori Morimoto #include <linux/kernel.h> 23ccb7cc74SKuninori Morimoto #include <linux/io.h> 24ccb7cc74SKuninori Morimoto #include <linux/irqchip/arm-gic.h> 25ccb7cc74SKuninori Morimoto #include <linux/of.h> 26ccb7cc74SKuninori Morimoto #include <linux/of_platform.h> 27338c4991SMax Filippov #include <linux/platform_data/dma-rcar-hpbdma.h> 2839ca2283SKuninori Morimoto #include <linux/platform_data/gpio-rcar.h> 293a42fa20SKuninori Morimoto #include <linux/platform_data/irq-renesas-intc-irqpin.h> 30ccb7cc74SKuninori Morimoto #include <linux/platform_device.h> 31ccb7cc74SKuninori Morimoto #include <linux/irqchip.h> 32db331fc8SKuninori Morimoto #include <linux/serial_sci.h> 33ccb7cc74SKuninori Morimoto #include <linux/sh_timer.h> 3402474a41SSergei Shtylyov #include <linux/pm_runtime.h> 3502474a41SSergei Shtylyov #include <linux/usb/phy.h> 3602474a41SSergei Shtylyov #include <linux/usb/hcd.h> 3702474a41SSergei Shtylyov #include <linux/usb/ehci_pdriver.h> 3802474a41SSergei Shtylyov #include <linux/usb/ohci_pdriver.h> 3902474a41SSergei Shtylyov #include <linux/dma-mapping.h> 40ccb7cc74SKuninori Morimoto #include <mach/irqs.h> 41ccb7cc74SKuninori Morimoto #include <mach/r8a7778.h> 42ccb7cc74SKuninori Morimoto #include <mach/common.h> 43ccb7cc74SKuninori Morimoto #include <asm/mach/arch.h> 44ccb7cc74SKuninori Morimoto #include <asm/hardware/cache-l2x0.h> 45ccb7cc74SKuninori Morimoto 46db331fc8SKuninori Morimoto /* SCIF */ 47db331fc8SKuninori Morimoto #define SCIF_INFO(baseaddr, irq) \ 48db331fc8SKuninori Morimoto { \ 49db331fc8SKuninori Morimoto .mapbase = baseaddr, \ 50db331fc8SKuninori Morimoto .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ 51db331fc8SKuninori Morimoto .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \ 52db331fc8SKuninori Morimoto .scbrr_algo_id = SCBRR_ALGO_2, \ 53db331fc8SKuninori Morimoto .type = PORT_SCIF, \ 54db331fc8SKuninori Morimoto .irqs = SCIx_IRQ_MUXED(irq), \ 55db331fc8SKuninori Morimoto } 56db331fc8SKuninori Morimoto 57c9031fbbSKuninori Morimoto static struct plat_sci_port scif_platform_data[] __initdata = { 58db331fc8SKuninori Morimoto SCIF_INFO(0xffe40000, gic_iid(0x66)), 59db331fc8SKuninori Morimoto SCIF_INFO(0xffe41000, gic_iid(0x67)), 60db331fc8SKuninori Morimoto SCIF_INFO(0xffe42000, gic_iid(0x68)), 61db331fc8SKuninori Morimoto SCIF_INFO(0xffe43000, gic_iid(0x69)), 62db331fc8SKuninori Morimoto SCIF_INFO(0xffe44000, gic_iid(0x6a)), 63db331fc8SKuninori Morimoto SCIF_INFO(0xffe45000, gic_iid(0x6b)), 64db331fc8SKuninori Morimoto }; 65db331fc8SKuninori Morimoto 66ccb7cc74SKuninori Morimoto /* TMU */ 67c9031fbbSKuninori Morimoto static struct resource sh_tmu0_resources[] __initdata = { 68ccb7cc74SKuninori Morimoto DEFINE_RES_MEM(0xffd80008, 12), 69ccb7cc74SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x40)), 70ccb7cc74SKuninori Morimoto }; 71ccb7cc74SKuninori Morimoto 72c9031fbbSKuninori Morimoto static struct sh_timer_config sh_tmu0_platform_data __initdata = { 73ccb7cc74SKuninori Morimoto .name = "TMU00", 74ccb7cc74SKuninori Morimoto .channel_offset = 0x4, 75ccb7cc74SKuninori Morimoto .timer_bit = 0, 76ccb7cc74SKuninori Morimoto .clockevent_rating = 200, 77ccb7cc74SKuninori Morimoto }; 78ccb7cc74SKuninori Morimoto 79c9031fbbSKuninori Morimoto static struct resource sh_tmu1_resources[] __initdata = { 80ccb7cc74SKuninori Morimoto DEFINE_RES_MEM(0xffd80014, 12), 81ccb7cc74SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x41)), 82ccb7cc74SKuninori Morimoto }; 83ccb7cc74SKuninori Morimoto 84c9031fbbSKuninori Morimoto static struct sh_timer_config sh_tmu1_platform_data __initdata = { 85ccb7cc74SKuninori Morimoto .name = "TMU01", 86ccb7cc74SKuninori Morimoto .channel_offset = 0x10, 87ccb7cc74SKuninori Morimoto .timer_bit = 1, 88ccb7cc74SKuninori Morimoto .clocksource_rating = 200, 89ccb7cc74SKuninori Morimoto }; 90ccb7cc74SKuninori Morimoto 9181484487SKuninori Morimoto #define r8a7778_register_tmu(idx) \ 9281484487SKuninori Morimoto platform_device_register_resndata( \ 9381484487SKuninori Morimoto &platform_bus, "sh_tmu", idx, \ 9481484487SKuninori Morimoto sh_tmu##idx##_resources, \ 9581484487SKuninori Morimoto ARRAY_SIZE(sh_tmu##idx##_resources), \ 9681484487SKuninori Morimoto &sh_tmu##idx##_platform_data, \ 9781484487SKuninori Morimoto sizeof(sh_tmu##idx##_platform_data)) 98ccb7cc74SKuninori Morimoto 99f39d35fcSKuninori Morimoto int r8a7778_usb_phy_power(bool enable) 100f39d35fcSKuninori Morimoto { 101f39d35fcSKuninori Morimoto static struct usb_phy *phy = NULL; 102f39d35fcSKuninori Morimoto int ret = 0; 10302474a41SSergei Shtylyov 104f39d35fcSKuninori Morimoto if (!phy) 105f39d35fcSKuninori Morimoto phy = usb_get_phy(USB_PHY_TYPE_USB2); 106f39d35fcSKuninori Morimoto 107f39d35fcSKuninori Morimoto if (IS_ERR(phy)) { 108f39d35fcSKuninori Morimoto pr_err("kernel doesn't have usb phy driver\n"); 109f39d35fcSKuninori Morimoto return PTR_ERR(phy); 110f39d35fcSKuninori Morimoto } 111f39d35fcSKuninori Morimoto 112f39d35fcSKuninori Morimoto if (enable) 113f39d35fcSKuninori Morimoto ret = usb_phy_init(phy); 114f39d35fcSKuninori Morimoto else 115f39d35fcSKuninori Morimoto usb_phy_shutdown(phy); 116f39d35fcSKuninori Morimoto 117f39d35fcSKuninori Morimoto return ret; 118f39d35fcSKuninori Morimoto } 119f39d35fcSKuninori Morimoto 120f39d35fcSKuninori Morimoto /* USB */ 12102474a41SSergei Shtylyov static int usb_power_on(struct platform_device *pdev) 12202474a41SSergei Shtylyov { 123f39d35fcSKuninori Morimoto int ret = r8a7778_usb_phy_power(true); 124f39d35fcSKuninori Morimoto 125f39d35fcSKuninori Morimoto if (ret) 126f39d35fcSKuninori Morimoto return ret; 12702474a41SSergei Shtylyov 12802474a41SSergei Shtylyov pm_runtime_enable(&pdev->dev); 12902474a41SSergei Shtylyov pm_runtime_get_sync(&pdev->dev); 13002474a41SSergei Shtylyov 13102474a41SSergei Shtylyov return 0; 13202474a41SSergei Shtylyov } 13302474a41SSergei Shtylyov 13402474a41SSergei Shtylyov static void usb_power_off(struct platform_device *pdev) 13502474a41SSergei Shtylyov { 136f39d35fcSKuninori Morimoto if (r8a7778_usb_phy_power(false)) 13702474a41SSergei Shtylyov return; 13802474a41SSergei Shtylyov 13902474a41SSergei Shtylyov pm_runtime_put_sync(&pdev->dev); 14002474a41SSergei Shtylyov pm_runtime_disable(&pdev->dev); 14102474a41SSergei Shtylyov } 14202474a41SSergei Shtylyov 14302474a41SSergei Shtylyov static int ehci_init_internal_buffer(struct usb_hcd *hcd) 14402474a41SSergei Shtylyov { 14502474a41SSergei Shtylyov /* 14602474a41SSergei Shtylyov * Below are recommended values from the datasheet; 14702474a41SSergei Shtylyov * see [USB :: Setting of EHCI Internal Buffer]. 14802474a41SSergei Shtylyov */ 14902474a41SSergei Shtylyov /* EHCI IP internal buffer setting */ 15002474a41SSergei Shtylyov iowrite32(0x00ff0040, hcd->regs + 0x0094); 15102474a41SSergei Shtylyov /* EHCI IP internal buffer enable */ 15202474a41SSergei Shtylyov iowrite32(0x00000001, hcd->regs + 0x009C); 15302474a41SSergei Shtylyov 15402474a41SSergei Shtylyov return 0; 15502474a41SSergei Shtylyov } 15602474a41SSergei Shtylyov 15702474a41SSergei Shtylyov static struct usb_ehci_pdata ehci_pdata __initdata = { 15802474a41SSergei Shtylyov .power_on = usb_power_on, 15902474a41SSergei Shtylyov .power_off = usb_power_off, 16002474a41SSergei Shtylyov .power_suspend = usb_power_off, 16102474a41SSergei Shtylyov .pre_setup = ehci_init_internal_buffer, 16202474a41SSergei Shtylyov }; 16302474a41SSergei Shtylyov 16402474a41SSergei Shtylyov static struct resource ehci_resources[] __initdata = { 16502474a41SSergei Shtylyov DEFINE_RES_MEM(0xffe70000, 0x400), 16602474a41SSergei Shtylyov DEFINE_RES_IRQ(gic_iid(0x4c)), 16702474a41SSergei Shtylyov }; 16802474a41SSergei Shtylyov 16902474a41SSergei Shtylyov static struct usb_ohci_pdata ohci_pdata __initdata = { 17002474a41SSergei Shtylyov .power_on = usb_power_on, 17102474a41SSergei Shtylyov .power_off = usb_power_off, 17202474a41SSergei Shtylyov .power_suspend = usb_power_off, 17302474a41SSergei Shtylyov }; 17402474a41SSergei Shtylyov 17502474a41SSergei Shtylyov static struct resource ohci_resources[] __initdata = { 17602474a41SSergei Shtylyov DEFINE_RES_MEM(0xffe70400, 0x400), 17702474a41SSergei Shtylyov DEFINE_RES_IRQ(gic_iid(0x4c)), 17802474a41SSergei Shtylyov }; 17902474a41SSergei Shtylyov 18002474a41SSergei Shtylyov #define USB_PLATFORM_INFO(hci) \ 18102474a41SSergei Shtylyov static struct platform_device_info hci##_info __initdata = { \ 18202474a41SSergei Shtylyov .parent = &platform_bus, \ 18302474a41SSergei Shtylyov .name = #hci "-platform", \ 18402474a41SSergei Shtylyov .id = -1, \ 18502474a41SSergei Shtylyov .res = hci##_resources, \ 18602474a41SSergei Shtylyov .num_res = ARRAY_SIZE(hci##_resources), \ 18702474a41SSergei Shtylyov .data = &hci##_pdata, \ 18802474a41SSergei Shtylyov .size_data = sizeof(hci##_pdata), \ 18902474a41SSergei Shtylyov .dma_mask = DMA_BIT_MASK(32), \ 19002474a41SSergei Shtylyov } 19102474a41SSergei Shtylyov 19202474a41SSergei Shtylyov USB_PLATFORM_INFO(ehci); 19302474a41SSergei Shtylyov USB_PLATFORM_INFO(ohci); 19402474a41SSergei Shtylyov 195734e02f8SKuninori Morimoto /* Ether */ 196c9031fbbSKuninori Morimoto static struct resource ether_resources[] __initdata = { 197734e02f8SKuninori Morimoto DEFINE_RES_MEM(0xfde00000, 0x400), 198734e02f8SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x89)), 199734e02f8SKuninori Morimoto }; 200734e02f8SKuninori Morimoto 201734e02f8SKuninori Morimoto void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata) 202734e02f8SKuninori Morimoto { 203c02f8469SSergei Shtylyov platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1, 204734e02f8SKuninori Morimoto ether_resources, 205734e02f8SKuninori Morimoto ARRAY_SIZE(ether_resources), 206734e02f8SKuninori Morimoto pdata, sizeof(*pdata)); 207734e02f8SKuninori Morimoto } 208734e02f8SKuninori Morimoto 20939ca2283SKuninori Morimoto /* PFC/GPIO */ 210c9031fbbSKuninori Morimoto static struct resource pfc_resources[] __initdata = { 211369b00bbSKuninori Morimoto DEFINE_RES_MEM(0xfffc0000, 0x118), 212369b00bbSKuninori Morimoto }; 213369b00bbSKuninori Morimoto 21439ca2283SKuninori Morimoto #define R8A7778_GPIO(idx) \ 215c9031fbbSKuninori Morimoto static struct resource r8a7778_gpio##idx##_resources[] __initdata = { \ 21639ca2283SKuninori Morimoto DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \ 21739ca2283SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x87)), \ 21839ca2283SKuninori Morimoto }; \ 21939ca2283SKuninori Morimoto \ 220c9031fbbSKuninori Morimoto static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data __initdata = { \ 22139ca2283SKuninori Morimoto .gpio_base = 32 * (idx), \ 22239ca2283SKuninori Morimoto .irq_base = GPIO_IRQ_BASE(idx), \ 22339ca2283SKuninori Morimoto .number_of_pins = 32, \ 22439ca2283SKuninori Morimoto .pctl_name = "pfc-r8a7778", \ 22539ca2283SKuninori Morimoto } 22639ca2283SKuninori Morimoto 22739ca2283SKuninori Morimoto R8A7778_GPIO(0); 22839ca2283SKuninori Morimoto R8A7778_GPIO(1); 22939ca2283SKuninori Morimoto R8A7778_GPIO(2); 23039ca2283SKuninori Morimoto R8A7778_GPIO(3); 23139ca2283SKuninori Morimoto R8A7778_GPIO(4); 23239ca2283SKuninori Morimoto 23339ca2283SKuninori Morimoto #define r8a7778_register_gpio(idx) \ 23439ca2283SKuninori Morimoto platform_device_register_resndata( \ 23539ca2283SKuninori Morimoto &platform_bus, "gpio_rcar", idx, \ 23639ca2283SKuninori Morimoto r8a7778_gpio##idx##_resources, \ 23739ca2283SKuninori Morimoto ARRAY_SIZE(r8a7778_gpio##idx##_resources), \ 23839ca2283SKuninori Morimoto &r8a7778_gpio##idx##_platform_data, \ 23939ca2283SKuninori Morimoto sizeof(r8a7778_gpio##idx##_platform_data)) 24039ca2283SKuninori Morimoto 241369b00bbSKuninori Morimoto void __init r8a7778_pinmux_init(void) 242369b00bbSKuninori Morimoto { 243369b00bbSKuninori Morimoto platform_device_register_simple( 244369b00bbSKuninori Morimoto "pfc-r8a7778", -1, 245369b00bbSKuninori Morimoto pfc_resources, 246369b00bbSKuninori Morimoto ARRAY_SIZE(pfc_resources)); 24739ca2283SKuninori Morimoto 24839ca2283SKuninori Morimoto r8a7778_register_gpio(0); 24939ca2283SKuninori Morimoto r8a7778_register_gpio(1); 25039ca2283SKuninori Morimoto r8a7778_register_gpio(2); 25139ca2283SKuninori Morimoto r8a7778_register_gpio(3); 25239ca2283SKuninori Morimoto r8a7778_register_gpio(4); 253ae8b378fSSimon Horman }; 254ae8b378fSSimon Horman 25546b9a092SKuninori Morimoto /* I2C */ 25646b9a092SKuninori Morimoto static struct resource i2c_resources[] __initdata = { 25746b9a092SKuninori Morimoto /* I2C0 */ 25846b9a092SKuninori Morimoto DEFINE_RES_MEM(0xffc70000, 0x1000), 25946b9a092SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x63)), 26046b9a092SKuninori Morimoto /* I2C1 */ 26146b9a092SKuninori Morimoto DEFINE_RES_MEM(0xffc71000, 0x1000), 26246b9a092SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x6e)), 26346b9a092SKuninori Morimoto /* I2C2 */ 26446b9a092SKuninori Morimoto DEFINE_RES_MEM(0xffc72000, 0x1000), 26546b9a092SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x6c)), 26646b9a092SKuninori Morimoto /* I2C3 */ 26746b9a092SKuninori Morimoto DEFINE_RES_MEM(0xffc73000, 0x1000), 26846b9a092SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x6d)), 26946b9a092SKuninori Morimoto }; 27046b9a092SKuninori Morimoto 2711fd4eecdSKuninori Morimoto static void __init r8a7778_register_i2c(int id) 27246b9a092SKuninori Morimoto { 27346b9a092SKuninori Morimoto BUG_ON(id < 0 || id > 3); 27446b9a092SKuninori Morimoto 27546b9a092SKuninori Morimoto platform_device_register_simple( 27646b9a092SKuninori Morimoto "i2c-rcar", id, 27746b9a092SKuninori Morimoto i2c_resources + (2 * id), 2); 27846b9a092SKuninori Morimoto } 27946b9a092SKuninori Morimoto 2808b89797fSKuninori Morimoto /* HSPI */ 2818b89797fSKuninori Morimoto static struct resource hspi_resources[] __initdata = { 2828b89797fSKuninori Morimoto /* HSPI0 */ 2838b89797fSKuninori Morimoto DEFINE_RES_MEM(0xfffc7000, 0x18), 2848b89797fSKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x5f)), 2858b89797fSKuninori Morimoto /* HSPI1 */ 2868b89797fSKuninori Morimoto DEFINE_RES_MEM(0xfffc8000, 0x18), 2878b89797fSKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x74)), 2888b89797fSKuninori Morimoto /* HSPI2 */ 2898b89797fSKuninori Morimoto DEFINE_RES_MEM(0xfffc6000, 0x18), 2908b89797fSKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x75)), 2918b89797fSKuninori Morimoto }; 2928b89797fSKuninori Morimoto 2933c7b5362SKuninori Morimoto void __init r8a7778_register_hspi(int id) 2948b89797fSKuninori Morimoto { 2958b89797fSKuninori Morimoto BUG_ON(id < 0 || id > 2); 2968b89797fSKuninori Morimoto 2978b89797fSKuninori Morimoto platform_device_register_simple( 2988b89797fSKuninori Morimoto "sh-hspi", id, 2998b89797fSKuninori Morimoto hspi_resources + (2 * id), 2); 3008b89797fSKuninori Morimoto } 3018b89797fSKuninori Morimoto 302803c2df2SVladimir Barinov /* VIN */ 303803c2df2SVladimir Barinov #define R8A7778_VIN(idx) \ 304803c2df2SVladimir Barinov static struct resource vin##idx##_resources[] __initdata = { \ 305803c2df2SVladimir Barinov DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \ 306803c2df2SVladimir Barinov DEFINE_RES_IRQ(gic_iid(0x5a)), \ 307803c2df2SVladimir Barinov }; \ 308803c2df2SVladimir Barinov \ 309803c2df2SVladimir Barinov static struct platform_device_info vin##idx##_info __initdata = { \ 310803c2df2SVladimir Barinov .parent = &platform_bus, \ 311803c2df2SVladimir Barinov .name = "r8a7778-vin", \ 312803c2df2SVladimir Barinov .id = idx, \ 313803c2df2SVladimir Barinov .res = vin##idx##_resources, \ 314803c2df2SVladimir Barinov .num_res = ARRAY_SIZE(vin##idx##_resources), \ 315803c2df2SVladimir Barinov .dma_mask = DMA_BIT_MASK(32), \ 316803c2df2SVladimir Barinov } 317803c2df2SVladimir Barinov 318803c2df2SVladimir Barinov R8A7778_VIN(0); 319803c2df2SVladimir Barinov R8A7778_VIN(1); 320803c2df2SVladimir Barinov 321803c2df2SVladimir Barinov static struct platform_device_info *vin_info_table[] __initdata = { 322803c2df2SVladimir Barinov &vin0_info, 323803c2df2SVladimir Barinov &vin1_info, 324803c2df2SVladimir Barinov }; 325803c2df2SVladimir Barinov 326803c2df2SVladimir Barinov void __init r8a7778_add_vin_device(int id, struct rcar_vin_platform_data *pdata) 327803c2df2SVladimir Barinov { 328803c2df2SVladimir Barinov BUG_ON(id < 0 || id > 1); 329803c2df2SVladimir Barinov 330803c2df2SVladimir Barinov vin_info_table[id]->data = pdata; 331803c2df2SVladimir Barinov vin_info_table[id]->size_data = sizeof(*pdata); 332803c2df2SVladimir Barinov 333803c2df2SVladimir Barinov platform_device_register_full(vin_info_table[id]); 334803c2df2SVladimir Barinov } 335803c2df2SVladimir Barinov 336cfa66a81SKuninori Morimoto void __init r8a7778_add_dt_devices(void) 337ccb7cc74SKuninori Morimoto { 338ccb7cc74SKuninori Morimoto int i; 339ccb7cc74SKuninori Morimoto 340ccb7cc74SKuninori Morimoto #ifdef CONFIG_CACHE_L2X0 341ccb7cc74SKuninori Morimoto void __iomem *base = ioremap_nocache(0xf0100000, 0x1000); 342ccb7cc74SKuninori Morimoto if (base) { 343ccb7cc74SKuninori Morimoto /* 344ccb7cc74SKuninori Morimoto * Early BRESP enable, Shared attribute override enable, 64K*16way 345ccb7cc74SKuninori Morimoto * don't call iounmap(base) 346ccb7cc74SKuninori Morimoto */ 347ccb7cc74SKuninori Morimoto l2x0_init(base, 0x40470000, 0x82000fff); 348ccb7cc74SKuninori Morimoto } 349ccb7cc74SKuninori Morimoto #endif 350ccb7cc74SKuninori Morimoto 351db331fc8SKuninori Morimoto for (i = 0; i < ARRAY_SIZE(scif_platform_data); i++) 352db331fc8SKuninori Morimoto platform_device_register_data(&platform_bus, "sh-sci", i, 353db331fc8SKuninori Morimoto &scif_platform_data[i], 354db331fc8SKuninori Morimoto sizeof(struct plat_sci_port)); 355db331fc8SKuninori Morimoto 35681484487SKuninori Morimoto r8a7778_register_tmu(0); 35781484487SKuninori Morimoto r8a7778_register_tmu(1); 358ccb7cc74SKuninori Morimoto } 359ccb7cc74SKuninori Morimoto 360338c4991SMax Filippov /* HPB-DMA */ 361338c4991SMax Filippov 362338c4991SMax Filippov /* Asynchronous mode register (ASYNCMDR) bits */ 363338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD22_MASK BIT(2) /* SDHI0 */ 364338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD22_SINGLE BIT(2) /* SDHI0 */ 365338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD22_MULTI 0 /* SDHI0 */ 366338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD21_MASK BIT(1) /* SDHI0 */ 367338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */ 368338c4991SMax Filippov #define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */ 369338c4991SMax Filippov 370338c4991SMax Filippov static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = { 371338c4991SMax Filippov { 372338c4991SMax Filippov .id = HPBDMA_SLAVE_SDHI0_TX, 373338c4991SMax Filippov .addr = 0xffe4c000 + 0x30, 374338c4991SMax Filippov .dcr = HPB_DMAE_DCR_SPDS_16BIT | 375338c4991SMax Filippov HPB_DMAE_DCR_DMDL | 376338c4991SMax Filippov HPB_DMAE_DCR_DPDS_16BIT, 377338c4991SMax Filippov .rstr = HPB_DMAE_ASYNCRSTR_ASRST21 | 378338c4991SMax Filippov HPB_DMAE_ASYNCRSTR_ASRST22 | 379338c4991SMax Filippov HPB_DMAE_ASYNCRSTR_ASRST23, 380338c4991SMax Filippov .mdr = HPB_DMAE_ASYNCMDR_ASMD21_MULTI, 381338c4991SMax Filippov .mdm = HPB_DMAE_ASYNCMDR_ASMD21_MASK, 382338c4991SMax Filippov .port = 0x0D0C, 383338c4991SMax Filippov .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE, 384338c4991SMax Filippov .dma_ch = 21, 385338c4991SMax Filippov }, { 386338c4991SMax Filippov .id = HPBDMA_SLAVE_SDHI0_RX, 387338c4991SMax Filippov .addr = 0xffe4c000 + 0x30, 388338c4991SMax Filippov .dcr = HPB_DMAE_DCR_SMDL | 389338c4991SMax Filippov HPB_DMAE_DCR_SPDS_16BIT | 390338c4991SMax Filippov HPB_DMAE_DCR_DPDS_16BIT, 391338c4991SMax Filippov .rstr = HPB_DMAE_ASYNCRSTR_ASRST21 | 392338c4991SMax Filippov HPB_DMAE_ASYNCRSTR_ASRST22 | 393338c4991SMax Filippov HPB_DMAE_ASYNCRSTR_ASRST23, 394338c4991SMax Filippov .mdr = HPB_DMAE_ASYNCMDR_ASMD22_MULTI, 395338c4991SMax Filippov .mdm = HPB_DMAE_ASYNCMDR_ASMD22_MASK, 396338c4991SMax Filippov .port = 0x0D0C, 397338c4991SMax Filippov .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE, 398338c4991SMax Filippov .dma_ch = 22, 399338c4991SMax Filippov }, 400338c4991SMax Filippov }; 401338c4991SMax Filippov 402338c4991SMax Filippov static const struct hpb_dmae_channel hpb_dmae_channels[] = { 403338c4991SMax Filippov HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */ 404338c4991SMax Filippov HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */ 405338c4991SMax Filippov }; 406338c4991SMax Filippov 407338c4991SMax Filippov static struct hpb_dmae_pdata dma_platform_data __initdata = { 408338c4991SMax Filippov .slaves = hpb_dmae_slaves, 409338c4991SMax Filippov .num_slaves = ARRAY_SIZE(hpb_dmae_slaves), 410338c4991SMax Filippov .channels = hpb_dmae_channels, 411338c4991SMax Filippov .num_channels = ARRAY_SIZE(hpb_dmae_channels), 412338c4991SMax Filippov .ts_shift = { 413338c4991SMax Filippov [XMIT_SZ_8BIT] = 0, 414338c4991SMax Filippov [XMIT_SZ_16BIT] = 1, 415338c4991SMax Filippov [XMIT_SZ_32BIT] = 2, 416338c4991SMax Filippov }, 417338c4991SMax Filippov .num_hw_channels = 39, 418338c4991SMax Filippov }; 419338c4991SMax Filippov 420338c4991SMax Filippov static struct resource hpb_dmae_resources[] __initdata = { 421338c4991SMax Filippov /* Channel registers */ 422338c4991SMax Filippov DEFINE_RES_MEM(0xffc08000, 0x1000), 423338c4991SMax Filippov /* Common registers */ 424338c4991SMax Filippov DEFINE_RES_MEM(0xffc09000, 0x170), 425338c4991SMax Filippov /* Asynchronous reset registers */ 426338c4991SMax Filippov DEFINE_RES_MEM(0xffc00300, 4), 427338c4991SMax Filippov /* Asynchronous mode registers */ 428338c4991SMax Filippov DEFINE_RES_MEM(0xffc00400, 4), 429338c4991SMax Filippov /* IRQ for DMA channels */ 430338c4991SMax Filippov DEFINE_RES_NAMED(gic_iid(0x7b), 5, NULL, IORESOURCE_IRQ), 431338c4991SMax Filippov }; 432338c4991SMax Filippov 433338c4991SMax Filippov static void __init r8a7778_register_hpb_dmae(void) 434338c4991SMax Filippov { 435338c4991SMax Filippov platform_device_register_resndata(&platform_bus, "hpb-dma-engine", -1, 436338c4991SMax Filippov hpb_dmae_resources, 437338c4991SMax Filippov ARRAY_SIZE(hpb_dmae_resources), 438338c4991SMax Filippov &dma_platform_data, 439338c4991SMax Filippov sizeof(dma_platform_data)); 440338c4991SMax Filippov } 441338c4991SMax Filippov 442cfa66a81SKuninori Morimoto void __init r8a7778_add_standard_devices(void) 443cfa66a81SKuninori Morimoto { 444cfa66a81SKuninori Morimoto r8a7778_add_dt_devices(); 4451fd4eecdSKuninori Morimoto r8a7778_register_i2c(0); 4461fd4eecdSKuninori Morimoto r8a7778_register_i2c(1); 4471fd4eecdSKuninori Morimoto r8a7778_register_i2c(2); 4481fd4eecdSKuninori Morimoto r8a7778_register_i2c(3); 4493c7b5362SKuninori Morimoto r8a7778_register_hspi(0); 4503c7b5362SKuninori Morimoto r8a7778_register_hspi(1); 4513c7b5362SKuninori Morimoto r8a7778_register_hspi(2); 452338c4991SMax Filippov 453338c4991SMax Filippov r8a7778_register_hpb_dmae(); 454cfa66a81SKuninori Morimoto } 455cfa66a81SKuninori Morimoto 45602474a41SSergei Shtylyov void __init r8a7778_init_late(void) 45702474a41SSergei Shtylyov { 45802474a41SSergei Shtylyov platform_device_register_full(&ehci_info); 45902474a41SSergei Shtylyov platform_device_register_full(&ohci_info); 46002474a41SSergei Shtylyov } 46102474a41SSergei Shtylyov 462c9031fbbSKuninori Morimoto static struct renesas_intc_irqpin_config irqpin_platform_data __initdata = { 4633a42fa20SKuninori Morimoto .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ 4643a42fa20SKuninori Morimoto .sense_bitfield_width = 2, 4653a42fa20SKuninori Morimoto }; 4663a42fa20SKuninori Morimoto 467c9031fbbSKuninori Morimoto static struct resource irqpin_resources[] __initdata = { 4683a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */ 4693a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */ 4703a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */ 4713a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */ 4723a42fa20SKuninori Morimoto DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */ 4733a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3b)), /* IRQ0 */ 4743a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3c)), /* IRQ1 */ 4753a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3d)), /* IRQ2 */ 4763a42fa20SKuninori Morimoto DEFINE_RES_IRQ(gic_iid(0x3e)), /* IRQ3 */ 4773a42fa20SKuninori Morimoto }; 4783a42fa20SKuninori Morimoto 4792238577bSKuninori Morimoto void __init r8a7778_init_irq_extpin_dt(int irlm) 4803a42fa20SKuninori Morimoto { 4813a42fa20SKuninori Morimoto void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE); 4823a42fa20SKuninori Morimoto unsigned long tmp; 4833a42fa20SKuninori Morimoto 4843a42fa20SKuninori Morimoto if (!icr0) { 4853a42fa20SKuninori Morimoto pr_warn("r8a7778: unable to setup external irq pin mode\n"); 4863a42fa20SKuninori Morimoto return; 4873a42fa20SKuninori Morimoto } 4883a42fa20SKuninori Morimoto 4893a42fa20SKuninori Morimoto tmp = ioread32(icr0); 4903a42fa20SKuninori Morimoto if (irlm) 4913a42fa20SKuninori Morimoto tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */ 4923a42fa20SKuninori Morimoto else 4933a42fa20SKuninori Morimoto tmp &= ~(1 << 23); /* IRL mode - not supported */ 4943a42fa20SKuninori Morimoto tmp |= (1 << 21); /* LVLMODE = 1 */ 4953a42fa20SKuninori Morimoto iowrite32(tmp, icr0); 4963a42fa20SKuninori Morimoto iounmap(icr0); 4972238577bSKuninori Morimoto } 4983a42fa20SKuninori Morimoto 4992238577bSKuninori Morimoto void __init r8a7778_init_irq_extpin(int irlm) 5002238577bSKuninori Morimoto { 5012238577bSKuninori Morimoto r8a7778_init_irq_extpin_dt(irlm); 5023a42fa20SKuninori Morimoto if (irlm) 5033a42fa20SKuninori Morimoto platform_device_register_resndata( 5043a42fa20SKuninori Morimoto &platform_bus, "renesas_intc_irqpin", -1, 5053a42fa20SKuninori Morimoto irqpin_resources, ARRAY_SIZE(irqpin_resources), 5063a42fa20SKuninori Morimoto &irqpin_platform_data, sizeof(irqpin_platform_data)); 5073a42fa20SKuninori Morimoto } 5083a42fa20SKuninori Morimoto 50954aa4c48SKuninori Morimoto void __init r8a7778_init_delay(void) 51054aa4c48SKuninori Morimoto { 51154aa4c48SKuninori Morimoto shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */ 51254aa4c48SKuninori Morimoto } 51354aa4c48SKuninori Morimoto 51454aa4c48SKuninori Morimoto #ifdef CONFIG_USE_OF 515ccb7cc74SKuninori Morimoto #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ 516ccb7cc74SKuninori Morimoto #define INT2SMSKCR1 0x8228c /* 0xfe78228c */ 517ccb7cc74SKuninori Morimoto 518ccb7cc74SKuninori Morimoto #define INT2NTSR0 0x00018 /* 0xfe700018 */ 519ccb7cc74SKuninori Morimoto #define INT2NTSR1 0x0002c /* 0xfe70002c */ 52054aa4c48SKuninori Morimoto void __init r8a7778_init_irq_dt(void) 521ccb7cc74SKuninori Morimoto { 522ccb7cc74SKuninori Morimoto void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); 523ccb7cc74SKuninori Morimoto 524ccb7cc74SKuninori Morimoto BUG_ON(!base); 525ccb7cc74SKuninori Morimoto 52654aa4c48SKuninori Morimoto irqchip_init(); 52754aa4c48SKuninori Morimoto 528ccb7cc74SKuninori Morimoto /* route all interrupts to ARM */ 529ccb7cc74SKuninori Morimoto __raw_writel(0x73ffffff, base + INT2NTSR0); 530ccb7cc74SKuninori Morimoto __raw_writel(0xffffffff, base + INT2NTSR1); 531ccb7cc74SKuninori Morimoto 532ccb7cc74SKuninori Morimoto /* unmask all known interrupts in INTCS2 */ 533ccb7cc74SKuninori Morimoto __raw_writel(0x08330773, base + INT2SMSKCR0); 534ccb7cc74SKuninori Morimoto __raw_writel(0x00311110, base + INT2SMSKCR1); 535ccb7cc74SKuninori Morimoto 536ccb7cc74SKuninori Morimoto iounmap(base); 537ccb7cc74SKuninori Morimoto } 538ccb7cc74SKuninori Morimoto 539ccb7cc74SKuninori Morimoto static const char *r8a7778_compat_dt[] __initdata = { 540ccb7cc74SKuninori Morimoto "renesas,r8a7778", 541ccb7cc74SKuninori Morimoto NULL, 542ccb7cc74SKuninori Morimoto }; 543ccb7cc74SKuninori Morimoto 544ccb7cc74SKuninori Morimoto DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") 545ccb7cc74SKuninori Morimoto .init_early = r8a7778_init_delay, 546ccb7cc74SKuninori Morimoto .init_irq = r8a7778_init_irq_dt, 547ccb7cc74SKuninori Morimoto .dt_compat = r8a7778_compat_dt, 54802474a41SSergei Shtylyov .init_late = r8a7778_init_late, 549ccb7cc74SKuninori Morimoto MACHINE_END 550ccb7cc74SKuninori Morimoto 551ccb7cc74SKuninori Morimoto #endif /* CONFIG_USE_OF */ 552