1 /*
2  * r7s72100 processor support
3  *
4  * Copyright (C) 2013  Renesas Solutions Corp.
5  * Copyright (C) 2013  Magnus Damm
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; version 2 of the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  */
20 
21 #include <linux/irq.h>
22 #include <linux/kernel.h>
23 #include <linux/of_platform.h>
24 #include <linux/serial_sci.h>
25 #include <linux/sh_timer.h>
26 #include <mach/common.h>
27 #include <mach/irqs.h>
28 #include <mach/r7s72100.h>
29 #include <asm/mach/arch.h>
30 
31 #define R7S72100_SCIF(index, baseaddr, irq)				\
32 static const struct plat_sci_port scif##index##_platform_data = {	\
33 	.type		= PORT_SCIF,					\
34 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,		\
35 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
36 	.scbrr_algo_id	= SCBRR_ALGO_2,					\
37 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |	\
38 			  SCSCR_REIE,					\
39 	.mapbase	= baseaddr,					\
40 	.irqs		= { irq + 1, irq + 2, irq + 3, irq },		\
41 }
42 
43 R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
44 R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
45 R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
46 R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
47 R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
48 R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
49 R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
50 R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
51 
52 #define r7s72100_register_scif(index)					       \
53 	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
54 				      &scif##index##_platform_data,	       \
55 				      sizeof(scif##index##_platform_data))
56 
57 
58 static struct sh_timer_config mtu2_0_platform_data __initdata = {
59 	.name = "MTU2_0",
60 	.timer_bit = 0,
61 	.channel_offset = -0x80,
62 	.clockevent_rating = 200,
63 };
64 
65 static struct resource mtu2_0_resources[] __initdata = {
66 	DEFINE_RES_MEM(0xfcff0300, 0x27),
67 	DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
68 };
69 
70 #define r7s72100_register_mtu2(idx)					\
71 	platform_device_register_resndata(&platform_bus, "sh_mtu2",	\
72 					  idx, mtu2_##idx##_resources,	\
73 					  ARRAY_SIZE(mtu2_##idx##_resources), \
74 					  &mtu2_##idx##_platform_data,	\
75 					  sizeof(struct sh_timer_config))
76 
77 void __init r7s72100_add_dt_devices(void)
78 {
79 	r7s72100_register_scif(0);
80 	r7s72100_register_scif(1);
81 	r7s72100_register_scif(2);
82 	r7s72100_register_scif(3);
83 	r7s72100_register_scif(4);
84 	r7s72100_register_scif(5);
85 	r7s72100_register_scif(6);
86 	r7s72100_register_scif(7);
87 	r7s72100_register_mtu2(0);
88 }
89 
90 void __init r7s72100_init_early(void)
91 {
92 	shmobile_setup_delay(400, 1, 3); /* Cortex-A9 @ 400MHz */
93 }
94 
95 #ifdef CONFIG_USE_OF
96 static const char *r7s72100_boards_compat_dt[] __initdata = {
97 	"renesas,r7s72100",
98 	NULL,
99 };
100 
101 DT_MACHINE_START(R7S72100_DT, "Generic R7S72100 (Flattened Device Tree)")
102 	.init_early	= r7s72100_init_early,
103 	.dt_compat	= r7s72100_boards_compat_dt,
104 MACHINE_END
105 #endif /* CONFIG_USE_OF */
106