1 /* 2 * R-Car Generation 2 Power management support 3 * 4 * Copyright (C) 2013 - 2015 Renesas Electronics Corporation 5 * Copyright (C) 2011 Renesas Solutions Corp. 6 * Copyright (C) 2011 Magnus Damm 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 13 #include <linux/kernel.h> 14 #include <linux/of.h> 15 #include <linux/smp.h> 16 #include <linux/soc/renesas/rcar-sysc.h> 17 #include <asm/io.h> 18 #include "common.h" 19 #include "rcar-gen2.h" 20 21 /* RST */ 22 #define RST 0xe6160000 23 #define CA15BAR 0x0020 24 #define CA7BAR 0x0030 25 #define CA15RESCNT 0x0040 26 #define CA7RESCNT 0x0044 27 28 /* On-chip RAM */ 29 #define MERAM 0xe8080000 30 #define RAM 0xe6300000 31 32 /* SYSC */ 33 #define SYSCIER 0x0c 34 #define SYSCIMR 0x10 35 36 #if defined(CONFIG_SMP) 37 38 static void __init rcar_gen2_sysc_init(u32 syscier) 39 { 40 rcar_sysc_init(0xe6180000, syscier); 41 } 42 43 #else /* CONFIG_SMP */ 44 45 static inline void rcar_gen2_sysc_init(u32 syscier) {} 46 47 #endif /* CONFIG_SMP */ 48 49 void __init rcar_gen2_pm_init(void) 50 { 51 void __iomem *p; 52 u32 bar; 53 static int once; 54 struct device_node *np, *cpus; 55 bool has_a7 = false; 56 bool has_a15 = false; 57 phys_addr_t boot_vector_addr = 0; 58 u32 syscier = 0; 59 60 if (once++) 61 return; 62 63 cpus = of_find_node_by_path("/cpus"); 64 if (!cpus) 65 return; 66 67 for_each_child_of_node(cpus, np) { 68 if (of_device_is_compatible(np, "arm,cortex-a15")) 69 has_a15 = true; 70 else if (of_device_is_compatible(np, "arm,cortex-a7")) 71 has_a7 = true; 72 } 73 74 if (of_machine_is_compatible("renesas,r8a7790")) { 75 boot_vector_addr = MERAM; 76 syscier = 0x013111ef; 77 78 } else if (of_machine_is_compatible("renesas,r8a7791")) { 79 boot_vector_addr = RAM; 80 syscier = 0x00111003; 81 } 82 83 /* RAM for jump stub, because BAR requires 256KB aligned address */ 84 p = ioremap_nocache(boot_vector_addr, shmobile_boot_size); 85 memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); 86 iounmap(p); 87 88 /* setup reset vectors */ 89 p = ioremap_nocache(RST, 0x63); 90 bar = (boot_vector_addr >> 8) & 0xfffffc00; 91 if (has_a15) { 92 writel_relaxed(bar, p + CA15BAR); 93 writel_relaxed(bar | 0x10, p + CA15BAR); 94 95 /* de-assert reset for CA15 CPUs */ 96 writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 97 0xa5a50000, p + CA15RESCNT); 98 } 99 if (has_a7) { 100 writel_relaxed(bar, p + CA7BAR); 101 writel_relaxed(bar | 0x10, p + CA7BAR); 102 103 /* de-assert reset for CA7 CPUs */ 104 writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 105 0x5a5a0000, p + CA7RESCNT); 106 } 107 iounmap(p); 108 109 rcar_gen2_sysc_init(syscier); 110 shmobile_smp_apmu_suspend_init(); 111 } 112