1 /* 2 * arch/arm/mach-sa1100/include/mach/memory.h 3 * 4 * Copyright (C) 1999-2000 Nicolas Pitre <nico@fluxnic.net> 5 */ 6 7 #ifndef __ASM_ARCH_MEMORY_H 8 #define __ASM_ARCH_MEMORY_H 9 10 #include <asm/sizes.h> 11 12 /* 13 * Physical DRAM offset is 0xc0000000 on the SA1100 14 */ 15 #define PLAT_PHYS_OFFSET UL(0xc0000000) 16 17 #ifndef __ASSEMBLY__ 18 19 #ifdef CONFIG_SA1111 20 void sa1111_adjust_zones(unsigned long *size, unsigned long *holes); 21 22 #define arch_adjust_zones(size, holes) \ 23 sa1111_adjust_zones(size, holes) 24 25 #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_1M - 1) 26 #define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_1M) 27 28 #endif 29 #endif 30 31 /* 32 * Because of the wide memory address space between physical RAM banks on the 33 * SA1100, it's much convenient to use Linux's SparseMEM support to implement 34 * our memory map representation. Assuming all memory nodes have equal access 35 * characteristics, we then have generic discontiguous memory support. 36 * 37 * The sparsemem banks are matched with the physical memory bank addresses 38 * which are incidentally the same as virtual addresses. 39 * 40 * node 0: 0xc0000000 - 0xc7ffffff 41 * node 1: 0xc8000000 - 0xcfffffff 42 * node 2: 0xd0000000 - 0xd7ffffff 43 * node 3: 0xd8000000 - 0xdfffffff 44 */ 45 #define MAX_PHYSMEM_BITS 32 46 #define SECTION_SIZE_BITS 27 47 48 /* 49 * Cache flushing area - SA1100 zero bank 50 */ 51 #define FLUSH_BASE_PHYS 0xe0000000 52 #define FLUSH_BASE 0xf5000000 53 #define FLUSH_BASE_MINICACHE 0xf5100000 54 55 #endif 56